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1; REQUIRES: asserts2; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | FileCheck %s3; Now this test spills one register. But a reload in the loop is cheaper than4; the divsd so it's a win.5 6define fastcc void @fourn(ptr %data, i32 %isign) nounwind {7; CHECK: fourn8entry:9 br label %bb10 11bb: ; preds = %bb, %entry12 %indvar93 = phi i32 [ 0, %entry ], [ %idim.030, %bb ] ; <i32> [#uses=2]13 %idim.030 = add i32 %indvar93, 1 ; <i32> [#uses=1]14 %0 = add i32 %indvar93, 2 ; <i32> [#uses=1]15 %1 = icmp sgt i32 %0, 2 ; <i1> [#uses=1]16 br i1 %1, label %bb30.loopexit, label %bb17 18; CHECK: %bb30.loopexit19; CHECK: divsd %xmm020; CHECK: movsd %xmm0, 16(%esp)21; CHECK: %bb322bb3: ; preds = %bb30.loopexit, %bb25, %bb323 %2 = load i32, ptr null, align 4 ; <i32> [#uses=1]24 %3 = mul i32 %2, 0 ; <i32> [#uses=1]25 %4 = icmp slt i32 0, %3 ; <i1> [#uses=1]26 br i1 %4, label %bb18, label %bb327 28bb18: ; preds = %bb329 %5 = fdiv double %11, 0.000000e+00 ; <double> [#uses=1]30 %6 = tail call double @sin(double %5) nounwind readonly ; <double> [#uses=1]31 br label %bb24.preheader32 33bb22.preheader: ; preds = %bb24.preheader, %bb22.preheader34 br label %bb22.preheader35 36bb25: ; preds = %bb24.preheader37 %7 = fmul double 0.000000e+00, %6 ; <double> [#uses=0]38 %8 = add i32 %i3.122100, 0 ; <i32> [#uses=1]39 %9 = icmp sgt i32 %8, 0 ; <i1> [#uses=1]40 br i1 %9, label %bb3, label %bb24.preheader41 42bb24.preheader: ; preds = %bb25, %bb1843 %i3.122100 = or i32 0, 1 ; <i32> [#uses=2]44 %10 = icmp slt i32 0, %i3.122100 ; <i1> [#uses=1]45 br i1 %10, label %bb25, label %bb22.preheader46 47bb30.loopexit: ; preds = %bb48 %11 = fmul double 0.000000e+00, 0x401921FB54442D1C ; <double> [#uses=1]49 br label %bb350}51 52declare double @sin(double) nounwind readonly53