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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefix=X644 5; Make sure that we don't crash when legalizing vselect and vsetcc and that6; we are able to generate vector blend instructions.7 8define void @simple_widen(<2 x float> %a, <2 x float> %b) {9; X86-LABEL: simple_widen:10; X86: # %bb.0: # %entry11; X86-NEXT: movlps %xmm1, (%eax)12; X86-NEXT: retl13;14; X64-LABEL: simple_widen:15; X64: # %bb.0: # %entry16; X64-NEXT: movlps %xmm1, (%rax)17; X64-NEXT: retq18entry:19 %0 = select <2 x i1> undef, <2 x float> %a, <2 x float> %b20 store <2 x float> %0, ptr undef21 ret void22}23 24define void @complex_inreg_work(<2 x float> %a, <2 x float> %b, <2 x float> %c) {25; X86-LABEL: complex_inreg_work:26; X86: # %bb.0: # %entry27; X86-NEXT: movaps %xmm0, %xmm328; X86-NEXT: cmpordps %xmm2, %xmm229; X86-NEXT: movaps %xmm2, %xmm030; X86-NEXT: blendvps %xmm0, %xmm3, %xmm131; X86-NEXT: movlps %xmm1, (%eax)32; X86-NEXT: retl33;34; X64-LABEL: complex_inreg_work:35; X64: # %bb.0: # %entry36; X64-NEXT: movaps %xmm0, %xmm337; X64-NEXT: cmpordps %xmm2, %xmm238; X64-NEXT: movaps %xmm2, %xmm039; X64-NEXT: blendvps %xmm0, %xmm3, %xmm140; X64-NEXT: movlps %xmm1, (%rax)41; X64-NEXT: retq42entry:43 %0 = fcmp oeq <2 x float> %c, %c44 %1 = select <2 x i1> %0, <2 x float> %a, <2 x float> %b45 store <2 x float> %1, ptr undef46 ret void47}48 49define void @zero_test() {50; X86-LABEL: zero_test:51; X86: # %bb.0: # %entry52; X86-NEXT: xorps %xmm0, %xmm053; X86-NEXT: movsd %xmm0, (%eax)54; X86-NEXT: retl55;56; X64-LABEL: zero_test:57; X64: # %bb.0: # %entry58; X64-NEXT: movq $0, (%rax)59; X64-NEXT: retq60entry:61 %0 = select <2 x i1> undef, <2 x float> undef, <2 x float> zeroinitializer62 store <2 x float> %0, ptr undef63 ret void64}65 66define void @full_test() {67; X86-LABEL: full_test:68; X86: # %bb.0: # %entry69; X86-NEXT: subl $60, %esp70; X86-NEXT: .cfi_def_cfa_offset 6471; X86-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero72; X86-NEXT: cvttps2dq %xmm2, %xmm073; X86-NEXT: cvtdq2ps %xmm0, %xmm174; X86-NEXT: xorps %xmm0, %xmm075; X86-NEXT: cmpltps %xmm2, %xmm076; X86-NEXT: movaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,u,u]77; X86-NEXT: addps %xmm1, %xmm378; X86-NEXT: movaps %xmm1, %xmm479; X86-NEXT: blendvps %xmm0, %xmm3, %xmm480; X86-NEXT: cmpeqps %xmm2, %xmm181; X86-NEXT: movaps %xmm1, %xmm082; X86-NEXT: blendvps %xmm0, %xmm2, %xmm483; X86-NEXT: movlps %xmm4, {{[0-9]+}}(%esp)84; X86-NEXT: movlps %xmm4, {{[0-9]+}}(%esp)85; X86-NEXT: addl $60, %esp86; X86-NEXT: .cfi_def_cfa_offset 487; X86-NEXT: retl88;89; X64-LABEL: full_test:90; X64: # %bb.0: # %entry91; X64-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero92; X64-NEXT: cvttps2dq %xmm2, %xmm093; X64-NEXT: cvtdq2ps %xmm0, %xmm194; X64-NEXT: xorps %xmm0, %xmm095; X64-NEXT: cmpltps %xmm2, %xmm096; X64-NEXT: movaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,u,u]97; X64-NEXT: addps %xmm1, %xmm398; X64-NEXT: movaps %xmm1, %xmm499; X64-NEXT: blendvps %xmm0, %xmm3, %xmm4100; X64-NEXT: cmpeqps %xmm2, %xmm1101; X64-NEXT: movaps %xmm1, %xmm0102; X64-NEXT: blendvps %xmm0, %xmm2, %xmm4103; X64-NEXT: movlps %xmm4, -{{[0-9]+}}(%rsp)104; X64-NEXT: movlps %xmm4, -{{[0-9]+}}(%rsp)105; X64-NEXT: retq106 entry:107 %Cy300 = alloca <4 x float>108 %Cy11a = alloca <2 x float>109 %Cy118 = alloca <2 x float>110 %Cy119 = alloca <2 x float>111 br label %B1112 113 B1: ; preds = %entry114 %0 = load <2 x float>, ptr %Cy119115 %1 = fptosi <2 x float> %0 to <2 x i32>116 %2 = sitofp <2 x i32> %1 to <2 x float>117 %3 = fcmp ogt <2 x float> %0, zeroinitializer118 %4 = fadd <2 x float> %2, <float 1.000000e+00, float 1.000000e+00>119 %5 = select <2 x i1> %3, <2 x float> %4, <2 x float> %2120 %6 = fcmp oeq <2 x float> %2, %0121 %7 = select <2 x i1> %6, <2 x float> %0, <2 x float> %5122 store <2 x float> %7, ptr %Cy118123 %8 = load <2 x float>, ptr %Cy118124 store <2 x float> %8, ptr %Cy11a125 ret void126}127