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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2 3; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s4define <4 x i8> @build_vector_again(<16 x i8> %in) nounwind readnone {5; CHECK-LABEL: build_vector_again:6; CHECK: ## %bb.0: ## %entry7; CHECK-NEXT: retq8entry:9 %out = shufflevector <16 x i8> %in, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>10 ret <4 x i8> %out11}12