270 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt --codegen-opt-level=2 -mtriple=x86_64 -x86-lower-amx-type %s -S | FileCheck %s3; RUN: opt --codegen-opt-level=2 -mtriple=x86_64 -passes=x86-lower-amx-type %s -S | FileCheck %s4 5define void @undef_2phi(ptr%buf) {6; CHECK-LABEL: @undef_2phi(7; CHECK-NEXT: entry:8; CHECK-NEXT: [[TMP0:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)9; CHECK-NEXT: br i1 poison, label [[L1:%.*]], label [[L2:%.*]]10; CHECK: l1:11; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)12; CHECK-NEXT: br i1 poison, label [[L2]], label [[L3:%.*]]13; CHECK: l2:14; CHECK-NEXT: [[TMP1:%.*]] = phi x86_amx [ [[TMP0]], [[ENTRY:%.*]] ], [ [[T1]], [[L1]] ]15; CHECK-NEXT: br i1 poison, label [[L3]], label [[EXIT:%.*]]16; CHECK: l3:17; CHECK-NEXT: [[TMP2:%.*]] = phi x86_amx [ [[TMP1]], [[L2]] ], [ [[T1]], [[L1]] ]18; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr [[BUF:%.*]], i64 1024, x86_amx [[TMP2]])19; CHECK-NEXT: br label [[EXIT]]20; CHECK: exit:21; CHECK-NEXT: ret void22;23entry:24 br i1 poison, label %l1, label %l225 26l1:27 %t1 = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)28 %t2 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t1)29 br i1 poison, label %l2, label %l330 31l2:32 %t3 = phi <256 x i32> [ poison, %entry ], [ %t2, %l1 ]33 br i1 poison, label %l3, label %exit34 35l3:36 %t4 = phi <256 x i32> [ %t3, %l2], [ %t2, %l1 ]37 %t5 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t4)38 call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr %buf, i64 1024, x86_amx %t5)39 br label %exit40 41exit:42 ret void43}44 45define void @foo_undef(ptr%buf) {46; CHECK-LABEL: @foo_undef(47; CHECK-NEXT: entry:48; CHECK-NEXT: [[TMP0:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)49; CHECK-NEXT: br i1 poison, label [[L1:%.*]], label [[L2:%.*]]50; CHECK: l1:51; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)52; CHECK-NEXT: br i1 poison, label [[L2]], label [[EXIT:%.*]]53; CHECK: l2:54; CHECK-NEXT: [[TMP1:%.*]] = phi x86_amx [ [[TMP0]], [[ENTRY:%.*]] ], [ [[T1]], [[L1]] ]55; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr [[BUF:%.*]], i64 1024, x86_amx [[TMP1]])56; CHECK-NEXT: br label [[EXIT]]57; CHECK: exit:58; CHECK-NEXT: ret void59;60entry:61 br i1 poison, label %l1, label %l262 63l1:64 %t1 = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)65 %t2 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t1)66 br i1 poison, label %l2, label %exit67 68l2:69 %t3 = phi <256 x i32> [ poison, %entry ], [ %t2, %l1 ]70 %t4 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t3)71 call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr %buf, i64 1024, x86_amx %t4)72 br label %exit73 74exit:75 ret void76}77 78define void @foo_zero(ptr%buf) {79; CHECK-LABEL: @foo_zero(80; CHECK-NEXT: entry:81; CHECK-NEXT: [[TMP0:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)82; CHECK-NEXT: br i1 poison, label [[L1:%.*]], label [[L2:%.*]]83; CHECK: l1:84; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)85; CHECK-NEXT: br i1 poison, label [[L2]], label [[EXIT:%.*]]86; CHECK: l2:87; CHECK-NEXT: [[TMP1:%.*]] = phi x86_amx [ [[TMP0]], [[ENTRY:%.*]] ], [ [[T1]], [[L1]] ]88; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr [[BUF:%.*]], i64 1024, x86_amx [[TMP1]])89; CHECK-NEXT: br label [[EXIT]]90; CHECK: exit:91; CHECK-NEXT: ret void92;93entry:94 br i1 poison, label %l1, label %l295 96l1:97 %t1 = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)98 %t2 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t1)99 br i1 poison, label %l2, label %exit100 101l2:102 %t3 = phi <256 x i32> [ zeroinitializer, %entry ], [ %t2, %l1 ]103 %t4 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t3)104 call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr %buf, i64 1024, x86_amx %t4)105 br label %exit106 107exit:108 ret void109}110 111define void @foo_vrow(ptr%buf, i16 %row) {112; CHECK-LABEL: @foo_vrow(113; CHECK-NEXT: entry:114; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 64115; CHECK-NEXT: [[TMP1:%.*]] = alloca <256 x i32>, align 64116; CHECK-NEXT: br i1 poison, label [[L1:%.*]], label [[L2:%.*]]117; CHECK: l1:118; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 [[ROW:%.*]], i16 32)119; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[ROW]], i16 32, ptr [[TMP1]], i64 32, x86_amx [[T1]])120; CHECK-NEXT: [[TMP3:%.*]] = load <256 x i32>, ptr [[TMP1]], align 1024121; CHECK-NEXT: br i1 poison, label [[L2]], label [[EXIT:%.*]]122; CHECK: l2:123; CHECK-NEXT: [[T3:%.*]] = phi <256 x i32> [ poison, [[ENTRY:%.*]] ], [ [[TMP3]], [[L1]] ]124; CHECK-NEXT: store <256 x i32> [[T3]], ptr [[TMP0]], align 1024125; CHECK-NEXT: [[TMP5:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[ROW]], i16 32, ptr [[TMP0]], i64 32)126; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[ROW]], i16 32, ptr [[BUF:%.*]], i64 1024, x86_amx [[TMP5]])127; CHECK-NEXT: br label [[EXIT]]128; CHECK: exit:129; CHECK-NEXT: ret void130;131entry:132 br i1 poison, label %l1, label %l2133 134l1:135 %t1 = call x86_amx @llvm.x86.tilezero.internal(i16 %row, i16 32)136 %t2 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t1)137 br i1 poison, label %l2, label %exit138 139l2:140 %t3 = phi <256 x i32> [ poison, %entry ], [ %t2, %l1 ]141 %t4 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t3)142 call void @llvm.x86.tilestored64.internal(i16 %row, i16 32, ptr %buf, i64 1024, x86_amx %t4)143 br label %exit144 145exit:146 ret void147}148 149define void @foo_vcol(ptr%buf, i16 %col) {150; CHECK-LABEL: @foo_vcol(151; CHECK-NEXT: entry:152; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 64153; CHECK-NEXT: [[TMP1:%.*]] = alloca <256 x i32>, align 64154; CHECK-NEXT: br i1 poison, label [[L1:%.*]], label [[L2:%.*]]155; CHECK: l1:156; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 [[COL:%.*]])157; CHECK-NEXT: [[TMP3:%.*]] = sext i16 [[COL]] to i64158; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 [[COL]], ptr [[TMP1]], i64 [[TMP3]], x86_amx [[T1]])159; CHECK-NEXT: [[TMP4:%.*]] = load <256 x i32>, ptr [[TMP1]], align 1024160; CHECK-NEXT: br i1 poison, label [[L2]], label [[EXIT:%.*]]161; CHECK: l2:162; CHECK-NEXT: [[T3:%.*]] = phi <256 x i32> [ zeroinitializer, [[ENTRY:%.*]] ], [ [[TMP4]], [[L1]] ]163; CHECK-NEXT: store <256 x i32> [[T3]], ptr [[TMP0]], align 1024164; CHECK-NEXT: [[TMP6:%.*]] = sext i16 [[COL]] to i64165; CHECK-NEXT: [[TMP7:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 [[COL]], ptr [[TMP0]], i64 [[TMP6]])166; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 [[COL]], ptr [[BUF:%.*]], i64 1024, x86_amx [[TMP7]])167; CHECK-NEXT: br label [[EXIT]]168; CHECK: exit:169; CHECK-NEXT: ret void170;171entry:172 br i1 poison, label %l1, label %l2173 174l1:175 %t1 = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 %col)176 %t2 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t1)177 br i1 poison, label %l2, label %exit178 179l2:180 %t3 = phi <256 x i32> [ zeroinitializer, %entry ], [ %t2, %l1 ]181 %t4 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t3)182 call void @llvm.x86.tilestored64.internal(i16 8, i16 %col, ptr %buf, i64 1024, x86_amx %t4)183 br label %exit184 185exit:186 ret void187}188 189define void @noshape(ptr%buf) {190; CHECK-LABEL: @noshape(191; CHECK-NEXT: entry:192; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 64193; CHECK-NEXT: br i1 poison, label [[L1:%.*]], label [[L2:%.*]]194; CHECK: l1:195; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)196; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr [[TMP0]], i64 32, x86_amx [[T1]])197; CHECK-NEXT: [[TMP2:%.*]] = load <256 x i32>, ptr [[TMP0]], align 1024198; CHECK-NEXT: br i1 poison, label [[L2]], label [[EXIT:%.*]]199; CHECK: l2:200; CHECK-NEXT: [[T3:%.*]] = phi <256 x i32> [ poison, [[ENTRY:%.*]] ], [ [[TMP2]], [[L1]] ]201; CHECK-NEXT: store <256 x i32> [[T3]], ptr [[BUF:%.*]], align 1024202; CHECK-NEXT: br label [[EXIT]]203; CHECK: exit:204; CHECK-NEXT: ret void205;206entry:207 br i1 poison, label %l1, label %l2208 209l1:210 %t1 = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)211 %t2 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t1)212 br i1 poison, label %l2, label %exit213 214l2:215 %t3 = phi <256 x i32> [ poison, %entry ], [ %t2, %l1 ]216 %t4 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t3)217 %t5 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t4)218 store <256 x i32> %t5, ptr %buf219 br label %exit220 221exit:222 ret void223}224 225define void @noshape2(ptr%buf) {226; CHECK-LABEL: @noshape2(227; CHECK-NEXT: entry:228; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 64229; CHECK-NEXT: br i1 poison, label [[L1:%.*]], label [[L2:%.*]]230; CHECK: l1:231; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)232; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr [[TMP0]], i64 32, x86_amx [[T1]])233; CHECK-NEXT: [[TMP2:%.*]] = load <256 x i32>, ptr [[TMP0]], align 1024234; CHECK-NEXT: br i1 poison, label [[L2]], label [[EXIT:%.*]]235; CHECK: l2:236; CHECK-NEXT: [[T3:%.*]] = phi <256 x i32> [ poison, [[ENTRY:%.*]] ], [ [[TMP2]], [[L1]] ]237; CHECK-NEXT: [[T6:%.*]] = call <256 x i32> @llvm.abs.v256i32(<256 x i32> [[T3]], i1 true)238; CHECK-NEXT: store <256 x i32> [[T6]], ptr [[BUF:%.*]], align 1024239; CHECK-NEXT: br label [[EXIT]]240; CHECK: exit:241; CHECK-NEXT: ret void242;243entry:244 br i1 poison, label %l1, label %l2245 246l1:247 %t1 = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)248 %t2 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t1)249 br i1 poison, label %l2, label %exit250 251l2:252 %t3 = phi <256 x i32> [ poison, %entry ], [ %t2, %l1 ]253 %t4 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t3)254 %t5 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t4)255 %t6 = call <256 x i32> @llvm.abs.v256i32(<256 x i32> %t5, i1 1)256 store <256 x i32> %t6, ptr %buf257 br label %exit258 259exit:260 ret void261}262 263declare <256 x i32> @llvm.abs.v256i32(<256 x i32>, i1)264declare x86_amx @llvm.x86.tilezero.internal(i16, i16)265declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, ptr, i64)266declare <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx)267declare x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32>)268declare void @llvm.x86.tilestored64.internal(i16, i16, ptr, i64, x86_amx)269declare x86_amx @llvm.x86.tdpbssd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)270