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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=x86_64-- -mattr=+amx-tile -run-pass=fastpretileconfig -o - %s | FileCheck %s3#4# This case test tile phi is nested accessed, but the its def block is5# not visited yet.6#7# BB.58# %6 = phi(%3, b%10) <-----9# | | |10# | | |11# BB.6 BB.7 |12# \ / |13# \ / |14# \ / |15# BB.8 -------------16# %10 = phi(%8, %9)17#18# #define STRIDE 3219# void foo(int cond, char *buf) {20# __tile1024i a = {16, 64};21# __tile1024i b = {16, 64};22# __tile1024i c = {16, 64};23#24# if (cond) {25# __tile_zero(&c);26# } else {27# __tile_loadd(&c, buf, STRIDE);28# }29# __tile_zero(&a);30# __tile_zero(&b);31# for(int i = 0; i < 10; i++) {32# __tile_dpbssd(&c, a, b);33# if (cond) {34# __tile_zero(&c);35# } else {36# __tile_loadd(&c, buf, STRIDE);37# }38# }39# __tile_stored(buf, STRIDE, c);40# }41---42name: foo43alignment: 1644tracksRegLiveness: true45registers:46 - { id: 0, class: gr8 }47 - { id: 1, class: tile }48 - { id: 2, class: tile }49 - { id: 3, class: tile }50 - { id: 4, class: tile }51 - { id: 5, class: tile }52 - { id: 6, class: gr32 }53 - { id: 7, class: tile }54 - { id: 8, class: tile }55 - { id: 9, class: tile }56 - { id: 10, class: tile }57 - { id: 11, class: gr32 }58 - { id: 12, class: gr32 }59 - { id: 13, class: gr32 }60 - { id: 14, class: gr64 }61 - { id: 15, class: gr64 }62 - { id: 16, class: gr8 }63 - { id: 17, class: gr16 }64 - { id: 18, class: gr16 }65 - { id: 19, class: gr64_nosp }66 - { id: 20, class: gr16 }67 - { id: 21, class: gr16 }68 - { id: 22, class: gr32 }69 - { id: 23, class: gr16 }70 - { id: 24, class: gr16 }71 - { id: 25, class: gr16 }72 - { id: 26, class: gr16 }73 - { id: 27, class: gr16 }74 - { id: 28, class: gr16 }75 - { id: 29, class: tile }76 - { id: 30, class: gr16 }77 - { id: 31, class: gr16 }78 - { id: 32, class: gr64_nosp }79 - { id: 33, class: gr16 }80 - { id: 34, class: gr16 }81 - { id: 35, class: gr32 }82 - { id: 36, class: gr64_nosp }83 - { id: 37, class: gr16 }84 - { id: 38, class: gr16 }85liveins:86 - { reg: '$edi', virtual-reg: '%12' }87 - { reg: '$rsi', virtual-reg: '%14' }88frameInfo:89 maxAlignment: 190machineFunctionInfo:91 amxProgModel: ManagedRA92body: |93 ; CHECK-LABEL: name: foo94 ; CHECK: bb.0.entry:95 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)96 ; CHECK-NEXT: liveins: $edi, $rsi97 ; CHECK-NEXT: {{ $}}98 ; CHECK-NEXT: [[V_SET0_:%[0-9]+]]:vr128 = V_SET099 ; CHECK-NEXT: MOVUPSmr %stack.1, 1, $noreg, 0, $noreg, [[V_SET0_]] :: (store (s512) into %stack.1, align 4)100 ; CHECK-NEXT: MOVUPSmr %stack.1, 1, $noreg, 16, $noreg, [[V_SET0_]] :: (store (s512) into %stack.1 + 16, align 4)101 ; CHECK-NEXT: MOVUPSmr %stack.1, 1, $noreg, 32, $noreg, [[V_SET0_]] :: (store (s512) into %stack.1 + 32, align 4)102 ; CHECK-NEXT: MOVUPSmr %stack.1, 1, $noreg, 48, $noreg, [[V_SET0_]] :: (store (s512) into %stack.1 + 48, align 4)103 ; CHECK-NEXT: MOV8mi %stack.1, 1, $noreg, 0, $noreg, 1 :: (store (s512) into %stack.1, align 4)104 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rsi105 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $edi106 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY killed [[COPY1]]107 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr64 = COPY killed [[COPY]]108 ; CHECK-NEXT: CMP32ri8 [[COPY2]], 0, implicit-def $eflags109 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags110 ; CHECK-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags111 ; CHECK-NEXT: JCC_1 %bb.2, 5, implicit $eflags112 ; CHECK-NEXT: {{ $}}113 ; CHECK-NEXT: bb.1:114 ; CHECK-NEXT: successors: %bb.3(0x80000000)115 ; CHECK-NEXT: {{ $}}116 ; CHECK-NEXT: [[MOV16ri:%[0-9]+]]:gr16 = MOV16ri 64117 ; CHECK-NEXT: [[MOV16ri1:%[0-9]+]]:gr16 = MOV16ri 16118 ; CHECK-NEXT: PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)119 ; CHECK-NEXT: [[LEA64r:%[0-9]+]]:gr64_nosp = LEA64r %stack.0, 1, $noreg, 0, $noreg120 ; CHECK-NEXT: [[PTILEZEROV:%[0-9]+]]:tile = PTILEZEROV [[MOV16ri1]], [[MOV16ri]]121 ; CHECK-NEXT: [[MOV64ri:%[0-9]+]]:gr64_nosp = MOV64ri 64122 ; CHECK-NEXT: TILESTORED %stack.0, 1, killed [[MOV64ri]], 0, $noreg, [[PTILEZEROV]] :: (store (s8192) into %stack.0)123 ; CHECK-NEXT: JMP_1 %bb.3124 ; CHECK-NEXT: {{ $}}125 ; CHECK-NEXT: bb.2:126 ; CHECK-NEXT: successors: %bb.3(0x80000000)127 ; CHECK-NEXT: {{ $}}128 ; CHECK-NEXT: [[MOV32ri64_:%[0-9]+]]:gr64_nosp = MOV32ri64 32129 ; CHECK-NEXT: [[MOV16ri2:%[0-9]+]]:gr16 = MOV16ri 64130 ; CHECK-NEXT: [[MOV16ri3:%[0-9]+]]:gr16 = MOV16ri 16131 ; CHECK-NEXT: PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)132 ; CHECK-NEXT: [[LEA64r1:%[0-9]+]]:gr64_nosp = LEA64r %stack.2, 1, $noreg, 0, $noreg133 ; CHECK-NEXT: [[PTILELOADDV:%[0-9]+]]:tile = PTILELOADDV [[MOV16ri3]], [[MOV16ri2]], [[COPY3]], 1, killed [[MOV32ri64_]], 0, $noreg134 ; CHECK-NEXT: [[MOV64ri1:%[0-9]+]]:gr64_nosp = MOV64ri 64135 ; CHECK-NEXT: TILESTORED %stack.2, 1, killed [[MOV64ri1]], 0, $noreg, [[PTILELOADDV]] :: (store (s8192) into %stack.2)136 ; CHECK-NEXT: {{ $}}137 ; CHECK-NEXT: bb.3:138 ; CHECK-NEXT: successors: %bb.5(0x80000000)139 ; CHECK-NEXT: {{ $}}140 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gr16 = PHI [[MOV16ri]], %bb.1, [[MOV16ri2]], %bb.2141 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gr16 = PHI [[MOV16ri1]], %bb.1, [[MOV16ri3]], %bb.2142 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gr64_nosp = PHI [[LEA64r]], %bb.1, [[LEA64r1]], %bb.2143 ; CHECK-NEXT: PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)144 ; CHECK-NEXT: [[MOV64ri2:%[0-9]+]]:gr64_nosp = MOV64ri 64145 ; CHECK-NEXT: [[LEA64r2:%[0-9]+]]:gr64_nosp = LEA64r %stack.5, 1, $noreg, 0, $noreg146 ; CHECK-NEXT: [[PTILELOADDV1:%[0-9]+]]:tile = PTILELOADDV [[PHI1]], [[PHI]], [[PHI2]], 1, killed [[MOV64ri2]], 0, $noreg147 ; CHECK-NEXT: [[MOV64ri3:%[0-9]+]]:gr64_nosp = MOV64ri 64148 ; CHECK-NEXT: TILESTORED %stack.5, 1, killed [[MOV64ri3]], 0, $noreg, [[PTILELOADDV1]] :: (store (s8192) into %stack.5)149 ; CHECK-NEXT: [[MOV16ri4:%[0-9]+]]:gr16 = MOV16ri 64150 ; CHECK-NEXT: [[MOV16ri5:%[0-9]+]]:gr16 = MOV16ri 16151 ; CHECK-NEXT: PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)152 ; CHECK-NEXT: [[PTILEZEROV1:%[0-9]+]]:tile = PTILEZEROV [[MOV16ri5]], [[MOV16ri4]]153 ; CHECK-NEXT: [[MOV64ri4:%[0-9]+]]:gr64_nosp = MOV64ri 64154 ; CHECK-NEXT: TILESTORED %stack.4, 1, killed [[MOV64ri4]], 0, $noreg, [[PTILEZEROV1]] :: (store (s8192) into %stack.4)155 ; CHECK-NEXT: [[MOV16ri6:%[0-9]+]]:gr16 = MOV16ri 64156 ; CHECK-NEXT: [[MOV16ri7:%[0-9]+]]:gr16 = MOV16ri 16157 ; CHECK-NEXT: PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)158 ; CHECK-NEXT: [[PTILEZEROV2:%[0-9]+]]:tile = PTILEZEROV [[MOV16ri7]], [[MOV16ri6]]159 ; CHECK-NEXT: [[MOV64ri5:%[0-9]+]]:gr64_nosp = MOV64ri 64160 ; CHECK-NEXT: TILESTORED %stack.3, 1, killed [[MOV64ri5]], 0, $noreg, [[PTILEZEROV2]] :: (store (s8192) into %stack.3)161 ; CHECK-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags162 ; CHECK-NEXT: JMP_1 %bb.5163 ; CHECK-NEXT: {{ $}}164 ; CHECK-NEXT: bb.4:165 ; CHECK-NEXT: PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)166 ; CHECK-NEXT: [[MOV32ri64_1:%[0-9]+]]:gr64_nosp = MOV32ri64 32167 ; CHECK-NEXT: [[MOV16ri8:%[0-9]+]]:gr16 = MOV16ri 64168 ; CHECK-NEXT: [[MOV16ri9:%[0-9]+]]:gr16 = MOV16ri 16169 ; CHECK-NEXT: [[MOV64ri6:%[0-9]+]]:gr64_nosp = MOV64ri 64170 ; CHECK-NEXT: [[PTILELOADDV2:%[0-9]+]]:tile = PTILELOADDV %59, %60, %stack.9, 1, killed [[MOV64ri6]], 0, $noreg :: (load (s8192) from %stack.9)171 ; CHECK-NEXT: PTILESTOREDV killed [[MOV16ri9]], killed [[MOV16ri8]], [[COPY3]], 1, killed [[MOV32ri64_1]], 0, $noreg, [[PTILELOADDV2]]172 ; CHECK-NEXT: RET64173 ; CHECK-NEXT: {{ $}}174 ; CHECK-NEXT: bb.5:175 ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.6(0x40000000)176 ; CHECK-NEXT: {{ $}}177 ; CHECK-NEXT: [[PHI3:%[0-9]+]]:gr32 = PHI [[MOV32r0_]], %bb.3, %35, %bb.8178 ; CHECK-NEXT: [[PHI4:%[0-9]+]]:gr16 = PHI [[PHI]], %bb.3, %60, %bb.8179 ; CHECK-NEXT: [[PHI5:%[0-9]+]]:gr16 = PHI [[PHI1]], %bb.3, %59, %bb.8180 ; CHECK-NEXT: [[PHI6:%[0-9]+]]:gr64_nosp = PHI [[LEA64r2]], %bb.3, %58, %bb.8181 ; CHECK-NEXT: PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)182 ; CHECK-NEXT: [[MOV64ri7:%[0-9]+]]:gr64_nosp = MOV64ri 64183 ; CHECK-NEXT: [[PTILELOADDV3:%[0-9]+]]:tile = PTILELOADDV [[PHI5]], [[PHI4]], [[PHI6]], 1, killed [[MOV64ri7]], 0, $noreg184 ; CHECK-NEXT: [[MOV64ri8:%[0-9]+]]:gr64_nosp = MOV64ri 64185 ; CHECK-NEXT: TILESTORED %stack.8, 1, killed [[MOV64ri8]], 0, $noreg, [[PTILELOADDV3]] :: (store (s8192) into %stack.8)186 ; CHECK-NEXT: [[MOV16ri10:%[0-9]+]]:gr16 = MOV16ri 64187 ; CHECK-NEXT: [[MOV16ri11:%[0-9]+]]:gr16 = MOV16ri 16188 ; CHECK-NEXT: PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)189 ; CHECK-NEXT: [[MOV64ri9:%[0-9]+]]:gr64_nosp = MOV64ri 64190 ; CHECK-NEXT: [[PTILELOADDV4:%[0-9]+]]:tile = PTILELOADDV [[MOV16ri7]], [[MOV16ri6]], %stack.3, 1, killed [[MOV64ri9]], 0, $noreg :: (load (s8192) from %stack.3)191 ; CHECK-NEXT: [[MOV64ri10:%[0-9]+]]:gr64_nosp = MOV64ri 64192 ; CHECK-NEXT: [[PTILELOADDV5:%[0-9]+]]:tile = PTILELOADDV [[MOV16ri5]], [[MOV16ri4]], %stack.4, 1, killed [[MOV64ri10]], 0, $noreg :: (load (s8192) from %stack.4)193 ; CHECK-NEXT: [[MOV64ri11:%[0-9]+]]:gr64_nosp = MOV64ri 64194 ; CHECK-NEXT: [[PTILELOADDV6:%[0-9]+]]:tile = PTILELOADDV [[PHI5]], [[PHI4]], %stack.8, 1, killed [[MOV64ri11]], 0, $noreg :: (load (s8192) from %stack.8)195 ; CHECK-NEXT: [[PTDPBSSDV:%[0-9]+]]:tile = PTDPBSSDV killed [[MOV16ri11]], [[MOV16ri10]], [[MOV16ri10]], [[PTILELOADDV6]], [[PTILELOADDV5]], [[PTILELOADDV4]]196 ; CHECK-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags197 ; CHECK-NEXT: JCC_1 %bb.7, 5, implicit $eflags198 ; CHECK-NEXT: {{ $}}199 ; CHECK-NEXT: bb.6:200 ; CHECK-NEXT: successors: %bb.8(0x80000000)201 ; CHECK-NEXT: {{ $}}202 ; CHECK-NEXT: [[MOV16ri12:%[0-9]+]]:gr16 = MOV16ri 64203 ; CHECK-NEXT: [[MOV16ri13:%[0-9]+]]:gr16 = MOV16ri 16204 ; CHECK-NEXT: PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)205 ; CHECK-NEXT: [[LEA64r3:%[0-9]+]]:gr64_nosp = LEA64r %stack.6, 1, $noreg, 0, $noreg206 ; CHECK-NEXT: [[PTILEZEROV3:%[0-9]+]]:tile = PTILEZEROV [[MOV16ri13]], [[MOV16ri12]]207 ; CHECK-NEXT: [[MOV64ri12:%[0-9]+]]:gr64_nosp = MOV64ri 64208 ; CHECK-NEXT: TILESTORED %stack.6, 1, killed [[MOV64ri12]], 0, $noreg, [[PTILEZEROV3]] :: (store (s8192) into %stack.6)209 ; CHECK-NEXT: JMP_1 %bb.8210 ; CHECK-NEXT: {{ $}}211 ; CHECK-NEXT: bb.7:212 ; CHECK-NEXT: successors: %bb.8(0x80000000)213 ; CHECK-NEXT: {{ $}}214 ; CHECK-NEXT: [[MOV32ri64_2:%[0-9]+]]:gr64_nosp = MOV32ri64 32215 ; CHECK-NEXT: [[MOV16ri14:%[0-9]+]]:gr16 = MOV16ri 64216 ; CHECK-NEXT: [[MOV16ri15:%[0-9]+]]:gr16 = MOV16ri 16217 ; CHECK-NEXT: PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)218 ; CHECK-NEXT: [[LEA64r4:%[0-9]+]]:gr64_nosp = LEA64r %stack.7, 1, $noreg, 0, $noreg219 ; CHECK-NEXT: [[PTILELOADDV7:%[0-9]+]]:tile = PTILELOADDV [[MOV16ri15]], [[MOV16ri14]], [[COPY3]], 1, killed [[MOV32ri64_2]], 0, $noreg220 ; CHECK-NEXT: [[MOV64ri13:%[0-9]+]]:gr64_nosp = MOV64ri 64221 ; CHECK-NEXT: TILESTORED %stack.7, 1, killed [[MOV64ri13]], 0, $noreg, [[PTILELOADDV7]] :: (store (s8192) into %stack.7)222 ; CHECK-NEXT: {{ $}}223 ; CHECK-NEXT: bb.8:224 ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.5(0x40000000)225 ; CHECK-NEXT: {{ $}}226 ; CHECK-NEXT: [[PHI7:%[0-9]+]]:gr16 = PHI [[MOV16ri12]], %bb.6, [[MOV16ri14]], %bb.7227 ; CHECK-NEXT: [[PHI8:%[0-9]+]]:gr16 = PHI [[MOV16ri13]], %bb.6, [[MOV16ri15]], %bb.7228 ; CHECK-NEXT: [[PHI9:%[0-9]+]]:gr64_nosp = PHI [[LEA64r3]], %bb.6, [[LEA64r4]], %bb.7229 ; CHECK-NEXT: PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)230 ; CHECK-NEXT: [[MOV64ri14:%[0-9]+]]:gr64_nosp = MOV64ri 64231 ; CHECK-NEXT: [[PTILELOADDV8:%[0-9]+]]:tile = PTILELOADDV [[PHI8]], [[PHI7]], [[PHI9]], 1, killed [[MOV64ri14]], 0, $noreg232 ; CHECK-NEXT: [[MOV64ri15:%[0-9]+]]:gr64_nosp = MOV64ri 64233 ; CHECK-NEXT: TILESTORED %stack.9, 1, killed [[MOV64ri15]], 0, $noreg, [[PTILELOADDV8]] :: (store (s8192) into %stack.9)234 ; CHECK-NEXT: [[ADD32ri8_:%[0-9]+]]:gr32 = ADD32ri8 [[PHI3]], 1, implicit-def $eflags235 ; CHECK-NEXT: CMP32ri8 [[ADD32ri8_]], 10, implicit-def $eflags236 ; CHECK-NEXT: JCC_1 %bb.4, 4, implicit $eflags237 ; CHECK-NEXT: JMP_1 %bb.5238 bb.0.entry:239 liveins: $edi, $rsi240 241 %14:gr64 = COPY $rsi242 %12:gr32 = COPY $edi243 %13:gr32 = COPY killed %12244 %15:gr64 = COPY killed %14245 CMP32ri8 %13, 0, implicit-def $eflags246 %16:gr8 = SETCCr 4, implicit $eflags247 TEST8ri %16, 1, implicit-def $eflags248 JCC_1 %bb.2, 5, implicit $eflags249 250 bb.1:251 %17:gr16 = MOV16ri 64252 %18:gr16 = MOV16ri 16253 %1:tile = PTILEZEROV killed %18, killed %17254 JMP_1 %bb.3255 256 bb.2:257 %19:gr64_nosp = MOV32ri64 32258 %20:gr16 = MOV16ri 64259 %21:gr16 = MOV16ri 16260 %2:tile = PTILELOADDV killed %21, killed %20, %15, 1, killed %19, 0, $noreg261 262 bb.3:263 264 %3:tile = PHI %1, %bb.1, %2, %bb.2265 %25:gr16 = MOV16ri 64266 %26:gr16 = MOV16ri 16267 %4:tile = PTILEZEROV killed %26, killed %25268 %23:gr16 = MOV16ri 64269 %24:gr16 = MOV16ri 16270 %5:tile = PTILEZEROV killed %24, killed %23271 %22:gr32 = MOV32r0 implicit-def $eflags272 JMP_1 %bb.5273 274 bb.4:275 %36:gr64_nosp = MOV32ri64 32276 %37:gr16 = MOV16ri 64277 %38:gr16 = MOV16ri 16278 PTILESTOREDV killed %38, killed %37, %15, 1, killed %36, 0, $noreg, %10279 RET64280 281 bb.5:282 283 %6:gr32 = PHI %22, %bb.3, %35, %bb.8284 %7:tile = PHI %3, %bb.3, %10, %bb.8285 %27:gr16 = MOV16ri 64286 %28:gr16 = MOV16ri 16287 %29:tile = PTDPBSSDV killed %28, %27, %27, %7, %4, %5288 TEST8ri %16, 1, implicit-def $eflags289 JCC_1 %bb.7, 5, implicit $eflags290 291 bb.6:292 %30:gr16 = MOV16ri 64293 %31:gr16 = MOV16ri 16294 %8:tile = PTILEZEROV killed %31, killed %30295 JMP_1 %bb.8296 297 bb.7:298 %32:gr64_nosp = MOV32ri64 32299 %33:gr16 = MOV16ri 64300 %34:gr16 = MOV16ri 16301 %9:tile = PTILELOADDV killed %34, killed %33, %15, 1, killed %32, 0, $noreg302 303 bb.8:304 305 %10:tile = PHI %8, %bb.6, %9, %bb.7306 %35:gr32 = ADD32ri8 %6, 1, implicit-def $eflags307 CMP32ri8 %35, 10, implicit-def $eflags308 JCC_1 %bb.4, 4, implicit $eflags309 JMP_1 %bb.5310 311...312