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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=x86_64-- -mattr=+amx-tile -run-pass=fastpretileconfig -o - %s | FileCheck %s3#4#             bb.05#            def %06#          /        \7#       bb.1         bb.2   <---------8#      def %1       %2=phi(%0, %3)   |9#           \      /                 |10#             bb.3 -------------------11#         %3=phi(%1, %2)12#13# This case test tile PHIs depend each other, and the its def block is14# not visited yet.15---16name:            foo17alignment:       1618tracksRegLiveness: true19registers:20  - { id: 1, class: tile }21  - { id: 2, class: tile }22  - { id: 3, class: tile }23  - { id: 4, class: tile }24  - { id: 12, class: gr32 }25  - { id: 13, class: gr32 }26  - { id: 16, class: gr8 }27  - { id: 17, class: gr16 }28  - { id: 18, class: gr16 }29  - { id: 19, class: gr64_nosp }30  - { id: 22, class: gr32 }31  - { id: 23, class: gr16 }32  - { id: 24, class: gr16 }33liveins:34  - { reg: '$edi', virtual-reg: '%12' }35frameInfo:36  maxAlignment:    137machineFunctionInfo:38  amxProgModel: ManagedRA39body:             |40  ; CHECK-LABEL: name: foo41  ; CHECK: bb.0.entry:42  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)43  ; CHECK-NEXT:   liveins: $edi44  ; CHECK-NEXT: {{  $}}45  ; CHECK-NEXT:   [[V_SET0_:%[0-9]+]]:vr128 = V_SET046  ; CHECK-NEXT:   MOVUPSmr %stack.1, 1, $noreg, 0, $noreg, [[V_SET0_]] :: (store (s512) into %stack.1, align 4)47  ; CHECK-NEXT:   MOVUPSmr %stack.1, 1, $noreg, 16, $noreg, [[V_SET0_]] :: (store (s512) into %stack.1 + 16, align 4)48  ; CHECK-NEXT:   MOVUPSmr %stack.1, 1, $noreg, 32, $noreg, [[V_SET0_]] :: (store (s512) into %stack.1 + 32, align 4)49  ; CHECK-NEXT:   MOVUPSmr %stack.1, 1, $noreg, 48, $noreg, [[V_SET0_]] :: (store (s512) into %stack.1 + 48, align 4)50  ; CHECK-NEXT:   MOV8mi %stack.1, 1, $noreg, 0, $noreg, 1 :: (store (s512) into %stack.1, align 4)51  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY $edi52  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY killed [[COPY]]53  ; CHECK-NEXT:   %r0:gr16 = MOV16ri 6454  ; CHECK-NEXT:   %c0:gr16 = MOV16ri 1655  ; CHECK-NEXT:   PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)56  ; CHECK-NEXT:   [[LEA64r:%[0-9]+]]:gr64_nosp = LEA64r %stack.0, 1, $noreg, 0, $noreg57  ; CHECK-NEXT:   %t0:tile = PTILEZEROV %r0, %c058  ; CHECK-NEXT:   [[MOV64ri:%[0-9]+]]:gr64_nosp = MOV64ri 6459  ; CHECK-NEXT:   TILESTORED %stack.0, 1, killed [[MOV64ri]], 0, $noreg, %t0 :: (store (s8192) into %stack.0)60  ; CHECK-NEXT:   CMP32ri8 [[COPY1]], 0, implicit-def $eflags61  ; CHECK-NEXT:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags62  ; CHECK-NEXT:   TEST8ri [[SETCCr]], 1, implicit-def $eflags63  ; CHECK-NEXT:   JCC_1 %bb.2, 5, implicit $eflags64  ; CHECK-NEXT: {{  $}}65  ; CHECK-NEXT: bb.1:66  ; CHECK-NEXT:   successors: %bb.3(0x80000000)67  ; CHECK-NEXT: {{  $}}68  ; CHECK-NEXT:   [[MOV16ri:%[0-9]+]]:gr16 = MOV16ri 6469  ; CHECK-NEXT:   [[MOV16ri1:%[0-9]+]]:gr16 = MOV16ri 1670  ; CHECK-NEXT:   PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)71  ; CHECK-NEXT:   [[LEA64r1:%[0-9]+]]:gr64_nosp = LEA64r %stack.2, 1, $noreg, 0, $noreg72  ; CHECK-NEXT:   [[PTILEZEROV:%[0-9]+]]:tile = PTILEZEROV [[MOV16ri1]], [[MOV16ri]]73  ; CHECK-NEXT:   [[MOV64ri1:%[0-9]+]]:gr64_nosp = MOV64ri 6474  ; CHECK-NEXT:   TILESTORED %stack.2, 1, killed [[MOV64ri1]], 0, $noreg, [[PTILEZEROV]] :: (store (s8192) into %stack.2)75  ; CHECK-NEXT:   JMP_1 %bb.376  ; CHECK-NEXT: {{  $}}77  ; CHECK-NEXT: bb.2:78  ; CHECK-NEXT:   successors: %bb.3(0x80000000)79  ; CHECK-NEXT: {{  $}}80  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:gr16 = PHI %c0, %bb.0, %24, %bb.381  ; CHECK-NEXT:   [[PHI1:%[0-9]+]]:gr16 = PHI %r0, %bb.0, %23, %bb.382  ; CHECK-NEXT:   [[PHI2:%[0-9]+]]:gr64_nosp = PHI [[LEA64r]], %bb.0, %22, %bb.383  ; CHECK-NEXT:   PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)84  ; CHECK-NEXT:   [[MOV64ri2:%[0-9]+]]:gr64_nosp = MOV64ri 6485  ; CHECK-NEXT:   [[PTILELOADDV:%[0-9]+]]:tile = PTILELOADDV [[PHI1]], [[PHI]], [[PHI2]], 1, killed [[MOV64ri2]], 0, $noreg86  ; CHECK-NEXT:   [[MOV64ri3:%[0-9]+]]:gr64_nosp = MOV64ri 6487  ; CHECK-NEXT:   TILESTORED %stack.3, 1, killed [[MOV64ri3]], 0, $noreg, [[PTILELOADDV]] :: (store (s8192) into %stack.3)88  ; CHECK-NEXT:   [[MOV32ri64_:%[0-9]+]]:gr64_nosp = MOV32ri64 3289  ; CHECK-NEXT: {{  $}}90  ; CHECK-NEXT: bb.3:91  ; CHECK-NEXT:   successors: %bb.2(0x80000000)92  ; CHECK-NEXT: {{  $}}93  ; CHECK-NEXT:   [[PHI3:%[0-9]+]]:gr16 = PHI [[MOV16ri]], %bb.1, [[PHI]], %bb.294  ; CHECK-NEXT:   [[PHI4:%[0-9]+]]:gr16 = PHI [[MOV16ri1]], %bb.1, [[PHI1]], %bb.295  ; CHECK-NEXT:   [[PHI5:%[0-9]+]]:gr64_nosp = PHI [[LEA64r1]], %bb.1, [[PHI2]], %bb.296  ; CHECK-NEXT:   PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.1, align 4)97  ; CHECK-NEXT:   [[MOV64ri4:%[0-9]+]]:gr64_nosp = MOV64ri 6498  ; CHECK-NEXT:   [[PTILELOADDV1:%[0-9]+]]:tile = PTILELOADDV [[PHI4]], [[PHI3]], [[PHI5]], 1, killed [[MOV64ri4]], 0, $noreg99  ; CHECK-NEXT:   [[MOV64ri5:%[0-9]+]]:gr64_nosp = MOV64ri 64100  ; CHECK-NEXT:   TILESTORED %stack.4, 1, killed [[MOV64ri5]], 0, $noreg, [[PTILELOADDV1]] :: (store (s8192) into %stack.4)101  ; CHECK-NEXT:   [[MOV16ri2:%[0-9]+]]:gr16 = MOV16ri 64102  ; CHECK-NEXT:   [[MOV16ri3:%[0-9]+]]:gr16 = MOV16ri 16103  ; CHECK-NEXT:   JMP_1 %bb.2104  bb.0.entry:105    liveins: $edi106 107    %12:gr32 = COPY $edi108    %13:gr32 = COPY killed %12109    %r0:gr16 = MOV16ri 64110    %c0:gr16 = MOV16ri 16111    %t0:tile = PTILEZEROV killed %r0, killed %c0112    CMP32ri8 %13, 0, implicit-def $eflags113    %16:gr8 = SETCCr 4, implicit $eflags114    TEST8ri %16, 1, implicit-def $eflags115    JCC_1 %bb.2, 5, implicit $eflags116 117  bb.1:118    %17:gr16 = MOV16ri 64119    %18:gr16 = MOV16ri 16120    %1:tile = PTILEZEROV killed %18, killed %17121    JMP_1 %bb.3122 123  bb.2:124    %2:tile = PHI %t0, %bb.0, %3, %bb.3125    %19:gr64_nosp = MOV32ri64 32126 127  bb.3:128    %3:tile = PHI %1, %bb.1, %2, %bb.2129    %23:gr16 = MOV16ri 64130    %24:gr16 = MOV16ri 16131    JMP_1 %bb.2132