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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-int8,+amx-fp16,+avx512f -verify-machineinstrs | FileCheck %s3 4define void @test_amx(ptr %pointer, ptr %base, i64 %stride) {5; CHECK-LABEL: test_amx:6; CHECK: # %bb.0:7; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm08; CHECK-NEXT: vmovups %zmm0, -{{[0-9]+}}(%rsp)9; CHECK-NEXT: movb $1, -{{[0-9]+}}(%rsp)10; CHECK-NEXT: movb $8, -{{[0-9]+}}(%rsp)11; CHECK-NEXT: movw $8, -{{[0-9]+}}(%rsp)12; CHECK-NEXT: movb $8, -{{[0-9]+}}(%rsp)13; CHECK-NEXT: movw $8, -{{[0-9]+}}(%rsp)14; CHECK-NEXT: movb $8, -{{[0-9]+}}(%rsp)15; CHECK-NEXT: movw $8, -{{[0-9]+}}(%rsp)16; CHECK-NEXT: ldtilecfg -{{[0-9]+}}(%rsp)17; CHECK-NEXT: movw $8, %ax18; CHECK-NEXT: tileloadd (%rsi,%rdx), %tmm019; CHECK-NEXT: tileloadd (%rsi,%rdx), %tmm120; CHECK-NEXT: tilezero %tmm221; CHECK-NEXT: tdpfp16ps %tmm1, %tmm0, %tmm222; CHECK-NEXT: tileloaddt1 (%rsi,%rdx), %tmm023; CHECK-NEXT: tilestored %tmm2, (%rdi,%rdx)24; CHECK-NEXT: tilerelease25; CHECK-NEXT: vzeroupper26; CHECK-NEXT: retq27 %a = call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 8, ptr %base, i64 %stride)28 %b = call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 8, ptr %base, i64 %stride)29 %c = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 8)30 %d = call x86_amx @llvm.x86.tdpfp16ps.internal(i16 8, i16 8, i16 8, x86_amx %c, x86_amx %a, x86_amx %b)31 %e = call x86_amx @llvm.x86.tileloaddt164.internal(i16 8, i16 8, ptr %base, i64 %stride)32 call void @llvm.x86.tilestored64.internal(i16 8, i16 8, ptr %pointer, i64 %stride, x86_amx %d)33 34 ret void35}36 37declare x86_amx @llvm.x86.tilezero.internal(i16, i16)38declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, ptr, i64)39declare x86_amx @llvm.x86.tileloaddt164.internal(i16, i16, ptr, i64)40declare x86_amx @llvm.x86.tdpfp16ps.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)41declare void @llvm.x86.tilestored64.internal(i16, i16, ptr, i64, x86_amx)42