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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=x86_64-- -mattr=+amx-int8,avx512f -run-pass="fastpretileconfig,regallocfast,fasttileconfig" -verify-machineinstrs -o - %s | FileCheck %s3 4# Test to verify that ldtilecfg instructions are sinked closer to tile defining5# instructions after a call. This ensures call does not overwrite values in6# registers being used for configuring the AMX tile.7 8...9---10name: test_api11alignment: 1612tracksRegLiveness: true13registers:14 - { id: 0, class: gr64, preferred-register: '', flags: [ ] }15 - { id: 1, class: gr64, preferred-register: '', flags: [ ] }16 - { id: 2, class: gr64, preferred-register: '', flags: [ ] }17 - { id: 3, class: gr64, preferred-register: '', flags: [ ] }18 - { id: 4, class: tile, preferred-register: '', flags: [ ] }19 - { id: 5, class: gr64_nosp, preferred-register: '', flags: [ ] }20 - { id: 6, class: gr64, preferred-register: '', flags: [ ] }21 - { id: 9, class: gr64_nosp, preferred-register: '', flags: [ ] }22 - { id: 10, class: gr64, preferred-register: '', flags: [ ] }23 - { id: 13, class: tile, preferred-register: '', flags: [ ] }24 - { id: 14, class: gr64_nosp, preferred-register: '', flags: [ ] }25 - { id: 15, class: gr64, preferred-register: '', flags: [ ] }26 - { id: 18, class: gr64, preferred-register: '', flags: [ ] }27 - { id: 19, class: gr64_nosp, preferred-register: '', flags: [ ] }28 - { id: 22, class: gr64, preferred-register: '', flags: [ ] }29 - { id: 23, class: gr64, preferred-register: '', flags: [ ] }30 - { id: 24, class: gr64, preferred-register: '', flags: [ ] }31 - { id: 25, class: tile, preferred-register: '', flags: [ ] }32 - { id: 26, class: gr64_nosp, preferred-register: '', flags: [ ] }33 - { id: 29, class: gr64_nosp, preferred-register: '', flags: [ ] }34 - { id: 30, class: gr64, preferred-register: '', flags: [ ] }35 - { id: 33, class: tile, preferred-register: '', flags: [ ] }36 - { id: 34, class: gr64_nosp, preferred-register: '', flags: [ ] }37 - { id: 35, class: gr64, preferred-register: '', flags: [ ] }38 - { id: 38, class: gr64_nosp, preferred-register: '', flags: [ ] }39 - { id: 39, class: gr64, preferred-register: '', flags: [ ] }40 - { id: 40, class: gr16, preferred-register: '', flags: [ ] }41 - { id: 41, class: gr16, preferred-register: '', flags: [ ] }42liveins:43 - { reg: '$rdi', virtual-reg: '%0' }44 - { reg: '$rsi', virtual-reg: '%2' }45frameInfo:46 adjustsStack: true47 maxAlignment: 102448stack:49 - { id: 0, size: 1024, alignment: 1024 }50 - { id: 1, size: 1024, alignment: 1024 }51 - { id: 2, size: 32, alignment: 32 }52 - { id: 3, size: 32, alignment: 32 }53 - { id: 4, size: 8, alignment: 8 }54machineFunctionInfo:55 amxProgModel: ManagedRA56body: |57 bb.0.entry:58 liveins: $rdi, $rsi59 60 ; CHECK-LABEL: name: test_api61 ; CHECK: liveins: $rdi, $rsi62 ; CHECK-NEXT: {{ $}}63 ; CHECK-NEXT: renamable $zmm0 = AVX512_512_SET064 ; CHECK-NEXT: VMOVUPSZmr %stack.5, 1, $noreg, 0, $noreg, killed renamable $zmm0 :: (store (s512) into %stack.5, align 4)65 ; CHECK-NEXT: MOV8mi %stack.5, 1, $noreg, 0, $noreg, 1 :: (store (s512) into %stack.5, align 4)66 ; CHECK-NEXT: MOV64mr %stack.8, 1, $noreg, 0, $noreg, $rsi :: (store (s64) into %stack.8)67 ; CHECK-NEXT: renamable $rsi = MOV32ri64 1668 ; CHECK-NEXT: renamable $rdx = LEA64r %stack.2, 1, $noreg, 0, $noreg69 ; CHECK-NEXT: renamable $cx = MOV16ri 1670 ; CHECK-NEXT: MOV16mr %stack.7, 1, $noreg, 0, $noreg, $cx :: (store (s16) into %stack.7)71 ; CHECK-NEXT: renamable $ax = MOV16ri 272 ; CHECK-NEXT: MOV16mr %stack.6, 1, $noreg, 0, $noreg, $ax :: (store (s16) into %stack.6)73 ; CHECK-NEXT: $al = IMPLICIT_DEF74 ; CHECK-NEXT: MOV8mr %stack.5, 1, $noreg, 48, $noreg, $al :: (store (s512) into %stack.5 + 48, align 4)75 ; CHECK-NEXT: MOV16mr %stack.5, 1, $noreg, 16, $noreg, $cx :: (store (s512) into %stack.5 + 16, align 4)76 ; CHECK-NEXT: $al = IMPLICIT_DEF77 ; CHECK-NEXT: MOV8mr %stack.5, 1, $noreg, 48, $noreg, $al :: (store (s512) into %stack.5 + 48, align 4)78 ; CHECK-NEXT: MOV16mr %stack.5, 1, $noreg, 16, $noreg, $cx :: (store (s512) into %stack.5 + 16, align 4)79 ; CHECK-NEXT: PLDTILECFGV %stack.5, 1, $noreg, 0, $noreg, implicit-def dead $tmm0, implicit-def dead $tmm1, implicit-def dead $tmm2, implicit-def dead $tmm3, implicit-def dead $tmm4, implicit-def dead $tmm5, implicit-def dead $tmm6, implicit-def dead $tmm7 :: (load (s512) from %stack.5, align 4)80 ; CHECK-NEXT: renamable $tmm0 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg81 ; CHECK-NEXT: renamable $rsi = MOV32ri64 6482 ; CHECK-NEXT: renamable $rdx = LEA64r %stack.1, 1, $noreg, 0, $noreg83 ; CHECK-NEXT: PTILESTOREDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm084 ; CHECK-NEXT: renamable $rsi = MOV32ri64 6485 ; CHECK-NEXT: renamable $rdx = LEA64r %stack.1, 1, $noreg, 0, $noreg86 ; CHECK-NEXT: renamable $tmm0 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg87 ; CHECK-NEXT: renamable $rdx = MOV32ri64 1688 ; CHECK-NEXT: PTILESTOREDV renamable $ax, renamable $cx, killed renamable $rdi, 1, killed renamable $rdx, 0, $noreg, killed renamable $tmm089 ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def dead $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp90 ; CHECK-NEXT: CALL64pcrel32 &foo, csr_64, implicit $rsp, implicit $ssp, implicit-def $rax91 ; CHECK-NEXT: $rsi = MOV64rm %stack.8, 1, $noreg, 0, $noreg :: (load (s64) from %stack.8)92 ; CHECK-NEXT: $cx = MOV16rm %stack.7, 1, $noreg, 0, $noreg :: (load (s16) from %stack.7)93 ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def dead $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp94 ; CHECK-NEXT: renamable $rdx = COPY $rax95 ; CHECK-NEXT: $ax = MOV16rm %stack.6, 1, $noreg, 0, $noreg :: (load (s16) from %stack.6)96 ; CHECK-NEXT: MOV64mr killed renamable $rsi, 1, $noreg, 0, $noreg, killed renamable $rdx97 ; CHECK-NEXT: renamable $rdx = MOV64rm %stack.4, 1, $noreg, 0, $noreg98 ; CHECK-NEXT: renamable $rsi = MOV32ri64 1699 ; CHECK-NEXT: $al = IMPLICIT_DEF100 ; CHECK-NEXT: MOV8mr %stack.5, 1, $noreg, 48, $noreg, $al :: (store (s512) into %stack.5 + 48, align 4)101 ; CHECK-NEXT: MOV16mr %stack.5, 1, $noreg, 16, $noreg, $cx :: (store (s512) into %stack.5 + 16, align 4)102 ; CHECK-NEXT: $al = IMPLICIT_DEF103 ; CHECK-NEXT: MOV8mr %stack.5, 1, $noreg, 48, $noreg, $al :: (store (s512) into %stack.5 + 48, align 4)104 ; CHECK-NEXT: MOV16mr %stack.5, 1, $noreg, 16, $noreg, $cx :: (store (s512) into %stack.5 + 16, align 4)105 ; CHECK-NEXT: PLDTILECFGV %stack.5, 1, $noreg, 0, $noreg, implicit-def dead $tmm0, implicit-def dead $tmm1, implicit-def dead $tmm2, implicit-def dead $tmm3, implicit-def dead $tmm4, implicit-def dead $tmm5, implicit-def dead $tmm6, implicit-def dead $tmm7 :: (load (s512) from %stack.5, align 4)106 ; CHECK-NEXT: renamable $tmm0 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg107 ; CHECK-NEXT: renamable $rsi = MOV32ri64 64108 ; CHECK-NEXT: renamable $rdx = LEA64r %stack.0, 1, $noreg, 0, $noreg109 ; CHECK-NEXT: PTILESTOREDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm0110 ; CHECK-NEXT: renamable $rsi = MOV32ri64 64111 ; CHECK-NEXT: renamable $rdx = LEA64r %stack.0, 1, $noreg, 0, $noreg112 ; CHECK-NEXT: renamable $tmm0 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg113 ; CHECK-NEXT: renamable $rsi = MOV32ri64 16114 ; CHECK-NEXT: renamable $rdx = LEA64r %stack.4, 1, $noreg, 0, $noreg115 ; CHECK-NEXT: PTILESTOREDV killed renamable $ax, killed renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm0116 ; CHECK-NEXT: RET64117 %2:gr64 = COPY $rsi118 %0:gr64 = COPY $rdi119 %1:gr64 = COPY killed %0120 %3:gr64 = COPY killed %2121 %38:gr64_nosp = MOV32ri64 16122 %39:gr64 = LEA64r %stack.2, 1, $noreg, 0, $noreg123 %40:gr16 = MOV16ri 16124 %41:gr16 = MOV16ri 2125 %33:tile = PTILELOADDV %41:gr16, %40:gr16, killed %39, 1, killed %38, 0, $noreg126 %34:gr64_nosp = MOV32ri64 64127 %35:gr64 = LEA64r %stack.1, 1, $noreg, 0, $noreg128 PTILESTOREDV %41:gr16, %40:gr16, killed %35, 1, killed %34, 0, $noreg, %33129 %29:gr64_nosp = MOV32ri64 64130 %30:gr64 = LEA64r %stack.1, 1, $noreg, 0, $noreg131 %25:tile = PTILELOADDV %41:gr16, %40:gr16, killed %30, 1, killed %29, 0, $noreg132 %26:gr64_nosp = MOV32ri64 16133 PTILESTOREDV %41:gr16, %40:gr16, %1, 1, killed %26, 0, $noreg, %25134 ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp135 CALL64pcrel32 &foo, csr_64, implicit $rsp, implicit $ssp, implicit-def $rax136 ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp137 %24:gr64 = COPY $rax138 MOV64mr %3, 1, $noreg, 0, $noreg, %24139 %22:gr64 = MOV64rm %stack.4, 1, $noreg, 0, $noreg140 %19:gr64_nosp = MOV32ri64 16141 %13:tile = PTILELOADDV %41:gr16, %40:gr16, %22, 1, killed %19, 0, $noreg142 %14:gr64_nosp = MOV32ri64 64143 %15:gr64 = LEA64r %stack.0, 1, $noreg, 0, $noreg144 PTILESTOREDV %41:gr16, %40:gr16, killed %15, 1, killed %14, 0, $noreg, %13145 %9:gr64_nosp = MOV32ri64 64146 %10:gr64 = LEA64r %stack.0, 1, $noreg, 0, $noreg147 %4:tile = PTILELOADDV %41:gr16, %40:gr16, killed %10, 1, killed %9, 0, $noreg148 %5:gr64_nosp = MOV32ri64 16149 %6:gr64 = LEA64r %stack.4, 1, $noreg, 0, $noreg150 PTILESTOREDV %41:gr16, %40:gr16, killed %6, 1, killed %5, 0, $noreg, %4151 RET64152...153