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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -verify-machineinstrs | FileCheck %s3; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -verify-machineinstrs | FileCheck %s4; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+egpr -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefix=EGPR5 6define void @test_amx(ptr %pointer, ptr %base, i64 %stride) {7; CHECK-LABEL: test_amx:8; CHECK: # %bb.0:9; CHECK-NEXT: ldtilecfg (%rdi)10; CHECK-NEXT: sttilecfg (%rdi)11; CHECK-NEXT: tilerelease12; CHECK-NEXT: tilezero %tmm313; CHECK-NEXT: tileloadd (%rsi,%rdx), %tmm314; CHECK-NEXT: tileloaddt1 (%rsi,%rdx), %tmm315; CHECK-NEXT: tilestored %tmm3, (%rsi,%rdx)16; CHECK-NEXT: retq17;18; EGPR-LABEL: test_amx:19; EGPR: # %bb.0:20; EGPR-NEXT: ldtilecfg (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0x49,0x07]21; EGPR-NEXT: sttilecfg (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x49,0x07]22; EGPR-NEXT: tilerelease # encoding: [0xc4,0xe2,0x78,0x49,0xc0]23; EGPR-NEXT: tilezero %tmm3 # encoding: [0xc4,0xe2,0x7b,0x49,0xd8]24; EGPR-NEXT: tileloadd (%rsi,%rdx), %tmm3 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7b,0x4b,0x1c,0x16]25; EGPR-NEXT: tileloaddt1 (%rsi,%rdx), %tmm3 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x4b,0x1c,0x16]26; EGPR-NEXT: tilestored %tmm3, (%rsi,%rdx) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7a,0x4b,0x1c,0x16]27; EGPR-NEXT: retq # encoding: [0xc3]28 call void @llvm.x86.ldtilecfg(ptr %pointer)29 30 call void @llvm.x86.sttilecfg(ptr %pointer)31 32 call void @llvm.x86.tilerelease()33 34 call void @llvm.x86.tilezero(i8 3)35 36 call void @llvm.x86.tileloadd64(i8 3, ptr %base, i64 %stride)37 38 call void @llvm.x86.tileloaddt164(i8 3, ptr %base, i64 %stride)39 40 call void @llvm.x86.tilestored64(i8 3, ptr %base, i64 %stride)41 ret void42}43 44declare void @llvm.x86.tileloadd64(i8 %tile, ptr %base, i64 %stride)45declare void @llvm.x86.tileloaddt164(i8 %tile, ptr %base, i64 %stride)46declare void @llvm.x86.tilestored64(i8 %tile, ptr %base, i64 %stride)47declare void @llvm.x86.ldtilecfg(ptr %pointer)48declare void @llvm.x86.sttilecfg(ptr %pointer)49declare void @llvm.x86.tilerelease()50declare void @llvm.x86.tilezero(i8 %tile)51