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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt --codegen-opt-level=2 -mtriple=x86_64 -x86-lower-amx-type %s -S | FileCheck %s3; RUN: opt --codegen-opt-level=2 -mtriple=x86_64 -passes=x86-lower-amx-type %s -S | FileCheck %s4 5define void @combine_amx_cast_inside_bb() {6; CHECK-LABEL: @combine_amx_cast_inside_bb(7; CHECK-NEXT: wrapper_entry:8; CHECK-NEXT: [[TMP0:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr undef, i64 undef)9; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx [[TMP0]])10; CHECK-NEXT: ret void11;12wrapper_entry:13 %0 = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr undef, i64 undef)14 %tmp = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %0)15 %1 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> %tmp)16 call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx %1)17 ret void18}19 20; Cases where amxcast can be combined across bb21; %5 and %6 is combined together since %goodphi's incoming is phi or amxcast22define void @combine_amx_cast_and_phi(i1 %arg) {23; CHECK-LABEL: @combine_amx_cast_and_phi(24; CHECK-NEXT: wrapper_entry:25; CHECK-NEXT: [[TMP0:%.*]] = alloca <560 x i8>, align 6426; CHECK-NEXT: [[TMP1:%.*]] = alloca <616 x i8>, align 6427; CHECK-NEXT: [[TMP2:%.*]] = alloca <110 x i32>, align 6428; CHECK-NEXT: [[TMP3:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr undef, i64 undef)29; CHECK-NEXT: br i1 [[ARG:%.*]], label [[FOR_COND_CLEANUP_I_I:%.*]], label [[FOR_BODY_I_LR_PH_I:%.*]]30; CHECK: for.body.i.lr.ph.i:31; CHECK-NEXT: store <110 x i32> undef, ptr [[TMP2]], align 51232; CHECK-NEXT: [[TMP5:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr [[TMP2]], i64 40)33; CHECK-NEXT: store <616 x i8> undef, ptr [[TMP1]], align 102434; CHECK-NEXT: [[TMP7:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 56, ptr [[TMP1]], i64 56)35; CHECK-NEXT: store <560 x i8> undef, ptr [[TMP0]], align 102436; CHECK-NEXT: [[TMP9:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 14, i16 40, ptr [[TMP0]], i64 40)37; CHECK-NEXT: [[TMP10:%.*]] = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx [[TMP5]], x86_amx [[TMP7]], x86_amx [[TMP9]])38; CHECK-NEXT: br label [[FOR_COND_CLEANUP_I_I]]39; CHECK: for.cond.cleanup.i.i:40; CHECK-NEXT: [[TMP11:%.*]] = phi x86_amx [ [[TMP3]], [[WRAPPER_ENTRY:%.*]] ], [ [[TMP10]], [[FOR_BODY_I_LR_PH_I]] ]41; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx [[TMP11]])42; CHECK-NEXT: ret void43;44wrapper_entry:45 %0 = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr undef, i64 undef)46 %tmp = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %0)47 br i1 %arg, label %for.cond.cleanup.i.i, label %for.body.i.lr.ph.i48 49for.body.i.lr.ph.i: ; preds = %wrapper_entry50 %1 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> undef)51 %2 = call x86_amx @llvm.x86.cast.vector.to.tile.v616i8(<616 x i8> undef)52 %3 = call x86_amx @llvm.x86.cast.vector.to.tile.v560i8(<560 x i8> undef)53 %4 = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx %1, x86_amx %2, x86_amx %3)54 %5 = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %4)55 br label %for.cond.cleanup.i.i56 57for.cond.cleanup.i.i: ; preds = %for.body.i.lr.ph.i, %wrapper_entry58 %goodphi = phi <110 x i32> [ %tmp, %wrapper_entry ], [ %5, %for.body.i.lr.ph.i ]59 %6 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> %goodphi)60 call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx %6)61 ret void62}63 64; Cases where amxcast can't be combined across bb65; %5 and %6 is not combined together since %evilphi's incoming is not phi or amxcast66define void @fail_to_combine_amx_cast_and_phi(<110 x i32> %tmp, i1 %arg) {67; CHECK-LABEL: @fail_to_combine_amx_cast_and_phi(68; CHECK-NEXT: wrapper_entry:69; CHECK-NEXT: [[TMP0:%.*]] = alloca <110 x i32>, align 6470; CHECK-NEXT: [[TMP1:%.*]] = alloca <110 x i32>, align 6471; CHECK-NEXT: [[TMP2:%.*]] = alloca <560 x i8>, align 6472; CHECK-NEXT: [[TMP3:%.*]] = alloca <616 x i8>, align 6473; CHECK-NEXT: [[TMP4:%.*]] = alloca <110 x i32>, align 6474; CHECK-NEXT: [[TMP5:%.*]] = add <110 x i32> [[TMP:%.*]], [[TMP]]75; CHECK-NEXT: br i1 [[ARG:%.*]], label [[FOR_COND_CLEANUP_I_I:%.*]], label [[FOR_BODY_I_LR_PH_I:%.*]]76; CHECK: for.body.i.lr.ph.i:77; CHECK-NEXT: store <110 x i32> undef, ptr [[TMP4]], align 51278; CHECK-NEXT: [[TMP7:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr [[TMP4]], i64 40)79; CHECK-NEXT: store <616 x i8> undef, ptr [[TMP3]], align 102480; CHECK-NEXT: [[TMP9:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 56, ptr [[TMP3]], i64 56)81; CHECK-NEXT: store <560 x i8> undef, ptr [[TMP2]], align 102482; CHECK-NEXT: [[TMP11:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 14, i16 40, ptr [[TMP2]], i64 40)83; CHECK-NEXT: [[TMP12:%.*]] = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx [[TMP7]], x86_amx [[TMP9]], x86_amx [[TMP11]])84; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr [[TMP1]], i64 40, x86_amx [[TMP12]])85; CHECK-NEXT: [[TMP14:%.*]] = load <110 x i32>, ptr [[TMP1]], align 51286; CHECK-NEXT: br label [[FOR_COND_CLEANUP_I_I]]87; CHECK: for.cond.cleanup.i.i:88; CHECK-NEXT: [[EVILPHI:%.*]] = phi <110 x i32> [ [[TMP5]], [[WRAPPER_ENTRY:%.*]] ], [ [[TMP14]], [[FOR_BODY_I_LR_PH_I]] ]89; CHECK-NEXT: store <110 x i32> [[EVILPHI]], ptr [[TMP0]], align 51290; CHECK-NEXT: [[TMP16:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr [[TMP0]], i64 40)91; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx [[TMP16]])92; CHECK-NEXT: ret void93;94wrapper_entry:95 %0 = add <110 x i32> %tmp, %tmp96 br i1 %arg, label %for.cond.cleanup.i.i, label %for.body.i.lr.ph.i97 98for.body.i.lr.ph.i: ; preds = %wrapper_entry99 %1 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> undef)100 %2 = call x86_amx @llvm.x86.cast.vector.to.tile.v616i8(<616 x i8> undef)101 %3 = call x86_amx @llvm.x86.cast.vector.to.tile.v560i8(<560 x i8> undef)102 %4 = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx %1, x86_amx %2, x86_amx %3)103 %5 = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %4)104 br label %for.cond.cleanup.i.i105 106for.cond.cleanup.i.i: ; preds = %for.body.i.lr.ph.i, %wrapper_entry107 %evilphi = phi <110 x i32> [ %0, %wrapper_entry ], [ %5, %for.body.i.lr.ph.i ]108 %6 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> %evilphi)109 call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx %6)110 ret void111}112 113; Cases where amxcast can't be combined across bb114; %5 and %6 is not combined together since %evilphi's user aka %evilphi2 is not inside phi web.115define void @fail_to_combine_amx_cast_and_phi2(i1 %arg) {116; CHECK-LABEL: @fail_to_combine_amx_cast_and_phi2(117; CHECK-NEXT: wrapper_entry:118; CHECK-NEXT: [[TMP0:%.*]] = alloca <110 x i32>, align 64119; CHECK-NEXT: [[TMP1:%.*]] = alloca <110 x i32>, align 64120; CHECK-NEXT: [[TMP2:%.*]] = alloca <560 x i8>, align 64121; CHECK-NEXT: [[TMP3:%.*]] = alloca <616 x i8>, align 64122; CHECK-NEXT: [[TMP4:%.*]] = alloca <110 x i32>, align 64123; CHECK-NEXT: [[TMP5:%.*]] = alloca <110 x i32>, align 64124; CHECK-NEXT: [[TMP6:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr undef, i64 undef)125; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr [[TMP5]], i64 40, x86_amx [[TMP6]])126; CHECK-NEXT: [[TMP8:%.*]] = load <110 x i32>, ptr [[TMP5]], align 512127; CHECK-NEXT: br i1 [[ARG:%.*]], label [[FOR_COND_CLEANUP_I_I:%.*]], label [[FOR_BODY_I_LR_PH_I:%.*]]128; CHECK: for.body.i.lr.ph.i:129; CHECK-NEXT: store <110 x i32> undef, ptr [[TMP4]], align 512130; CHECK-NEXT: [[TMP10:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr [[TMP4]], i64 40)131; CHECK-NEXT: store <616 x i8> undef, ptr [[TMP3]], align 1024132; CHECK-NEXT: [[TMP12:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 56, ptr [[TMP3]], i64 56)133; CHECK-NEXT: store <560 x i8> undef, ptr [[TMP2]], align 1024134; CHECK-NEXT: [[TMP14:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 14, i16 40, ptr [[TMP2]], i64 40)135; CHECK-NEXT: [[TMP15:%.*]] = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx [[TMP10]], x86_amx [[TMP12]], x86_amx [[TMP14]])136; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr [[TMP1]], i64 40, x86_amx [[TMP15]])137; CHECK-NEXT: [[TMP17:%.*]] = load <110 x i32>, ptr [[TMP1]], align 512138; CHECK-NEXT: br i1 [[ARG]], label [[FOR_COND_CLEANUP_I_I]], label [[EXIT:%.*]]139; CHECK: for.cond.cleanup.i.i:140; CHECK-NEXT: [[GOODPHI:%.*]] = phi <110 x i32> [ [[TMP8]], [[WRAPPER_ENTRY:%.*]] ], [ [[TMP17]], [[FOR_BODY_I_LR_PH_I]] ]141; CHECK-NEXT: store <110 x i32> [[GOODPHI]], ptr [[TMP0]], align 512142; CHECK-NEXT: [[TMP19:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr [[TMP0]], i64 40)143; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx [[TMP19]])144; CHECK-NEXT: br i1 [[ARG]], label [[EXIT]], label [[FOR_BODY_I_LR_PH_I]]145; CHECK: exit:146; CHECK-NEXT: [[EVILPHI2:%.*]] = phi <110 x i32> [ [[GOODPHI]], [[FOR_COND_CLEANUP_I_I]] ], [ [[TMP17]], [[FOR_BODY_I_LR_PH_I]] ]147; CHECK-NEXT: store <110 x i32> [[EVILPHI2]], ptr undef, align 512148; CHECK-NEXT: ret void149;150wrapper_entry:151 %0 = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr undef, i64 undef)152 %tmp = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %0)153 br i1 %arg, label %for.cond.cleanup.i.i, label %for.body.i.lr.ph.i154 155for.body.i.lr.ph.i: ; preds = %wrapper_entry156 %1 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> undef)157 %2 = call x86_amx @llvm.x86.cast.vector.to.tile.v616i8(<616 x i8> undef)158 %3 = call x86_amx @llvm.x86.cast.vector.to.tile.v560i8(<560 x i8> undef)159 %4 = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx %1, x86_amx %2, x86_amx %3)160 %5 = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %4)161 br i1 %arg, label %for.cond.cleanup.i.i, label %exit162 163for.cond.cleanup.i.i: ; preds = %for.body.i.lr.ph.i, %wrapper_entry164 %goodphi = phi <110 x i32> [ %tmp, %wrapper_entry ], [ %5, %for.body.i.lr.ph.i ]165 %6 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> %goodphi)166 call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx %6)167 br i1 %arg, label %exit, label %for.body.i.lr.ph.i168exit:169 %evilphi2 = phi <110 x i32> [ %goodphi, %for.cond.cleanup.i.i ], [ %5, %for.body.i.lr.ph.i ]170 store <110 x i32> %evilphi2, ptr undef, align 512171 ret void172}173 174define void @fail_to_combine_amx_cast_and_phi_due_to_const_value(i1 %arg) {175; CHECK-LABEL: @fail_to_combine_amx_cast_and_phi_due_to_const_value(176; CHECK-NEXT: wrapper_entry:177; CHECK-NEXT: [[TMP0:%.*]] = alloca <560 x i8>, align 64178; CHECK-NEXT: [[TMP1:%.*]] = alloca <616 x i8>, align 64179; CHECK-NEXT: [[TMP2:%.*]] = alloca <110 x i32>, align 64180; CHECK-NEXT: [[TMP3:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 11, i16 40)181; CHECK-NEXT: br i1 [[ARG:%.*]], label [[FOR_COND_CLEANUP_I_I:%.*]], label [[FOR_BODY_I_LR_PH_I:%.*]]182; CHECK: for.body.i.lr.ph.i:183; CHECK-NEXT: store <110 x i32> undef, ptr [[TMP2]], align 512184; CHECK-NEXT: [[TMP5:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr [[TMP2]], i64 40)185; CHECK-NEXT: store <616 x i8> undef, ptr [[TMP1]], align 1024186; CHECK-NEXT: [[TMP7:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 56, ptr [[TMP1]], i64 56)187; CHECK-NEXT: store <560 x i8> undef, ptr [[TMP0]], align 1024188; CHECK-NEXT: [[TMP9:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 14, i16 40, ptr [[TMP0]], i64 40)189; CHECK-NEXT: [[TMP10:%.*]] = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx [[TMP5]], x86_amx [[TMP7]], x86_amx [[TMP9]])190; CHECK-NEXT: br label [[FOR_COND_CLEANUP_I_I]]191; CHECK: for.cond.cleanup.i.i:192; CHECK-NEXT: [[TMP11:%.*]] = phi x86_amx [ [[TMP3]], [[WRAPPER_ENTRY:%.*]] ], [ [[TMP10]], [[FOR_BODY_I_LR_PH_I]] ]193; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx [[TMP11]])194; CHECK-NEXT: ret void195;196wrapper_entry:197 br i1 %arg, label %for.cond.cleanup.i.i, label %for.body.i.lr.ph.i198 199for.body.i.lr.ph.i: ; preds = %wrapper_entry200 %0 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> undef)201 %1 = call x86_amx @llvm.x86.cast.vector.to.tile.v616i8(<616 x i8> undef)202 %2 = call x86_amx @llvm.x86.cast.vector.to.tile.v560i8(<560 x i8> undef)203 %3 = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx %0, x86_amx %1, x86_amx %2)204 %4 = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %3)205 br label %for.cond.cleanup.i.i206 207for.cond.cleanup.i.i: ; preds = %for.body.i.lr.ph.i, %wrapper_entry208 %evilphi = phi <110 x i32> [ undef, %wrapper_entry ], [ %4, %for.body.i.lr.ph.i ]209 %5 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> %evilphi)210 call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx %5)211 ret void212}213 214; Cases where amxcast can be combined across bb215; When optimizeAMXCastFromPhi process %6 and %goodphi, %goodphi2 is outside the phi-web, so the optimization stop216; When optimizeAMXCastFromPhi process %7 and %goodphi2, the optimization continue.217define void @combine_amx_cast_and_multiple_phi(i1 %arg) {218; CHECK-LABEL: @combine_amx_cast_and_multiple_phi(219; CHECK-NEXT: wrapper_entry:220; CHECK-NEXT: [[TMP0:%.*]] = alloca <560 x i8>, align 64221; CHECK-NEXT: [[TMP1:%.*]] = alloca <616 x i8>, align 64222; CHECK-NEXT: [[TMP2:%.*]] = alloca <110 x i32>, align 64223; CHECK-NEXT: [[TMP3:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr undef, i64 undef)224; CHECK-NEXT: br i1 [[ARG:%.*]], label [[FOR_COND_CLEANUP_I_I:%.*]], label [[FOR_BODY_I_LR_PH_I:%.*]]225; CHECK: for.body.i.lr.ph.i:226; CHECK-NEXT: store <110 x i32> undef, ptr [[TMP2]], align 512227; CHECK-NEXT: [[TMP5:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr [[TMP2]], i64 40)228; CHECK-NEXT: store <616 x i8> undef, ptr [[TMP1]], align 1024229; CHECK-NEXT: [[TMP7:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 56, ptr [[TMP1]], i64 56)230; CHECK-NEXT: store <560 x i8> undef, ptr [[TMP0]], align 1024231; CHECK-NEXT: [[TMP9:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 14, i16 40, ptr [[TMP0]], i64 40)232; CHECK-NEXT: [[TMP10:%.*]] = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx [[TMP5]], x86_amx [[TMP7]], x86_amx [[TMP9]])233; CHECK-NEXT: br i1 [[ARG]], label [[FOR_COND_CLEANUP_I_I]], label [[EXIT:%.*]]234; CHECK: for.cond.cleanup.i.i:235; CHECK-NEXT: [[TMP11:%.*]] = phi x86_amx [ [[TMP3]], [[WRAPPER_ENTRY:%.*]] ], [ [[TMP10]], [[FOR_BODY_I_LR_PH_I]] ]236; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx [[TMP11]])237; CHECK-NEXT: br i1 [[ARG]], label [[EXIT]], label [[FOR_BODY_I_LR_PH_I]]238; CHECK: exit:239; CHECK-NEXT: [[TMP12:%.*]] = phi x86_amx [ [[TMP11]], [[FOR_COND_CLEANUP_I_I]] ], [ [[TMP10]], [[FOR_BODY_I_LR_PH_I]] ]240; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx [[TMP12]])241; CHECK-NEXT: ret void242;243wrapper_entry:244 %0 = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr undef, i64 undef)245 %tmp = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %0)246 br i1 %arg, label %for.cond.cleanup.i.i, label %for.body.i.lr.ph.i247 248for.body.i.lr.ph.i: ; preds = %wrapper_entry249 %1 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> undef)250 %2 = call x86_amx @llvm.x86.cast.vector.to.tile.v616i8(<616 x i8> undef)251 %3 = call x86_amx @llvm.x86.cast.vector.to.tile.v560i8(<560 x i8> undef)252 %4 = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx %1, x86_amx %2, x86_amx %3)253 %5 = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %4)254 br i1 %arg, label %for.cond.cleanup.i.i, label %exit255 256for.cond.cleanup.i.i: ; preds = %for.body.i.lr.ph.i, %wrapper_entry257 %goodphi = phi <110 x i32> [ %tmp, %wrapper_entry ], [ %5, %for.body.i.lr.ph.i ]258 %6 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> %goodphi)259 call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx %6)260 br i1 %arg, label %exit, label %for.body.i.lr.ph.i261exit:262 %evilphi2 = phi <110 x i32> [ %goodphi, %for.cond.cleanup.i.i ], [ %5, %for.body.i.lr.ph.i ]263 %7 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> %evilphi2)264 call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx %7)265 ret void266}267 268; Currently we are not able to delete DeadPHICycle, later we will handle with them269define void @combine_amx_cast_and_phi_in_a_circle(i1 %arg) {270; CHECK-LABEL: @combine_amx_cast_and_phi_in_a_circle(271; CHECK-NEXT: wrapper_entry:272; CHECK-NEXT: [[TMP0:%.*]] = alloca <110 x i32>, align 64273; CHECK-NEXT: [[TMP1:%.*]] = alloca <560 x i8>, align 64274; CHECK-NEXT: [[TMP2:%.*]] = alloca <616 x i8>, align 64275; CHECK-NEXT: [[TMP3:%.*]] = alloca <110 x i32>, align 64276; CHECK-NEXT: [[TMP4:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr undef, i64 undef)277; CHECK-NEXT: br label [[BB1:%.*]]278; CHECK: bb1:279; CHECK-NEXT: store <110 x i32> undef, ptr [[TMP3]], align 512280; CHECK-NEXT: [[TMP6:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr [[TMP3]], i64 40)281; CHECK-NEXT: store <616 x i8> undef, ptr [[TMP2]], align 1024282; CHECK-NEXT: [[TMP8:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 56, ptr [[TMP2]], i64 56)283; CHECK-NEXT: store <560 x i8> undef, ptr [[TMP1]], align 1024284; CHECK-NEXT: [[TMP10:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 14, i16 40, ptr [[TMP1]], i64 40)285; CHECK-NEXT: [[TMP11:%.*]] = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx [[TMP6]], x86_amx [[TMP8]], x86_amx [[TMP10]])286; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr [[TMP0]], i64 40, x86_amx [[TMP11]])287; CHECK-NEXT: [[TMP13:%.*]] = load <110 x i32>, ptr [[TMP0]], align 512288; CHECK-NEXT: br i1 [[ARG:%.*]], label [[BB2:%.*]], label [[BB3:%.*]]289; CHECK: bb2:290; CHECK-NEXT: [[TMP14:%.*]] = phi x86_amx [ [[TMP15:%.*]], [[BB3]] ], [ [[TMP11]], [[BB1]] ]291; CHECK-NEXT: [[GOODPHI:%.*]] = phi <110 x i32> [ [[EVILPHI2:%.*]], [[BB3]] ], [ [[TMP13]], [[BB1]] ]292; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx [[TMP14]])293; CHECK-NEXT: br label [[BB3]]294; CHECK: bb3:295; CHECK-NEXT: [[TMP15]] = phi x86_amx [ [[TMP14]], [[BB2]] ], [ [[TMP11]], [[BB1]] ]296; CHECK-NEXT: [[EVILPHI2]] = phi <110 x i32> [ [[GOODPHI]], [[BB2]] ], [ [[TMP13]], [[BB1]] ]297; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx [[TMP15]])298; CHECK-NEXT: br i1 [[ARG]], label [[BB2]], label [[EXIT:%.*]]299; CHECK: exit:300; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx [[TMP15]])301; CHECK-NEXT: ret void302;303wrapper_entry:304 %0 = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr undef, i64 undef)305 %tmp = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %0)306 br label %bb1307 308bb1: ; preds = %wrapper_entry309 %1 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> undef)310 %2 = call x86_amx @llvm.x86.cast.vector.to.tile.v616i8(<616 x i8> undef)311 %3 = call x86_amx @llvm.x86.cast.vector.to.tile.v560i8(<560 x i8> undef)312 %4 = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx %1, x86_amx %2, x86_amx %3)313 %5 = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %4)314 br i1 %arg, label %bb2, label %bb3315 316bb2: ; preds = %bb1, %wrapper_entry317 %goodphi = phi <110 x i32> [ %evilphi2, %bb3], [ %5, %bb1 ]318 %6 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> %goodphi)319 call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx %6)320 br label %bb3321bb3:322 %evilphi2 = phi <110 x i32> [ %goodphi, %bb2 ], [ %5, %bb1 ]323 %7 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> %evilphi2)324 call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx %7)325 br i1 %arg, label %bb2, label %exit326exit:327 %8 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> %evilphi2)328 call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx %8)329 ret void330}331 332define void @eliminate_unused_phi_and_cast(i1 %arg) {333; CHECK-LABEL: @eliminate_unused_phi_and_cast(334; CHECK-NEXT: wrapper_entry:335; CHECK-NEXT: [[TMP0:%.*]] = alloca <560 x i8>, align 64336; CHECK-NEXT: [[TMP1:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr undef, i64 undef)337; CHECK-NEXT: br i1 [[ARG:%.*]], label [[FOR_COND_CLEANUP_I_I:%.*]], label [[FOR_BODY_I_LR_PH_I:%.*]]338; CHECK: for.body.i.lr.ph.i:339; CHECK-NEXT: [[TMP2:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 56, ptr undef, i64 undef)340; CHECK-NEXT: [[TMP3:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 14, i16 40, ptr undef, i64 undef)341; CHECK-NEXT: store <560 x i8> undef, ptr [[TMP0]], align 1024342; CHECK-NEXT: [[TMP5:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 14, i16 40, ptr [[TMP0]], i64 40)343; CHECK-NEXT: [[TMP6:%.*]] = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx [[TMP2]], x86_amx [[TMP3]], x86_amx [[TMP5]])344; CHECK-NEXT: br label [[FOR_COND_CLEANUP_I_I]]345; CHECK: for.cond.cleanup.i.i:346; CHECK-NEXT: [[TMP7:%.*]] = phi x86_amx [ [[TMP1]], [[WRAPPER_ENTRY:%.*]] ], [ [[TMP6]], [[FOR_BODY_I_LR_PH_I]] ]347; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx [[TMP7]])348; CHECK-NEXT: ret void349;350wrapper_entry:351 %0 = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 40, ptr undef, i64 undef)352 %tmp = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %0)353 br i1 %arg, label %for.cond.cleanup.i.i, label %for.body.i.lr.ph.i354 355for.body.i.lr.ph.i: ; preds = %wrapper_entry356 %1 = call x86_amx @llvm.x86.tileloadd64.internal(i16 11, i16 56, ptr undef, i64 undef)357 %v1 = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %1)358 %2 = call x86_amx @llvm.x86.tileloadd64.internal(i16 14, i16 40, ptr undef, i64 undef)359 %v2 = call <616 x i8> @llvm.x86.cast.tile.to.vector.v616i8(x86_amx %2)360 %3 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> %v1)361 %4 = call x86_amx @llvm.x86.cast.vector.to.tile.v616i8(<616 x i8> %v2)362 %5 = call x86_amx @llvm.x86.cast.vector.to.tile.v560i8(<560 x i8> undef)363 %6 = call x86_amx @llvm.x86.tdpbssd.internal(i16 11, i16 40, i16 56, x86_amx %3, x86_amx %4, x86_amx %5)364 %7 = call <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx %6)365 br label %for.cond.cleanup.i.i366 367for.cond.cleanup.i.i: ; preds = %for.body.i.lr.ph.i, %wrapper_entry368 %goodphi = phi <110 x i32> [ %tmp, %wrapper_entry ], [ %7, %for.body.i.lr.ph.i ]369 %8 = call x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32> %goodphi)370 call void @llvm.x86.tilestored64.internal(i16 11, i16 40, ptr undef, i64 undef, x86_amx %8)371 ret void372}373 374declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, ptr, i64)375declare <110 x i32> @llvm.x86.cast.tile.to.vector.v110i32(x86_amx)376declare <616 x i8> @llvm.x86.cast.tile.to.vector.v616i8(x86_amx)377declare x86_amx @llvm.x86.cast.vector.to.tile.v110i32(<110 x i32>)378declare void @llvm.x86.tilestored64.internal(i16, i16, ptr, i64, x86_amx)379declare x86_amx @llvm.x86.cast.vector.to.tile.v616i8(<616 x i8>)380declare x86_amx @llvm.x86.cast.vector.to.tile.v560i8(<560 x i8>)381declare x86_amx @llvm.x86.tdpbssd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)382