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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt --codegen-opt-level=2 -mtriple=x86_64 -x86-lower-amx-type %s -S | FileCheck %s3; RUN: opt --codegen-opt-level=2 -mtriple=x86_64 -passes=x86-lower-amx-type %s -S | FileCheck %s4 5%struct.__tile_str = type { i16, i16, <256 x i32> }6 7@buf = dso_local global [1024 x i8] zeroinitializer, align 648@buf2 = dso_local global [1024 x i8] zeroinitializer, align 649 10; test bitcast x86_amx to <256 x i32>11define dso_local void @test_user_empty(i16 %m, i16 %n, ptr%buf, i64 %s) {12; CHECK-LABEL: @test_user_empty(13; CHECK-NEXT: entry:14; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M:%.*]], i16 [[N:%.*]], ptr [[BUF:%.*]], i64 [[S:%.*]])15; CHECK-NEXT: ret void16;17entry:18 %t1 = call x86_amx @llvm.x86.tileloadd64.internal(i16 %m, i16 %n, ptr %buf, i64 %s)19 %t2 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t1)20 ret void21}22 23; test bitcast <256 x i32> to x86_amx24define dso_local void @test_user_empty2(<256 x i32> %in) {25; CHECK-LABEL: @test_user_empty2(26; CHECK-NEXT: entry:27; CHECK-NEXT: ret void28;29entry:30 %t = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %in)31 ret void32}33 34define dso_local <256 x i32> @test_amx_load_bitcast_v256i32(ptr %in, i16 %m, i16 %n, ptr%buf, i64 %s) {35; CHECK-LABEL: @test_amx_load_bitcast_v256i32(36; CHECK-NEXT: entry:37; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 6438; CHECK-NEXT: [[T1:%.*]] = load <256 x i32>, ptr [[IN:%.*]], align 6439; CHECK-NEXT: store <256 x i32> [[T1]], ptr [[TMP0]], align 102440; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[N:%.*]] to i6441; CHECK-NEXT: [[TMP2:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M:%.*]], i16 [[N]], ptr [[TMP0]], i64 [[TMP1]])42; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[M]], i16 [[N]], ptr [[BUF:%.*]], i64 [[S:%.*]], x86_amx [[TMP2]])43; CHECK-NEXT: ret <256 x i32> [[T1]]44;45entry:46 %t1 = load <256 x i32>, ptr %in, align 6447 %t2 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t1)48 call void @llvm.x86.tilestored64.internal(i16 %m, i16 %n, ptr %buf, i64 %s, x86_amx %t2)49 ret <256 x i32> %t150}51 52define dso_local <225 x i32> @test_amx_load_bitcast_v225i32(ptr %in, i16 %m, i16 %n, ptr%buf, i64 %s) {53; CHECK-LABEL: @test_amx_load_bitcast_v225i32(54; CHECK-NEXT: entry:55; CHECK-NEXT: [[TMP0:%.*]] = alloca <225 x i32>, align 6456; CHECK-NEXT: [[T1:%.*]] = load <225 x i32>, ptr [[IN:%.*]], align 6457; CHECK-NEXT: store <225 x i32> [[T1]], ptr [[TMP0]], align 102458; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[N:%.*]] to i6459; CHECK-NEXT: [[TMP2:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M:%.*]], i16 [[N]], ptr [[TMP0]], i64 [[TMP1]])60; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[M]], i16 [[N]], ptr [[BUF:%.*]], i64 [[S:%.*]], x86_amx [[TMP2]])61; CHECK-NEXT: ret <225 x i32> [[T1]]62;63entry:64 %t1 = load <225 x i32>, ptr %in, align 6465 %t2 = call x86_amx @llvm.x86.cast.vector.to.tile.v225i32(<225 x i32> %t1)66 call void @llvm.x86.tilestored64.internal(i16 %m, i16 %n, ptr %buf, i64 %s, x86_amx %t2)67 ret <225 x i32> %t168}69 70define dso_local <256 x i32> @test_amx_bitcast_store(ptr %out, i16 %m, i16 %n, ptr%buf, i64 %s) {71; CHECK-LABEL: @test_amx_bitcast_store(72; CHECK-NEXT: entry:73; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 6474; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M:%.*]], i16 [[M]], ptr [[BUF:%.*]], i64 [[S:%.*]])75; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[M]] to i6476; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[M]], i16 [[M]], ptr [[TMP0]], i64 [[TMP1]], x86_amx [[T1]])77; CHECK-NEXT: [[TMP2:%.*]] = load <256 x i32>, ptr [[TMP0]], align 102478; CHECK-NEXT: [[TMP3:%.*]] = sext i16 [[M]] to i6479; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[M]], i16 [[M]], ptr [[OUT:%.*]], i64 [[TMP3]], x86_amx [[T1]])80; CHECK-NEXT: ret <256 x i32> [[TMP2]]81;82entry:83 %t1 = call x86_amx @llvm.x86.tileloadd64.internal(i16 %m, i16 %m, ptr %buf, i64 %s)84 %t2 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t1)85 store <256 x i32> %t2, ptr %out86 ret <256 x i32> %t287}88 89define dso_local void @test_src_add(<256 x i32> %x, <256 x i32> %y, i16 %r, i16 %c, ptr %buf, i64 %s) {90; CHECK-LABEL: @test_src_add(91; CHECK-NEXT: entry:92; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 6493; CHECK-NEXT: [[ADD:%.*]] = add <256 x i32> [[Y:%.*]], [[X:%.*]]94; CHECK-NEXT: store <256 x i32> [[ADD]], ptr [[TMP0]], align 102495; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[C:%.*]] to i6496; CHECK-NEXT: [[TMP2:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[R:%.*]], i16 [[C]], ptr [[TMP0]], i64 [[TMP1]])97; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[R]], i16 [[C]], ptr [[BUF:%.*]], i64 [[S:%.*]], x86_amx [[TMP2]])98; CHECK-NEXT: ret void99;100entry:101 %add = add <256 x i32> %y, %x102 %t = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %add)103 call void @llvm.x86.tilestored64.internal(i16 %r, i16 %c, ptr %buf, i64 %s, x86_amx %t)104 ret void105}106 107define dso_local void @test_src_add2(<256 x i32> %x, i16 %r, i16 %c, ptr %buf, i64 %s) {108; CHECK-LABEL: @test_src_add2(109; CHECK-NEXT: entry:110; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 64111; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[R:%.*]], i16 [[C:%.*]], ptr [[BUF:%.*]], i64 [[S:%.*]])112; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[C]] to i64113; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[R]], i16 [[C]], ptr [[TMP0]], i64 [[TMP1]], x86_amx [[T1]])114; CHECK-NEXT: [[TMP2:%.*]] = load <256 x i32>, ptr [[TMP0]], align 1024115; CHECK-NEXT: [[ADD:%.*]] = add <256 x i32> [[TMP2]], [[X:%.*]]116; CHECK-NEXT: ret void117;118entry:119 %t1 = call x86_amx @llvm.x86.tileloadd64.internal(i16 %r, i16 %c, ptr %buf, i64 %s)120 %t2 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t1)121 %add = add <256 x i32> %t2, %x122 ret void123}124 125define dso_local void @__tile_loadd(ptr nocapture %0, ptr %1, i64 %2) local_unnamed_addr {126; CHECK-LABEL: @__tile_loadd(127; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr [[TMP0:%.*]], align 64128; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TILE_STR:%.*]], ptr [[TMP0]], i64 0, i32 1129; CHECK-NEXT: [[TMP6:%.*]] = load i16, ptr [[TMP5]], align 2130; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP2:%.*]], 32131; CHECK-NEXT: [[TMP8:%.*]] = ashr exact i64 [[TMP7]], 32132; CHECK-NEXT: [[TMP9:%.*]] = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 [[TMP4]], i16 [[TMP6]], ptr [[TMP1:%.*]], i64 [[TMP8]])133; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TILE_STR]], ptr [[TMP0]], i64 0, i32 2134; CHECK-NEXT: [[TMP11:%.*]] = sext i16 [[TMP6]] to i64135; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[TMP4]], i16 [[TMP6]], ptr [[TMP10]], i64 [[TMP11]], x86_amx [[TMP9]])136; CHECK-NEXT: ret void137;138 %4 = load i16, ptr %0, align 64139 %5 = getelementptr inbounds %struct.__tile_str, ptr %0, i64 0, i32 1140 %6 = load i16, ptr %5, align 2141 %7 = shl i64 %2, 32142 %8 = ashr exact i64 %7, 32143 %9 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %4, i16 %6, ptr %1, i64 %8)144 %10 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %9)145 %11 = getelementptr inbounds %struct.__tile_str, ptr %0, i64 0, i32 2146 store <256 x i32> %10, ptr %11, align 64147 ret void148}149 150define dso_local void @__tile_dpbssd(ptr nocapture %0, ptr nocapture readonly byval(%struct.__tile_str) align 64 %1, ptr nocapture readonly byval(%struct.__tile_str) align 64 %2) local_unnamed_addr {151; CHECK-LABEL: @__tile_dpbssd(152; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr [[TMP1:%.*]], align 64153; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TILE_STR:%.*]], ptr [[TMP2:%.*]], i64 0, i32 1154; CHECK-NEXT: [[TMP6:%.*]] = load i16, ptr [[TMP5]], align 2155; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TILE_STR]], ptr [[TMP1]], i64 0, i32 1156; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[TMP7]], align 2157; CHECK-NEXT: [[TMP9:%.*]] = udiv i16 [[TMP8]], 4158; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TILE_STR]], ptr [[TMP0:%.*]], i64 0, i32 2159; CHECK-NEXT: [[TMP11:%.*]] = sext i16 [[TMP6]] to i64160; CHECK-NEXT: [[TMP12:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[TMP4]], i16 [[TMP6]], ptr [[TMP10]], i64 [[TMP11]])161; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TILE_STR]], ptr [[TMP1]], i64 0, i32 2162; CHECK-NEXT: [[TMP14:%.*]] = sext i16 [[TMP8]] to i64163; CHECK-NEXT: [[TMP15:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[TMP4]], i16 [[TMP8]], ptr [[TMP13]], i64 [[TMP14]])164; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TILE_STR]], ptr [[TMP2]], i64 0, i32 2165; CHECK-NEXT: [[TMP17:%.*]] = sext i16 [[TMP6]] to i64166; CHECK-NEXT: [[TMP18:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[TMP9]], i16 [[TMP6]], ptr [[TMP16]], i64 [[TMP17]])167; CHECK-NEXT: [[TMP19:%.*]] = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 [[TMP4]], i16 [[TMP6]], i16 [[TMP8]], x86_amx [[TMP12]], x86_amx [[TMP15]], x86_amx [[TMP18]])168; CHECK-NEXT: [[TMP20:%.*]] = sext i16 [[TMP6]] to i64169; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[TMP4]], i16 [[TMP6]], ptr [[TMP10]], i64 [[TMP20]], x86_amx [[TMP19]])170; CHECK-NEXT: ret void171;172 %4 = load i16, ptr %1, align 64173 %5 = getelementptr inbounds %struct.__tile_str, ptr %2, i64 0, i32 1174 %6 = load i16, ptr %5, align 2175 %7 = getelementptr inbounds %struct.__tile_str, ptr %1, i64 0, i32 1176 %8 = load i16, ptr %7, align 2177 %9 = getelementptr inbounds %struct.__tile_str, ptr %0, i64 0, i32 2178 %10 = load <256 x i32>, ptr %9, align 64179 %11 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %10)180 %12 = getelementptr inbounds %struct.__tile_str, ptr %1, i64 0, i32 2181 %13 = load <256 x i32>, ptr %12, align 64182 %14 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %13)183 %15 = getelementptr inbounds %struct.__tile_str, ptr %2, i64 0, i32 2184 %16 = load <256 x i32>, ptr %15, align 64185 %17 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %16)186 %18 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %4, i16 %6, i16 %8, x86_amx %11, x86_amx %14, x86_amx %17)187 %19 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %18)188 store <256 x i32> %19, ptr %9, align 64189 ret void190}191 192define dso_local void @__tile_dpbsud(i16 %m, i16 %n, i16 %k, ptr %pc, ptr %pa, ptr %pb) {193; CHECK-LABEL: @__tile_dpbsud(194; CHECK-NEXT: [[TMP1:%.*]] = udiv i16 [[K:%.*]], 4195; CHECK-NEXT: [[TMP2:%.*]] = sext i16 [[K]] to i64196; CHECK-NEXT: [[TMP3:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M:%.*]], i16 [[K]], ptr [[PA:%.*]], i64 [[TMP2]])197; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[N:%.*]] to i64198; CHECK-NEXT: [[TMP5:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[TMP1]], i16 [[N]], ptr [[PB:%.*]], i64 [[TMP4]])199; CHECK-NEXT: [[TMP6:%.*]] = sext i16 [[N]] to i64200; CHECK-NEXT: [[TMP7:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M]], i16 [[N]], ptr [[PC:%.*]], i64 [[TMP6]])201; CHECK-NEXT: [[T6:%.*]] = tail call x86_amx @llvm.x86.tdpbsud.internal(i16 [[M]], i16 [[N]], i16 [[K]], x86_amx [[TMP7]], x86_amx [[TMP3]], x86_amx [[TMP5]])202; CHECK-NEXT: [[TMP8:%.*]] = sext i16 [[N]] to i64203; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[M]], i16 [[N]], ptr [[PC]], i64 [[TMP8]], x86_amx [[T6]])204; CHECK-NEXT: ret void205;206 %t0 = load <256 x i32>, ptr %pa, align 64207 %t1 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t0)208 %t2 = load <256 x i32>, ptr %pb, align 64209 %t3 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t2)210 %t4 = load <256 x i32>, ptr %pc, align 64211 %t5 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t4)212 %t6 = tail call x86_amx @llvm.x86.tdpbsud.internal(i16 %m, i16 %n, i16 %k, x86_amx %t5, x86_amx %t1, x86_amx %t3)213 %t7 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t6)214 store <256 x i32> %t7, ptr %pc, align 64215 ret void216}217 218define dso_local void @__tile_dpbusd(i16 %m, i16 %n, i16 %k, ptr %pc, ptr %pa, ptr %pb) {219; CHECK-LABEL: @__tile_dpbusd(220; CHECK-NEXT: [[TMP1:%.*]] = udiv i16 [[K:%.*]], 4221; CHECK-NEXT: [[TMP2:%.*]] = sext i16 [[K]] to i64222; CHECK-NEXT: [[TMP3:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M:%.*]], i16 [[K]], ptr [[PA:%.*]], i64 [[TMP2]])223; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[N:%.*]] to i64224; CHECK-NEXT: [[TMP5:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[TMP1]], i16 [[N]], ptr [[PB:%.*]], i64 [[TMP4]])225; CHECK-NEXT: [[TMP6:%.*]] = sext i16 [[N]] to i64226; CHECK-NEXT: [[TMP7:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M]], i16 [[N]], ptr [[PC:%.*]], i64 [[TMP6]])227; CHECK-NEXT: [[T6:%.*]] = tail call x86_amx @llvm.x86.tdpbusd.internal(i16 [[M]], i16 [[N]], i16 [[K]], x86_amx [[TMP7]], x86_amx [[TMP3]], x86_amx [[TMP5]])228; CHECK-NEXT: [[TMP8:%.*]] = sext i16 [[N]] to i64229; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[M]], i16 [[N]], ptr [[PC]], i64 [[TMP8]], x86_amx [[T6]])230; CHECK-NEXT: ret void231;232 %t0 = load <256 x i32>, ptr %pa, align 64233 %t1 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t0)234 %t2 = load <256 x i32>, ptr %pb, align 64235 %t3 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t2)236 %t4 = load <256 x i32>, ptr %pc, align 64237 %t5 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t4)238 %t6 = tail call x86_amx @llvm.x86.tdpbusd.internal(i16 %m, i16 %n, i16 %k, x86_amx %t5, x86_amx %t1, x86_amx %t3)239 %t7 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t6)240 store <256 x i32> %t7, ptr %pc, align 64241 ret void242}243 244define dso_local void @__tile_dpbuud(i16 %m, i16 %n, i16 %k, ptr %pc, ptr %pa, ptr %pb) {245; CHECK-LABEL: @__tile_dpbuud(246; CHECK-NEXT: [[TMP1:%.*]] = udiv i16 [[K:%.*]], 4247; CHECK-NEXT: [[TMP2:%.*]] = sext i16 [[K]] to i64248; CHECK-NEXT: [[TMP3:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M:%.*]], i16 [[K]], ptr [[PA:%.*]], i64 [[TMP2]])249; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[N:%.*]] to i64250; CHECK-NEXT: [[TMP5:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[TMP1]], i16 [[N]], ptr [[PB:%.*]], i64 [[TMP4]])251; CHECK-NEXT: [[TMP6:%.*]] = sext i16 [[N]] to i64252; CHECK-NEXT: [[TMP7:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M]], i16 [[N]], ptr [[PC:%.*]], i64 [[TMP6]])253; CHECK-NEXT: [[T6:%.*]] = tail call x86_amx @llvm.x86.tdpbuud.internal(i16 [[M]], i16 [[N]], i16 [[K]], x86_amx [[TMP7]], x86_amx [[TMP3]], x86_amx [[TMP5]])254; CHECK-NEXT: [[TMP8:%.*]] = sext i16 [[N]] to i64255; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[M]], i16 [[N]], ptr [[PC]], i64 [[TMP8]], x86_amx [[T6]])256; CHECK-NEXT: ret void257;258 %t0 = load <256 x i32>, ptr %pa, align 64259 %t1 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t0)260 %t2 = load <256 x i32>, ptr %pb, align 64261 %t3 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t2)262 %t4 = load <256 x i32>, ptr %pc, align 64263 %t5 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t4)264 %t6 = tail call x86_amx @llvm.x86.tdpbuud.internal(i16 %m, i16 %n, i16 %k, x86_amx %t5, x86_amx %t1, x86_amx %t3)265 %t7 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t6)266 store <256 x i32> %t7, ptr %pc, align 64267 ret void268}269 270define dso_local void @__tile_dpbf16ps(i16 %m, i16 %n, i16 %k, ptr %pc, ptr %pa, ptr %pb) {271; CHECK-LABEL: @__tile_dpbf16ps(272; CHECK-NEXT: [[TMP1:%.*]] = udiv i16 [[K:%.*]], 4273; CHECK-NEXT: [[TMP2:%.*]] = sext i16 [[K]] to i64274; CHECK-NEXT: [[TMP3:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M:%.*]], i16 [[K]], ptr [[PA:%.*]], i64 [[TMP2]])275; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[N:%.*]] to i64276; CHECK-NEXT: [[TMP5:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[TMP1]], i16 [[N]], ptr [[PB:%.*]], i64 [[TMP4]])277; CHECK-NEXT: [[TMP6:%.*]] = sext i16 [[N]] to i64278; CHECK-NEXT: [[TMP7:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M]], i16 [[N]], ptr [[PC:%.*]], i64 [[TMP6]])279; CHECK-NEXT: [[T6:%.*]] = tail call x86_amx @llvm.x86.tdpbf16ps.internal(i16 [[M]], i16 [[N]], i16 [[K]], x86_amx [[TMP7]], x86_amx [[TMP3]], x86_amx [[TMP5]])280; CHECK-NEXT: [[TMP8:%.*]] = sext i16 [[N]] to i64281; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[M]], i16 [[N]], ptr [[PC]], i64 [[TMP8]], x86_amx [[T6]])282; CHECK-NEXT: ret void283;284 %t0 = load <256 x i32>, ptr %pa, align 64285 %t1 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t0)286 %t2 = load <256 x i32>, ptr %pb, align 64287 %t3 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t2)288 %t4 = load <256 x i32>, ptr %pc, align 64289 %t5 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t4)290 %t6 = tail call x86_amx @llvm.x86.tdpbf16ps.internal(i16 %m, i16 %n, i16 %k, x86_amx %t5, x86_amx %t1, x86_amx %t3)291 %t7 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t6)292 store <256 x i32> %t7, ptr %pc, align 64293 ret void294}295 296define dso_local void @__tile_stored(ptr %0, i64 %1, ptr nocapture readonly byval(%struct.__tile_str) align 64 %2) local_unnamed_addr {297; CHECK-LABEL: @__tile_stored(298; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr [[TMP2:%.*]], align 64299; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TILE_STR:%.*]], ptr [[TMP2]], i64 0, i32 1300; CHECK-NEXT: [[TMP6:%.*]] = load i16, ptr [[TMP5]], align 2301; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TILE_STR]], ptr [[TMP2]], i64 0, i32 2302; CHECK-NEXT: [[TMP8:%.*]] = sext i16 [[TMP6]] to i64303; CHECK-NEXT: [[TMP9:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[TMP4]], i16 [[TMP6]], ptr [[TMP7]], i64 [[TMP8]])304; CHECK-NEXT: [[TMP10:%.*]] = shl i64 [[TMP1:%.*]], 32305; CHECK-NEXT: [[TMP11:%.*]] = ashr exact i64 [[TMP10]], 32306; CHECK-NEXT: tail call void @llvm.x86.tilestored64.internal(i16 [[TMP4]], i16 [[TMP6]], ptr [[TMP0:%.*]], i64 [[TMP11]], x86_amx [[TMP9]])307; CHECK-NEXT: ret void308;309 %4 = load i16, ptr %2, align 64310 %5 = getelementptr inbounds %struct.__tile_str, ptr %2, i64 0, i32 1311 %6 = load i16, ptr %5, align 2312 %7 = getelementptr inbounds %struct.__tile_str, ptr %2, i64 0, i32 2313 %8 = load <256 x i32>, ptr %7, align 64314 %9 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %8)315 %10 = shl i64 %1, 32316 %11 = ashr exact i64 %10, 32317 tail call void @llvm.x86.tilestored64.internal(i16 %4, i16 %6, ptr %0, i64 %11, x86_amx %9)318 ret void319}320 321define void @dead_code(ptr%buf, i1 %arg) {322; CHECK-LABEL: @dead_code(323; CHECK-NEXT: entry:324; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 64325; CHECK-NEXT: br i1 [[ARG:%.*]], label [[L1:%.*]], label [[L2:%.*]]326; CHECK: l1:327; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)328; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr [[TMP0]], i64 32, x86_amx [[T1]])329; CHECK-NEXT: [[TMP1:%.*]] = load <256 x i32>, ptr [[TMP0]], align 1024330; CHECK-NEXT: br i1 [[ARG]], label [[L2]], label [[EXIT:%.*]]331; CHECK: l2:332; CHECK-NEXT: [[T3:%.*]] = phi <256 x i32> [ undef, [[ENTRY:%.*]] ], [ [[TMP1]], [[L1]] ]333; CHECK-NEXT: store <256 x i32> [[T3]], ptr [[BUF:%.*]], align 1024334; CHECK-NEXT: br label [[EXIT]]335; CHECK: exit:336; CHECK-NEXT: ret void337;338entry:339 br i1 %arg, label %l1, label %l2340 341l1:342 %t1 = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)343 %t2 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t1)344 br i1 %arg, label %l2, label %exit345 346l2:347 %t3 = phi <256 x i32> [ undef, %entry ], [ %t2, %l1 ]348 %t4 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t3)349 %t5 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t4)350 store <256 x i32> %t5, ptr %buf351 br label %exit352 353exit:354 ret void355}356 357declare x86_amx @llvm.x86.tilezero.internal(i16, i16)358declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, ptr, i64)359declare x86_amx @llvm.x86.tdpbssd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)360declare x86_amx @llvm.x86.tdpbsud.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)361declare x86_amx @llvm.x86.tdpbusd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)362declare x86_amx @llvm.x86.tdpbuud.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)363declare x86_amx @llvm.x86.tdpbf16ps.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)364declare void @llvm.x86.tilestored64.internal(i16, i16, ptr, i64, x86_amx)365 366declare x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32>)367declare x86_amx @llvm.x86.cast.vector.to.tile.v225i32(<225 x i32>)368declare <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx)369declare <225 x i32> @llvm.x86.cast.tile.to.vector.v225i32(x86_amx)370