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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck %s3 4declare x86_regcallcc i32 @callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0);5 6; In RegCall calling convention, ESI and EDI are callee saved registers.7; One might think that the caller could assume that ESI value is the same before8; and after calling the callee.9; However, RegCall also says that a register that was used for10; passing/returning arguments, can be assumed to be modified by the callee.11; In other words, it is no longer a callee saved register.12; In this case we want to see that EDX/ECX values are saved and EDI/ESI are assumed13; to be modified by the callee.14; This is a hipe CC function that doesn't save any register for the caller.15; So we can be sure that there is no other reason to save EDX/ECX.16; The caller arguments are expected to be passed (in the following order)17; in registers: ESI, EBP, EAX, EDX and ECX.18define cc 11 i32 @caller(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0) nounwind {19; CHECK-LABEL: caller:20; CHECK: # %bb.0:21; CHECK-NEXT: subl $12, %esp22; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill23; CHECK-NEXT: movl %edx, %ebx24; CHECK-NEXT: movl %eax, %edx25; CHECK-NEXT: movl %esi, %eax26; CHECK-NEXT: movl %ebp, %ecx27; CHECK-NEXT: movl %ebx, %edi28; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload29; CHECK-NEXT: movl %ebp, %esi30; CHECK-NEXT: calll callee@PLT31; CHECK-NEXT: addl %ebp, %ebx32; CHECK-NEXT: addl %eax, %ebx33; CHECK-NEXT: movl %ebx, %esi34; CHECK-NEXT: addl $12, %esp35; CHECK-NEXT: retl36 %b1 = call x86_regcallcc i32 @callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0)37 %b2 = add i32 %b1, %d038 %b3 = add i32 %b2, %e039 ret i32 %b340}41!hipe.literals = !{ !0, !1, !2 }42!0 = !{ !"P_NSP_LIMIT", i32 120 }43!1 = !{ !"X86_LEAF_WORDS", i32 24 }44!2 = !{ !"AMD64_LEAF_WORDS", i32 18 }45 46; Make sure that the callee doesn't save parameters that were passed as arguments.47; The caller arguments are expected to be passed (in the following order)48; in registers: EAX, ECX, EDX, EDI and ESI.49; The result will return in EAX, ECX and EDX.50define x86_regcallcc {i32, i32, i32} @test_callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0) nounwind {51; CHECK-LABEL: test_callee:52; CHECK: # %bb.0:53; CHECK-NEXT: leal (,%esi,8), %ecx54; CHECK-NEXT: subl %esi, %ecx55; CHECK-NEXT: movl $5, %eax56; CHECK-NEXT: xorl %edx, %edx57; CHECK-NEXT: divl %esi58; CHECK-NEXT: movl %eax, %esi59; CHECK-NEXT: leal (,%edi,8), %edx60; CHECK-NEXT: subl %edi, %edx61; CHECK-NEXT: movl %ecx, %eax62; CHECK-NEXT: movl %esi, %ecx63; CHECK-NEXT: retl64 %b1 = mul i32 7, %e065 %b2 = udiv i32 5, %e066 %b3 = mul i32 7, %d067 %b4 = insertvalue {i32, i32, i32} undef, i32 %b1, 068 %b5 = insertvalue {i32, i32, i32} %b4, i32 %b2, 169 %b6 = insertvalue {i32, i32, i32} %b5, i32 %b3, 270 ret {i32, i32, i32} %b671}72