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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# NOTE: This MIR test is required because the support for 64 bit memory ops is missing in X86 mode, Due to distinction between float/int types, support is expected in near future and there is this RFC in place https://discourse.llvm.org/t/rfc-globalisel-adding-fp-type-information-to-llt/83349. Once this support is introduced this test must be dropped and integrated into the LLVM IR tests.3# RUN: llc -O2 -mtriple=i686-linux-gnu -mattr=+x87,-sse,-sse2 -run-pass=regbankselect,instruction-select -disable-gisel-legality-check -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes GISEL-X864 5---6name: test_si8tofp647alignment: 168exposesReturnsTwice: false9legalized: true10tracksRegLiveness: true11fixedStack:12 - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,13 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,14 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }15 - { id: 1, type: default, offset: 0, size: 1, alignment: 4, stack-id: default,16 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,17 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }18stack:19 - { id: 0, name: '', type: default, offset: 0, size: 2, alignment: 2,20 stack-id: default, callee-saved-register: '', callee-saved-restored: true,21 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }22body: |23 bb.1.entry:24 ; GISEL-X86-LABEL: name: test_si8tofp6425 ; GISEL-X86: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (p0) from %fixed-stack.1)26 ; GISEL-X86-NEXT: [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF27 ; GISEL-X86-NEXT: MOV16mr %stack.0, 1, $noreg, 0, $noreg, [[DEF]] :: (store (s16) into %stack.0)28 ; GISEL-X86-NEXT: [[ILD_Fp16m64_:%[0-9]+]]:rfp64 = ILD_Fp16m64 %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s16) from %stack.0)29 ; GISEL-X86-NEXT: nofpexcept ST_Fp64m [[MOV32rm]], 1, $noreg, 0, $noreg, [[ILD_Fp16m64_]], implicit-def dead $fpsw, implicit $fpcw :: (store (s64))30 ; GISEL-X86-NEXT: RET 031 %4:_(p0) = G_FRAME_INDEX %fixed-stack.032 %1:_(p0) = G_LOAD %4(p0) :: (invariant load (p0) from %fixed-stack.0)33 %6:_(s16) = IMPLICIT_DEF34 %7:_(p0) = G_FRAME_INDEX %stack.035 G_STORE %6(s16), %7(p0) :: (store (s16) into %stack.0)36 %5:_(s64) = G_FILD %7(p0) :: (load (s16) from %stack.0)37 G_STORE %5(s64), %1(p0) :: (store (s64))38 RET 039...40---41name: test_si16tofp6442alignment: 1643legalized: true44tracksRegLiveness: true45fixedStack:46 - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,47 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,48 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }49 - { id: 1, type: default, offset: 0, size: 2, alignment: 4, stack-id: default,50 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,51 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }52stack:53 - { id: 0, name: '', type: default, offset: 0, size: 2, alignment: 2,54 stack-id: default, callee-saved-register: '', callee-saved-restored: true,55 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }56body: |57 bb.1.entry:58 ; GISEL-X86-LABEL: name: test_si16tofp6459 ; GISEL-X86: [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF60 ; GISEL-X86-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (p0) from %fixed-stack.1)61 ; GISEL-X86-NEXT: MOV16mr %stack.0, 1, $noreg, 0, $noreg, [[DEF]] :: (store (s16) into %stack.0)62 ; GISEL-X86-NEXT: [[ILD_Fp16m64_:%[0-9]+]]:rfp64 = ILD_Fp16m64 %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s16) from %stack.0)63 ; GISEL-X86-NEXT: nofpexcept ST_Fp64m [[MOV32rm]], 1, $noreg, 0, $noreg, [[ILD_Fp16m64_]], implicit-def dead $fpsw, implicit $fpcw :: (store (s64))64 ; GISEL-X86-NEXT: RET 065 %0:_(s16) = IMPLICIT_DEF66 %4:_(p0) = G_FRAME_INDEX %fixed-stack.067 %1:_(p0) = G_LOAD %4(p0) :: (invariant load (p0) from %fixed-stack.0)68 %6:_(p0) = G_FRAME_INDEX %stack.069 G_STORE %0(s16), %6(p0) :: (store (s16) into %stack.0)70 %5:_(s64) = G_FILD %6(p0):: (load (s16) from %stack.0)71 G_STORE %5(s64), %1(p0) :: (store (s64))72 RET 073...74---75name: test_si32tofp6476alignment: 477exposesReturnsTwice: false78legalized: true79tracksRegLiveness: true80fixedStack:81 - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,82 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,83 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }84 - { id: 1, type: default, offset: 0, size: 4, alignment: 4, stack-id: default,85 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,86 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }87stack:88 - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,89 stack-id: default, callee-saved-register: '', callee-saved-restored: true,90 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }91body: |92 bb.1.entry:93 ; GISEL-X86-LABEL: name: test_si32tofp6494 ; GISEL-X86: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF95 ; GISEL-X86-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (p0) from %fixed-stack.1)96 ; GISEL-X86-NEXT: MOV32mr %stack.0, 1, $noreg, 0, $noreg, [[DEF]] :: (store (s32) into %stack.0)97 ; GISEL-X86-NEXT: [[ILD_Fp32m64_:%[0-9]+]]:rfp64 = ILD_Fp32m64 %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %stack.0)98 ; GISEL-X86-NEXT: nofpexcept ST_Fp64m [[MOV32rm]], 1, $noreg, 0, $noreg, [[ILD_Fp32m64_]], implicit-def dead $fpsw, implicit $fpcw :: (store (s64))99 ; GISEL-X86-NEXT: RET 0100 %0:_(s32) = IMPLICIT_DEF101 %3:_(p0) = G_FRAME_INDEX %fixed-stack.0102 %1:_(p0) = G_LOAD %3(p0) :: (invariant load (p0) from %fixed-stack.0)103 %5:_(p0) = G_FRAME_INDEX %stack.0104 G_STORE %0(s32), %5(p0) :: (store (s32) into %stack.0)105 %4:_(s64) = G_FILD %5(p0) :: (load (s32) from %stack.0)106 G_STORE %4(s64), %1(p0) :: (store (s64))107 RET 0108...109---110name: test_si64tofp64111alignment: 16112exposesReturnsTwice: false113legalized: true114tracksRegLiveness: true115fixedStack:116 - { id: 0, type: default, offset: 8, size: 4, alignment: 8, stack-id: default,117 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,118 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }119 - { id: 1, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,120 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,121 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }122 - { id: 2, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,123 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,124 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }125stack:126 - { id: 0, name: '', type: default, offset: 0, size: 8, alignment: 8,127 stack-id: default, callee-saved-register: '', callee-saved-restored: true,128 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }129body: |130 bb.1.entry:131 ; GISEL-X86-LABEL: name: test_si64tofp64132 ; GISEL-X86: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF133 ; GISEL-X86-NEXT: [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF134 ; GISEL-X86-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.2, 1, $noreg, 0, $noreg :: (invariant load (p0) from %fixed-stack.2, align 8)135 ; GISEL-X86-NEXT: [[LEA32r:%[0-9]+]]:gr32 = LEA32r %stack.0, 1, $noreg, 0, $noreg136 ; GISEL-X86-NEXT: MOV32mr %stack.0, 1, $noreg, 0, $noreg, [[DEF]] :: (store (s32) into %stack.0, align 8)137 ; GISEL-X86-NEXT: MOV32mr [[LEA32r]], 1, $noreg, 4, $noreg, [[DEF1]] :: (store (s32) into %stack.0 + 4, basealign 8)138 ; GISEL-X86-NEXT: [[ILD_Fp64m64_:%[0-9]+]]:rfp64 = ILD_Fp64m64 %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s64) from %stack.0)139 ; GISEL-X86-NEXT: nofpexcept ST_Fp64m [[MOV32rm]], 1, $noreg, 0, $noreg, [[ILD_Fp64m64_]], implicit-def dead $fpsw, implicit $fpcw :: (store (s64))140 ; GISEL-X86-NEXT: RET 0141 %2:_(s32) = IMPLICIT_DEF142 %3:_(s32) = IMPLICIT_DEF143 %6:_(p0) = G_FRAME_INDEX %fixed-stack.0144 %1:_(p0) = G_LOAD %6(p0) :: (invariant load (p0) from %fixed-stack.0, align 8)145 %8:_(p0) = G_FRAME_INDEX %stack.0146 G_STORE %2(s32), %8(p0) :: (store (s32) into %stack.0, align 8)147 %12:_(s32) = G_CONSTANT i32 4148 %11:_(p0) = G_PTR_ADD %8, %12(s32)149 G_STORE %3(s32), %11(p0) :: (store (s32) into %stack.0 + 4, basealign 8)150 %7:_(s64) = G_FILD %8(p0) :: (load (s64) from %stack.0)151 G_STORE %7(s64), %1(p0) :: (store (s64))152 RET 0153