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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X643# RUN: llc -O0 -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X864 5--- |6 7 define void @test_and_i1() { ret void}8 define void @test_and_i8() { ret void }9 define void @test_and_i16() { ret void }10 define void @test_and_i27() { ret void }11 define void @test_and_i32() { ret void }12 define void @test_and_i42() { ret void }13 define void @test_and_i64() { ret void }14 15...16---17name: test_and_i118alignment: 1619legalized: false20regBankSelected: false21registers:22 - { id: 0, class: _, preferred-register: '' }23 - { id: 1, class: _, preferred-register: '' }24 - { id: 2, class: _, preferred-register: '' }25body: |26 bb.1 (%ir-block.0):27 ; CHECK-LABEL: name: test_and_i128 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edx29 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)30 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)31 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s8) = G_AND [[TRUNC]], [[TRUNC1]]32 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s8)33 ; CHECK-NEXT: $eax = COPY [[ANYEXT]](s32)34 ; CHECK-NEXT: RET 035 %0(s32) = COPY $edx36 %1(s1) = G_TRUNC %0(s32)37 %2(s1) = G_AND %1, %138 %3:_(s32) = G_ANYEXT %239 $eax = COPY %340 RET 041...42---43name: test_and_i844alignment: 1645legalized: false46regBankSelected: false47registers:48 - { id: 0, class: _, preferred-register: '' }49 - { id: 1, class: _, preferred-register: '' }50 - { id: 2, class: _, preferred-register: '' }51body: |52 bb.1 (%ir-block.0):53 ; CHECK-LABEL: name: test_and_i854 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edx55 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)56 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s8) = G_AND [[TRUNC]], [[TRUNC]]57 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s8)58 ; CHECK-NEXT: $eax = COPY [[ANYEXT]](s32)59 ; CHECK-NEXT: RET 060 %0(s32) = COPY $edx61 %1(s8) = G_TRUNC %0(s32)62 %2(s8) = G_AND %1, %163 %3:_(s32) = G_ANYEXT %264 $eax = COPY %365 RET 066...67---68name: test_and_i1669alignment: 1670legalized: false71regBankSelected: false72registers:73 - { id: 0, class: _ }74 - { id: 1, class: _ }75 - { id: 2, class: _ }76body: |77 bb.1 (%ir-block.0):78 ; CHECK-LABEL: name: test_and_i1679 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edx80 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)81 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[TRUNC]]82 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s16)83 ; CHECK-NEXT: $eax = COPY [[ANYEXT]](s32)84 ; CHECK-NEXT: RET 085 %0(s32) = COPY $edx86 %1(s16) = G_TRUNC %0(s32)87 %2(s16) = G_AND %1, %188 %3:_(s32) = G_ANYEXT %289 $eax = COPY %390 RET 091...92---93name: test_and_i2794alignment: 1695legalized: false96regBankSelected: false97registers:98 - { id: 0, class: _ }99 - { id: 1, class: _ }100 - { id: 2, class: _ }101body: |102 bb.1 (%ir-block.0):103 ; CHECK-LABEL: name: test_and_i27104 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edx105 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY]]106 ; CHECK-NEXT: $eax = COPY [[AND]](s32)107 ; CHECK-NEXT: RET 0108 %0(s32) = COPY $edx109 %1(s27) = G_TRUNC %0(s32)110 %2(s27) = G_AND %1, %1111 %3:_(s32) = G_ANYEXT %2112 $eax = COPY %3113 RET 0114...115---116name: test_and_i32117alignment: 16118legalized: false119regBankSelected: false120registers:121 - { id: 0, class: _ }122 - { id: 1, class: _ }123 - { id: 2, class: _ }124body: |125 bb.1 (%ir-block.0):126 ; CHECK-LABEL: name: test_and_i32127 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF128 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF129 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF1]]130 ; CHECK-NEXT: $eax = COPY [[AND]](s32)131 ; CHECK-NEXT: RET 0132 %0(s32) = IMPLICIT_DEF133 %1(s32) = IMPLICIT_DEF134 %2(s32) = G_AND %0, %1135 $eax = COPY %2136 RET 0137...138---139name: test_and_i42140alignment: 16141legalized: false142regBankSelected: false143registers:144 - { id: 0, class: _ }145 - { id: 1, class: _ }146 - { id: 2, class: _ }147body: |148 bb.1 (%ir-block.0):149 ; X64-LABEL: name: test_and_i42150 ; X64: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx151 ; X64-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY]]152 ; X64-NEXT: $rax = COPY [[AND]](s64)153 ; X64-NEXT: RET 0154 ; X86-LABEL: name: test_and_i42155 ; X86: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx156 ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)157 ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)158 ; X86-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV]], [[UV2]]159 ; X86-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[UV3]]160 ; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)161 ; X86-NEXT: $rax = COPY [[MV]](s64)162 ; X86-NEXT: RET 0163 %0(s64) = COPY $rdx164 %1(s42) = G_TRUNC %0(s64)165 %2(s42) = G_AND %1, %1166 %3:_(s64) = G_ANYEXT %2167 $rax = COPY %3168 RET 0169...170---171name: test_and_i64172alignment: 16173legalized: false174regBankSelected: false175registers:176 - { id: 0, class: _ }177 - { id: 1, class: _ }178 - { id: 2, class: _ }179body: |180 bb.1 (%ir-block.0):181 ; X64-LABEL: name: test_and_i64182 ; X64: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF183 ; X64-NEXT: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF184 ; X64-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF1]]185 ; X64-NEXT: $rax = COPY [[AND]](s64)186 ; X64-NEXT: RET 0187 ; X86-LABEL: name: test_and_i64188 ; X86: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF189 ; X86-NEXT: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF190 ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)191 ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64)192 ; X86-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV]], [[UV2]]193 ; X86-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[UV3]]194 ; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)195 ; X86-NEXT: $rax = COPY [[MV]](s64)196 ; X86-NEXT: RET 0197 %0(s64) = IMPLICIT_DEF198 %1(s64) = IMPLICIT_DEF199 %2(s64) = G_AND %0, %1200 $rax = COPY %2201 RET 0202...203