67 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 62# RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - | FileCheck %s --check-prefixes=AVX23# RUN: llc -mtriple=x86_64-linux-gnu -mattr=sse2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - | FileCheck %s --check-prefixes=SSE24# RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx512f -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - | FileCheck %s --check-prefixes=AVX512F5 6 7---8name: test_basic_g_implicit_def_v8i649body: |10 bb.0:11 ; AVX2-LABEL: name: test_basic_g_implicit_def_v8i6412 ; AVX2: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF13 ; AVX2-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF]](<4 x s64>), [[DEF]](<4 x s64>)14 ; AVX2-NEXT: RET 0, implicit [[CONCAT_VECTORS]](<8 x s64>)15 ;16 ; SSE2-LABEL: name: test_basic_g_implicit_def_v8i6417 ; SSE2: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF18 ; SSE2-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF]](<2 x s64>), [[DEF]](<2 x s64>), [[DEF]](<2 x s64>), [[DEF]](<2 x s64>)19 ; SSE2-NEXT: RET 0, implicit [[CONCAT_VECTORS]](<8 x s64>)20 ;21 ; AVX512F-LABEL: name: test_basic_g_implicit_def_v8i6422 ; AVX512F: [[DEF:%[0-9]+]]:_(<8 x s64>) = G_IMPLICIT_DEF23 ; AVX512F-NEXT: RET 0, implicit [[DEF]](<8 x s64>)24 %0:_(<8 x s64>) = G_IMPLICIT_DEF25 RET 0, implicit %026...27 28---29name: test_g_implicit_def_cample_size30body: |31 bb.1:32 ; AVX2-LABEL: name: test_g_implicit_def_cample_size33 ; AVX2: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF34 ; AVX2-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s64>) = G_BUILD_VECTOR [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64)35 ; AVX2-NEXT: [[TRUNC:%[0-9]+]]:_(<5 x s63>) = G_TRUNC [[BUILD_VECTOR]](<5 x s64>)36 ; AVX2-NEXT: RET 0, implicit [[TRUNC]](<5 x s63>)37 ;38 ; SSE2-LABEL: name: test_g_implicit_def_cample_size39 ; SSE2: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF40 ; SSE2-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s64>) = G_BUILD_VECTOR [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64)41 ; SSE2-NEXT: [[TRUNC:%[0-9]+]]:_(<5 x s63>) = G_TRUNC [[BUILD_VECTOR]](<5 x s64>)42 ; SSE2-NEXT: RET 0, implicit [[TRUNC]](<5 x s63>)43 ;44 ; AVX512F-LABEL: name: test_g_implicit_def_cample_size45 ; AVX512F: [[CONSTANT_POOL:%[0-9]+]]:_(p0) = G_CONSTANT_POOL %const.046 ; AVX512F-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[CONSTANT_POOL]](p0) :: (load (s64) from constant-pool, align 64)47 ; AVX512F-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 848 ; AVX512F-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[CONSTANT_POOL]], [[C]](s64)49 ; AVX512F-NEXT: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p0) :: (load (s64) from constant-pool + 8, basealign 64)50 ; AVX512F-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1651 ; AVX512F-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[CONSTANT_POOL]], [[C1]](s64)52 ; AVX512F-NEXT: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64) from constant-pool + 16, align 16, basealign 64)53 ; AVX512F-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2454 ; AVX512F-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[CONSTANT_POOL]], [[C2]](s64)55 ; AVX512F-NEXT: [[LOAD3:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD2]](p0) :: (load (s64) from constant-pool + 24, basealign 64)56 ; AVX512F-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3257 ; AVX512F-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[CONSTANT_POOL]], [[C3]](s64)58 ; AVX512F-NEXT: [[LOAD4:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD3]](p0) :: (load (s64) from constant-pool + 32, align 32, basealign 64)59 ; AVX512F-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64), [[LOAD3]](s64), [[LOAD4]](s64)60 ; AVX512F-NEXT: [[TRUNC:%[0-9]+]]:_(<5 x s63>) = G_TRUNC [[BUILD_VECTOR]](<5 x s64>)61 ; AVX512F-NEXT: RET 0, implicit [[TRUNC]](<5 x s63>)62 %0:_(<5 x s63>) = G_IMPLICIT_DEF63 RET 0, implicit %064...65 66 67