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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 42; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel -stop-after=regbankselect | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel -stop-after=regbankselect | FileCheck %s --check-prefix=X644 5define x86_fp80 @f0(x86_fp80 noundef %a) {6 ; X86-LABEL: name: f07 ; X86: bb.1.entry:8 ; X86-NEXT: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.09 ; X86-NEXT: [[LOAD:%[0-9]+]]:psr(s80) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (s80) from %fixed-stack.0, align 4)10 ; X86-NEXT: [[C:%[0-9]+]]:psr(s80) = G_FCONSTANT x86_fp80 0xK400A800000000000000011 ; X86-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %stack.0.a.addr12 ; X86-NEXT: [[FRAME_INDEX2:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %stack.1.x13 ; X86-NEXT: G_STORE [[LOAD]](s80), [[FRAME_INDEX1]](p0) :: (store (s80) into %ir.a.addr, align 16)14 ; X86-NEXT: G_STORE [[C]](s80), [[FRAME_INDEX2]](p0) :: (store (s80) into %ir.x, align 16)15 ; X86-NEXT: [[LOAD1:%[0-9]+]]:psr(s80) = G_LOAD [[FRAME_INDEX1]](p0) :: (dereferenceable load (s80) from %ir.a.addr, align 16)16 ; X86-NEXT: [[LOAD2:%[0-9]+]]:psr(s80) = G_LOAD [[FRAME_INDEX2]](p0) :: (dereferenceable load (s80) from %ir.x, align 16)17 ; X86-NEXT: [[FADD:%[0-9]+]]:psr(s80) = G_FADD [[LOAD1]], [[LOAD2]]18 ; X86-NEXT: $fp0 = COPY [[FADD]](s80)19 ; X86-NEXT: RET 0, implicit $fp020 ;21 ; X64-LABEL: name: f022 ; X64: bb.1.entry:23 ; X64-NEXT: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.024 ; X64-NEXT: [[LOAD:%[0-9]+]]:psr(s80) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (s80) from %fixed-stack.0, align 16)25 ; X64-NEXT: [[C:%[0-9]+]]:psr(s80) = G_FCONSTANT x86_fp80 0xK400A800000000000000026 ; X64-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %stack.0.a.addr27 ; X64-NEXT: [[FRAME_INDEX2:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %stack.1.x28 ; X64-NEXT: G_STORE [[LOAD]](s80), [[FRAME_INDEX1]](p0) :: (store (s80) into %ir.a.addr, align 16)29 ; X64-NEXT: G_STORE [[C]](s80), [[FRAME_INDEX2]](p0) :: (store (s80) into %ir.x, align 16)30 ; X64-NEXT: [[LOAD1:%[0-9]+]]:psr(s80) = G_LOAD [[FRAME_INDEX1]](p0) :: (dereferenceable load (s80) from %ir.a.addr, align 16)31 ; X64-NEXT: [[LOAD2:%[0-9]+]]:psr(s80) = G_LOAD [[FRAME_INDEX2]](p0) :: (dereferenceable load (s80) from %ir.x, align 16)32 ; X64-NEXT: [[FADD:%[0-9]+]]:psr(s80) = G_FADD [[LOAD1]], [[LOAD2]]33 ; X64-NEXT: $fp0 = COPY [[FADD]](s80)34 ; X64-NEXT: RET 0, implicit $fp035entry:36 %a.addr = alloca x86_fp80, align 1637 %x = alloca x86_fp80, align 1638 store x86_fp80 %a, ptr %a.addr, align 1639 store x86_fp80 0xK400A8000000000000000, ptr %x, align 1640 %load1 = load x86_fp80, ptr %a.addr, align 1641 %load2 = load x86_fp80, ptr %x, align 1642 %add = fadd x86_fp80 %load1, %load243 ret x86_fp80 %add44}45 46declare x86_fp80 @llvm.sqrt.f32(x86_fp80)47 48define void @f1(ptr %a, ptr %b) {49 ; X86-LABEL: name: f150 ; X86: bb.1 (%ir-block.0):51 ; X86-NEXT: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.152 ; X86-NEXT: [[LOAD:%[0-9]+]]:gpr(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (p0) from %fixed-stack.1)53 ; X86-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.054 ; X86-NEXT: [[LOAD1:%[0-9]+]]:gpr(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load (p0) from %fixed-stack.0)55 ; X86-NEXT: [[LOAD2:%[0-9]+]]:psr(s80) = G_LOAD [[LOAD]](p0) :: (load (s80) from %ir.a, align 4)56 ; X86-NEXT: [[LOAD3:%[0-9]+]]:psr(s80) = G_LOAD [[LOAD1]](p0) :: (load (s80) from %ir.b, align 4)57 ; X86-NEXT: [[FSUB:%[0-9]+]]:psr(s80) = G_FSUB [[LOAD2]], [[LOAD3]]58 ; X86-NEXT: G_STORE [[FSUB]](s80), [[LOAD]](p0) :: (store (s80) into %ir.a, align 4)59 ; X86-NEXT: RET 060 ;61 ; X64-LABEL: name: f162 ; X64: bb.1 (%ir-block.0):63 ; X64-NEXT: liveins: $rdi, $rsi64 ; X64-NEXT: {{ $}}65 ; X64-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $rdi66 ; X64-NEXT: [[COPY1:%[0-9]+]]:gpr(p0) = COPY $rsi67 ; X64-NEXT: [[LOAD:%[0-9]+]]:psr(s80) = G_LOAD [[COPY]](p0) :: (load (s80) from %ir.a, align 4)68 ; X64-NEXT: [[LOAD1:%[0-9]+]]:psr(s80) = G_LOAD [[COPY1]](p0) :: (load (s80) from %ir.b, align 4)69 ; X64-NEXT: [[FSUB:%[0-9]+]]:psr(s80) = G_FSUB [[LOAD]], [[LOAD1]]70 ; X64-NEXT: G_STORE [[FSUB]](s80), [[COPY]](p0) :: (store (s80) into %ir.a, align 4)71 ; X64-NEXT: RET 072 %load1 = load x86_fp80, ptr %a, align 473 %load2 = load x86_fp80, ptr %b, align 474 %sub = fsub x86_fp80 %load1, %load275 store x86_fp80 %sub, ptr %a, align 476 ret void77}78 79define void @f2(ptr %a, ptr %b) {80 ; X86-LABEL: name: f281 ; X86: bb.1 (%ir-block.0):82 ; X86-NEXT: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.183 ; X86-NEXT: [[LOAD:%[0-9]+]]:gpr(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (p0) from %fixed-stack.1)84 ; X86-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.085 ; X86-NEXT: [[LOAD1:%[0-9]+]]:gpr(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load (p0) from %fixed-stack.0)86 ; X86-NEXT: [[LOAD2:%[0-9]+]]:psr(s80) = G_LOAD [[LOAD]](p0) :: (load (s80) from %ir.a, align 16)87 ; X86-NEXT: [[LOAD3:%[0-9]+]]:psr(s80) = G_LOAD [[LOAD1]](p0) :: (load (s80) from %ir.b, align 16)88 ; X86-NEXT: [[FMUL:%[0-9]+]]:psr(s80) = G_FMUL [[LOAD2]], [[LOAD3]]89 ; X86-NEXT: G_STORE [[FMUL]](s80), [[LOAD]](p0) :: (store (s80) into %ir.a, align 16)90 ; X86-NEXT: RET 091 ;92 ; X64-LABEL: name: f293 ; X64: bb.1 (%ir-block.0):94 ; X64-NEXT: liveins: $rdi, $rsi95 ; X64-NEXT: {{ $}}96 ; X64-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $rdi97 ; X64-NEXT: [[COPY1:%[0-9]+]]:gpr(p0) = COPY $rsi98 ; X64-NEXT: [[LOAD:%[0-9]+]]:psr(s80) = G_LOAD [[COPY]](p0) :: (load (s80) from %ir.a, align 16)99 ; X64-NEXT: [[LOAD1:%[0-9]+]]:psr(s80) = G_LOAD [[COPY1]](p0) :: (load (s80) from %ir.b, align 16)100 ; X64-NEXT: [[FMUL:%[0-9]+]]:psr(s80) = G_FMUL [[LOAD]], [[LOAD1]]101 ; X64-NEXT: G_STORE [[FMUL]](s80), [[COPY]](p0) :: (store (s80) into %ir.a, align 16)102 ; X64-NEXT: RET 0103 %load1 = load x86_fp80, ptr %a, align 16104 %load2 = load x86_fp80, ptr %b, align 16105 %mul = fmul x86_fp80 %load1, %load2106 store x86_fp80 %mul, ptr %a, align 16107 ret void108}109 110define void @f3(ptr %a, ptr %b) {111 ; X86-LABEL: name: f3112 ; X86: bb.1 (%ir-block.0):113 ; X86-NEXT: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.1114 ; X86-NEXT: [[LOAD:%[0-9]+]]:gpr(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (p0) from %fixed-stack.1)115 ; X86-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.0116 ; X86-NEXT: [[LOAD1:%[0-9]+]]:gpr(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load (p0) from %fixed-stack.0)117 ; X86-NEXT: [[LOAD2:%[0-9]+]]:psr(s80) = G_LOAD [[LOAD]](p0) :: (load (s80) from %ir.a, align 4)118 ; X86-NEXT: [[LOAD3:%[0-9]+]]:psr(s80) = G_LOAD [[LOAD1]](p0) :: (load (s80) from %ir.b, align 4)119 ; X86-NEXT: [[FDIV:%[0-9]+]]:psr(s80) = G_FDIV [[LOAD2]], [[LOAD3]]120 ; X86-NEXT: G_STORE [[FDIV]](s80), [[LOAD]](p0) :: (store (s80) into %ir.a, align 4)121 ; X86-NEXT: RET 0122 ;123 ; X64-LABEL: name: f3124 ; X64: bb.1 (%ir-block.0):125 ; X64-NEXT: liveins: $rdi, $rsi126 ; X64-NEXT: {{ $}}127 ; X64-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $rdi128 ; X64-NEXT: [[COPY1:%[0-9]+]]:gpr(p0) = COPY $rsi129 ; X64-NEXT: [[LOAD:%[0-9]+]]:psr(s80) = G_LOAD [[COPY]](p0) :: (load (s80) from %ir.a, align 4)130 ; X64-NEXT: [[LOAD1:%[0-9]+]]:psr(s80) = G_LOAD [[COPY1]](p0) :: (load (s80) from %ir.b, align 4)131 ; X64-NEXT: [[FDIV:%[0-9]+]]:psr(s80) = G_FDIV [[LOAD]], [[LOAD1]]132 ; X64-NEXT: G_STORE [[FDIV]](s80), [[COPY]](p0) :: (store (s80) into %ir.a, align 4)133 ; X64-NEXT: RET 0134 %load1 = load x86_fp80, ptr %a, align 4135 %load2 = load x86_fp80, ptr %b, align 4136 %div = fdiv x86_fp80 %load1, %load2137 store x86_fp80 %div, ptr %a, align 4138 ret void139}140 141define float @f4(float %val) {142 ; X86-LABEL: name: f4143 ; X86: bb.1 (%ir-block.0):144 ; X86-NEXT: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.0145 ; X86-NEXT: [[LOAD:%[0-9]+]]:psr(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (s32) from %fixed-stack.0)146 ; X86-NEXT: $fp0 = COPY [[LOAD]](s32)147 ; X86-NEXT: RET 0, implicit $fp0148 ;149 ; X64-LABEL: name: f4150 ; X64: bb.1 (%ir-block.0):151 ; X64-NEXT: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.0152 ; X64-NEXT: [[LOAD:%[0-9]+]]:gpr(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (s32) from %fixed-stack.0, align 16)153 ; X64-NEXT: $xmm0 = COPY [[LOAD]](s32)154 ; X64-NEXT: RET 0, implicit $xmm0155 ret float %val156}157 158define void @f5(ptr %a, ptr %b) {159 ; X86-LABEL: name: f5160 ; X86: bb.1 (%ir-block.0):161 ; X86-NEXT: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.1162 ; X86-NEXT: [[LOAD:%[0-9]+]]:gpr(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (p0) from %fixed-stack.1)163 ; X86-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.0164 ; X86-NEXT: [[LOAD1:%[0-9]+]]:gpr(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load (p0) from %fixed-stack.0)165 ; X86-NEXT: [[LOAD2:%[0-9]+]]:gpr(s32) = G_LOAD [[LOAD]](p0) :: (load (s32) from %ir.a, align 8)166 ; X86-NEXT: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 4167 ; X86-NEXT: [[PTR_ADD:%[0-9]+]]:gpr(p0) = nuw inbounds G_PTR_ADD [[LOAD]], [[C]](s32)168 ; X86-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY [[PTR_ADD]](p0)169 ; X86-NEXT: [[LOAD3:%[0-9]+]]:gpr(s32) = G_LOAD [[COPY]](p0) :: (load (s32) from %ir.a + 4, basealign 8)170 ; X86-NEXT: [[MV:%[0-9]+]]:gpr(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32)171 ; X86-NEXT: [[LOAD4:%[0-9]+]]:gpr(s32) = G_LOAD [[LOAD1]](p0) :: (load (s32) from %ir.b, align 8)172 ; X86-NEXT: [[PTR_ADD1:%[0-9]+]]:gpr(p0) = nuw inbounds G_PTR_ADD [[LOAD1]], [[C]](s32)173 ; X86-NEXT: [[LOAD5:%[0-9]+]]:gpr(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s32) from %ir.b + 4, basealign 8)174 ; X86-NEXT: [[MV1:%[0-9]+]]:gpr(s64) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32)175 ; X86-NEXT: [[COPY1:%[0-9]+]]:psr(s64) = COPY [[MV]](s64)176 ; X86-NEXT: [[COPY2:%[0-9]+]]:psr(s64) = COPY [[MV1]](s64)177 ; X86-NEXT: [[FADD:%[0-9]+]]:psr(s64) = G_FADD [[COPY1]], [[COPY2]]178 ; X86-NEXT: [[COPY3:%[0-9]+]]:gpr(s64) = COPY [[FADD]](s64)179 ; X86-NEXT: [[UV:%[0-9]+]]:gpr(s32), [[UV1:%[0-9]+]]:gpr(s32) = G_UNMERGE_VALUES [[COPY3]](s64)180 ; X86-NEXT: G_STORE [[UV]](s32), [[LOAD]](p0) :: (store (s32) into %ir.a, align 8)181 ; X86-NEXT: G_STORE [[UV1]](s32), [[PTR_ADD]](p0) :: (store (s32) into %ir.a + 4, basealign 8)182 ; X86-NEXT: RET 0183 ;184 ; X64-LABEL: name: f5185 ; X64: bb.1 (%ir-block.0):186 ; X64-NEXT: liveins: $rdi, $rsi187 ; X64-NEXT: {{ $}}188 ; X64-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $rdi189 ; X64-NEXT: [[COPY1:%[0-9]+]]:gpr(p0) = COPY $rsi190 ; X64-NEXT: [[LOAD:%[0-9]+]]:psr(s64) = G_LOAD [[COPY]](p0) :: (load (s64) from %ir.a)191 ; X64-NEXT: [[LOAD1:%[0-9]+]]:psr(s64) = G_LOAD [[COPY1]](p0) :: (load (s64) from %ir.b)192 ; X64-NEXT: [[FADD:%[0-9]+]]:psr(s64) = G_FADD [[LOAD]], [[LOAD1]]193 ; X64-NEXT: G_STORE [[FADD]](s64), [[COPY]](p0) :: (store (s64) into %ir.a)194 ; X64-NEXT: RET 0195 %load1 = load double, ptr %a, align 8196 %load2 = load double, ptr %b, align 8197 %add = fadd double %load1, %load2198 store double %add, ptr %a, align 8199 ret void200}201 202define void @f6(ptr %0, ptr %1) {203 ; X86-LABEL: name: f6204 ; X86: bb.1 (%ir-block.2):205 ; X86-NEXT: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.1206 ; X86-NEXT: [[LOAD:%[0-9]+]]:gpr(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (p0) from %fixed-stack.1)207 ; X86-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %fixed-stack.0208 ; X86-NEXT: [[LOAD1:%[0-9]+]]:gpr(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load (p0) from %fixed-stack.0)209 ; X86-NEXT: [[C:%[0-9]+]]:psr(s32) = G_FCONSTANT float 2.000000e+01210 ; X86-NEXT: [[LOAD2:%[0-9]+]]:psr(s32) = G_LOAD [[LOAD]](p0) :: (load (s32) from %ir.0)211 ; X86-NEXT: [[FADD:%[0-9]+]]:psr(s32) = G_FADD [[LOAD2]], [[C]]212 ; X86-NEXT: G_STORE [[FADD]](s32), [[LOAD1]](p0) :: (store (s32) into %ir.1)213 ; X86-NEXT: RET 0214 ;215 ; X64-LABEL: name: f6216 ; X64: bb.1 (%ir-block.2):217 ; X64-NEXT: liveins: $rdi, $rsi218 ; X64-NEXT: {{ $}}219 ; X64-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $rdi220 ; X64-NEXT: [[COPY1:%[0-9]+]]:gpr(p0) = COPY $rsi221 ; X64-NEXT: [[C:%[0-9]+]]:psr(s32) = G_FCONSTANT float 2.000000e+01222 ; X64-NEXT: [[LOAD:%[0-9]+]]:psr(s32) = G_LOAD [[COPY]](p0) :: (load (s32) from %ir.0)223 ; X64-NEXT: [[FADD:%[0-9]+]]:psr(s32) = G_FADD [[LOAD]], [[C]]224 ; X64-NEXT: G_STORE [[FADD]](s32), [[COPY1]](p0) :: (store (s32) into %ir.1)225 ; X64-NEXT: RET 0226 %load1 = load float, ptr %0227 %add = fadd float %load1, 20.0228 store float %add, ptr %1229 ret void230}231