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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL3--- |4 5 define i64 @test_ashr_i64(i64 %arg1, i64 %arg2) {6 %res = ashr i64 %arg1, %arg27 ret i64 %res8 }9 10 define i64 @test_ashr_i64_imm(i64 %arg1) {11 %res = ashr i64 %arg1, 512 ret i64 %res13 }14 15 define i32 @test_ashr_i32(i32 %arg1, i32 %arg2) {16 %res = ashr i32 %arg1, %arg217 ret i32 %res18 }19 20 define i32 @test_ashr_i32_imm(i32 %arg1) {21 %res = ashr i32 %arg1, 522 ret i32 %res23 }24 25 define i16 @test_ashr_i16(i32 %arg1, i32 %arg2) {26 %a = trunc i32 %arg1 to i1627 %a2 = trunc i32 %arg2 to i1628 %res = ashr i16 %a, %a229 ret i16 %res30 }31 32 define i16 @test_ashr_i16_imm(i32 %arg1) {33 %a = trunc i32 %arg1 to i1634 %res = ashr i16 %a, 535 ret i16 %res36 }37 38 define i8 @test_ashr_i8(i32 %arg1, i32 %arg2) {39 %a = trunc i32 %arg1 to i840 %a2 = trunc i32 %arg2 to i841 %res = ashr i8 %a, %a242 ret i8 %res43 }44 45 define i8 @test_ashr_i8_imm(i32 %arg1) {46 %a = trunc i32 %arg1 to i847 %res = ashr i8 %a, 548 ret i8 %res49 }50...51---52name: test_ashr_i6453alignment: 1654legalized: true55regBankSelected: true56tracksRegLiveness: true57registers:58 - { id: 0, class: gpr, preferred-register: '' }59 - { id: 1, class: gpr, preferred-register: '' }60 - { id: 2, class: gpr, preferred-register: '' }61 - { id: 3, class: gpr, preferred-register: '' }62liveins:63fixedStack:64stack:65constants:66body: |67 bb.1 (%ir-block.0):68 liveins: $rdi, $rsi69 70 ; ALL-LABEL: name: test_ashr_i6471 ; ALL: liveins: $rdi, $rsi72 ; ALL-NEXT: {{ $}}73 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi74 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr64_with_sub_8bit = COPY $rsi75 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit76 ; ALL-NEXT: $cl = COPY [[COPY2]]77 ; ALL-NEXT: [[SAR64rCL:%[0-9]+]]:gr64 = SAR64rCL [[COPY]], implicit-def dead $eflags, implicit $cl78 ; ALL-NEXT: $rax = COPY [[SAR64rCL]]79 ; ALL-NEXT: RET 0, implicit $rax80 %0(s64) = COPY $rdi81 %1(s64) = COPY $rsi82 %2(s8) = G_TRUNC %183 %3(s64) = G_ASHR %0, %284 $rax = COPY %3(s64)85 RET 0, implicit $rax86 87...88---89name: test_ashr_i64_imm90alignment: 1691legalized: true92regBankSelected: true93tracksRegLiveness: true94registers:95 - { id: 0, class: gpr, preferred-register: '' }96 - { id: 1, class: gpr, preferred-register: '' }97 - { id: 2, class: gpr, preferred-register: '' }98liveins:99fixedStack:100stack:101constants:102body: |103 bb.1 (%ir-block.0):104 liveins: $rdi105 106 ; ALL-LABEL: name: test_ashr_i64_imm107 ; ALL: liveins: $rdi108 ; ALL-NEXT: {{ $}}109 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi110 ; ALL-NEXT: [[SAR64ri:%[0-9]+]]:gr64 = SAR64ri [[COPY]], 5, implicit-def dead $eflags111 ; ALL-NEXT: $rax = COPY [[SAR64ri]]112 ; ALL-NEXT: RET 0, implicit $rax113 %0(s64) = COPY $rdi114 %1(s8) = G_CONSTANT i8 5115 %2(s64) = G_ASHR %0, %1116 $rax = COPY %2(s64)117 RET 0, implicit $rax118 119...120---121name: test_ashr_i32122alignment: 16123legalized: true124regBankSelected: true125tracksRegLiveness: true126registers:127 - { id: 0, class: gpr, preferred-register: '' }128 - { id: 1, class: gpr, preferred-register: '' }129 - { id: 2, class: gpr, preferred-register: '' }130 - { id: 3, class: gpr, preferred-register: '' }131liveins:132fixedStack:133stack:134constants:135body: |136 bb.1 (%ir-block.0):137 liveins: $edi, $esi138 139 ; ALL-LABEL: name: test_ashr_i32140 ; ALL: liveins: $edi, $esi141 ; ALL-NEXT: {{ $}}142 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi143 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi144 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit145 ; ALL-NEXT: $cl = COPY [[COPY2]]146 ; ALL-NEXT: [[SAR32rCL:%[0-9]+]]:gr32 = SAR32rCL [[COPY]], implicit-def dead $eflags, implicit $cl147 ; ALL-NEXT: $eax = COPY [[SAR32rCL]]148 ; ALL-NEXT: RET 0, implicit $eax149 %0(s32) = COPY $edi150 %1(s32) = COPY $esi151 %2(s8) = G_TRUNC %1152 %3(s32) = G_ASHR %0, %2153 $eax = COPY %3(s32)154 RET 0, implicit $eax155 156...157---158name: test_ashr_i32_imm159alignment: 16160legalized: true161regBankSelected: true162tracksRegLiveness: true163registers:164 - { id: 0, class: gpr, preferred-register: '' }165 - { id: 1, class: gpr, preferred-register: '' }166 - { id: 2, class: gpr, preferred-register: '' }167liveins:168fixedStack:169stack:170constants:171body: |172 bb.1 (%ir-block.0):173 liveins: $edi174 175 ; ALL-LABEL: name: test_ashr_i32_imm176 ; ALL: liveins: $edi177 ; ALL-NEXT: {{ $}}178 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi179 ; ALL-NEXT: [[SAR32ri:%[0-9]+]]:gr32 = SAR32ri [[COPY]], 5, implicit-def dead $eflags180 ; ALL-NEXT: $eax = COPY [[SAR32ri]]181 ; ALL-NEXT: RET 0, implicit $eax182 %0(s32) = COPY $edi183 %1(s8) = G_CONSTANT i8 5184 %2(s32) = G_ASHR %0, %1185 $eax = COPY %2(s32)186 RET 0, implicit $eax187 188...189---190name: test_ashr_i16191alignment: 16192legalized: true193regBankSelected: true194tracksRegLiveness: true195registers:196 - { id: 0, class: gpr, preferred-register: '' }197 - { id: 1, class: gpr, preferred-register: '' }198 - { id: 2, class: gpr, preferred-register: '' }199 - { id: 3, class: gpr, preferred-register: '' }200 - { id: 4, class: gpr, preferred-register: '' }201liveins:202fixedStack:203stack:204constants:205body: |206 bb.1 (%ir-block.0):207 liveins: $edi, $esi208 209 ; ALL-LABEL: name: test_ashr_i16210 ; ALL: liveins: $edi, $esi211 ; ALL-NEXT: {{ $}}212 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi213 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi214 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit215 ; ALL-NEXT: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit216 ; ALL-NEXT: $cl = COPY [[COPY3]]217 ; ALL-NEXT: [[SAR16rCL:%[0-9]+]]:gr16 = SAR16rCL [[COPY2]], implicit-def dead $eflags, implicit $cl218 ; ALL-NEXT: $ax = COPY [[SAR16rCL]]219 ; ALL-NEXT: RET 0, implicit $ax220 %0(s32) = COPY $edi221 %1(s32) = COPY $esi222 %2(s16) = G_TRUNC %0(s32)223 %3(s8) = G_TRUNC %1(s32)224 %4(s16) = G_ASHR %2, %3225 $ax = COPY %4(s16)226 RET 0, implicit $ax227 228...229---230name: test_ashr_i16_imm231alignment: 16232legalized: true233regBankSelected: true234tracksRegLiveness: true235registers:236 - { id: 0, class: gpr, preferred-register: '' }237 - { id: 1, class: gpr, preferred-register: '' }238 - { id: 2, class: gpr, preferred-register: '' }239 - { id: 3, class: gpr, preferred-register: '' }240liveins:241fixedStack:242stack:243constants:244body: |245 bb.1 (%ir-block.0):246 liveins: $edi247 248 ; ALL-LABEL: name: test_ashr_i16_imm249 ; ALL: liveins: $edi250 ; ALL-NEXT: {{ $}}251 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi252 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit253 ; ALL-NEXT: [[SAR16ri:%[0-9]+]]:gr16 = SAR16ri [[COPY1]], 5, implicit-def dead $eflags254 ; ALL-NEXT: $ax = COPY [[SAR16ri]]255 ; ALL-NEXT: RET 0, implicit $ax256 %0(s32) = COPY $edi257 %2(s8) = G_CONSTANT i8 5258 %1(s16) = G_TRUNC %0(s32)259 %3(s16) = G_ASHR %1, %2260 $ax = COPY %3(s16)261 RET 0, implicit $ax262 263...264---265name: test_ashr_i8266alignment: 16267legalized: true268regBankSelected: true269tracksRegLiveness: true270registers:271 - { id: 0, class: gpr, preferred-register: '' }272 - { id: 1, class: gpr, preferred-register: '' }273 - { id: 2, class: gpr, preferred-register: '' }274 - { id: 3, class: gpr, preferred-register: '' }275 - { id: 4, class: gpr, preferred-register: '' }276liveins:277fixedStack:278stack:279constants:280body: |281 bb.1 (%ir-block.0):282 liveins: $edi, $esi283 284 ; ALL-LABEL: name: test_ashr_i8285 ; ALL: liveins: $edi, $esi286 ; ALL-NEXT: {{ $}}287 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi288 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi289 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit290 ; ALL-NEXT: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit291 ; ALL-NEXT: $cl = COPY [[COPY3]]292 ; ALL-NEXT: [[SAR8rCL:%[0-9]+]]:gr8 = SAR8rCL [[COPY2]], implicit-def dead $eflags, implicit $cl293 ; ALL-NEXT: $al = COPY [[SAR8rCL]]294 ; ALL-NEXT: RET 0, implicit $al295 %0(s32) = COPY $edi296 %1(s32) = COPY $esi297 %2(s8) = G_TRUNC %0(s32)298 %3(s8) = G_TRUNC %1(s32)299 %4(s8) = G_ASHR %2, %3300 $al = COPY %4(s8)301 RET 0, implicit $al302 303...304---305name: test_ashr_i8_imm306alignment: 16307legalized: true308regBankSelected: true309tracksRegLiveness: true310registers:311 - { id: 0, class: gpr, preferred-register: '' }312 - { id: 1, class: gpr, preferred-register: '' }313 - { id: 2, class: gpr, preferred-register: '' }314 - { id: 3, class: gpr, preferred-register: '' }315liveins:316fixedStack:317stack:318constants:319body: |320 bb.1 (%ir-block.0):321 liveins: $edi322 323 ; ALL-LABEL: name: test_ashr_i8_imm324 ; ALL: liveins: $edi325 ; ALL-NEXT: {{ $}}326 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi327 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit328 ; ALL-NEXT: [[SAR8ri:%[0-9]+]]:gr8 = SAR8ri [[COPY1]], 5, implicit-def dead $eflags329 ; ALL-NEXT: $al = COPY [[SAR8ri]]330 ; ALL-NEXT: RET 0, implicit $al331 %0(s32) = COPY $edi332 %2(s8) = G_CONSTANT i8 5333 %1(s8) = G_TRUNC %0(s32)334 %3(s8) = G_ASHR %1, %2335 $al = COPY %3(s8)336 RET 0, implicit $al337 338...339