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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 62# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,X863# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,X644 5--- |6 7 define void @test_copy() {8 ret void9 }10 11 define void @test_copy2() {12 ret void13 }14 15 define void @test_copy3() {16 ret void17 }18 19 define void @test_copy4() {20 ret void21 }22 23 define void @test_copy5() {24 ret void25 }26 27 define void @test_copy6() {28 ret void29 }30 31...32---33name: test_copy34alignment: 1635legalized: true36regBankSelected: true37registers:38 - { id: 0, class: gpr, preferred-register: '' }39 - { id: 1, class: gpr, preferred-register: '' }40body: |41 bb.1 (%ir-block.0):42 liveins: $eax43 44 ; CHECK-LABEL: name: test_copy45 ; CHECK: liveins: $eax46 ; CHECK-NEXT: {{ $}}47 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr8 = COPY $al48 ; CHECK-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]]49 ; CHECK-NEXT: $eax = COPY [[MOVZX32rr8_]]50 ; CHECK-NEXT: RET 0, implicit $eax51 %0(s8) = COPY $al52 %1(s32) = G_ZEXT %0(s8)53 $eax = COPY %1(s32)54 RET 0, implicit $eax55 56...57---58name: test_copy259alignment: 1660legalized: true61regBankSelected: true62registers:63 - { id: 0, class: gpr, preferred-register: '' }64 - { id: 1, class: gpr, preferred-register: '' }65body: |66 bb.1 (%ir-block.0):67 liveins: $eax68 69 ; CHECK-LABEL: name: test_copy270 ; CHECK: liveins: $eax71 ; CHECK-NEXT: {{ $}}72 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr8 = COPY $al73 ; CHECK-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]]74 ; CHECK-NEXT: $eax = COPY [[MOVZX32rr8_]]75 ; CHECK-NEXT: RET 0, implicit $eax76 %0(s8) = COPY $al77 %1(s32) = G_ZEXT %0(s8)78 $eax = COPY %1(s32)79 RET 0, implicit $eax80 81...82---83name: test_copy384alignment: 1685legalized: true86regBankSelected: true87registers:88 - { id: 0, class: gpr, preferred-register: '' }89 - { id: 1, class: gpr, preferred-register: '' }90 - { id: 2, class: gpr, preferred-register: '' }91body: |92 bb.1 (%ir-block.0):93 liveins: $eax94 95 ; X86-LABEL: name: test_copy396 ; X86: liveins: $eax97 ; X86-NEXT: {{ $}}98 ; X86-NEXT: [[COPY:%[0-9]+]]:gr16 = COPY $ax99 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr16_abcd = COPY [[COPY]]100 ; X86-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit101 ; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]]102 ; X86-NEXT: $eax = COPY [[MOVZX32rr8_]]103 ; X86-NEXT: RET 0, implicit $eax104 ;105 ; X64-LABEL: name: test_copy3106 ; X64: liveins: $eax107 ; X64-NEXT: {{ $}}108 ; X64-NEXT: [[COPY:%[0-9]+]]:gr16 = COPY $ax109 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit110 ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]]111 ; X64-NEXT: $eax = COPY [[MOVZX32rr8_]]112 ; X64-NEXT: RET 0, implicit $eax113 %0(s16) = COPY $ax114 %1(s8) = G_TRUNC %0(s16)115 %2(s32) = G_ZEXT %1(s8)116 $eax = COPY %2(s32)117 RET 0, implicit $eax118 119...120---121name: test_copy4122alignment: 16123legalized: true124regBankSelected: true125registers:126 - { id: 0, class: gpr, preferred-register: '' }127 - { id: 1, class: gpr, preferred-register: '' }128 - { id: 2, class: gpr, preferred-register: '' }129body: |130 bb.1 (%ir-block.0):131 liveins: $eax132 133 ; CHECK-LABEL: name: test_copy4134 ; CHECK: liveins: $eax135 ; CHECK-NEXT: {{ $}}136 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $eax137 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit138 ; CHECK-NEXT: [[MOVZX32rr16_:%[0-9]+]]:gr32 = MOVZX32rr16 [[COPY1]]139 ; CHECK-NEXT: $eax = COPY [[MOVZX32rr16_]]140 ; CHECK-NEXT: RET 0, implicit $eax141 %0(s32) = COPY $eax142 %1(s16) = G_TRUNC %0(s32)143 %2(s32) = G_ZEXT %1(s16)144 $eax = COPY %2(s32)145 RET 0, implicit $eax146 147...148---149name: test_copy5150alignment: 16151legalized: true152regBankSelected: true153registers:154 - { id: 0, class: gpr, preferred-register: '' }155 - { id: 1, class: gpr, preferred-register: '' }156 - { id: 2, class: gpr, preferred-register: '' }157body: |158 bb.1 (%ir-block.0):159 liveins: $eax,$edx160 161 ; X86-LABEL: name: test_copy5162 ; X86: liveins: $eax, $edx163 ; X86-NEXT: {{ $}}164 ; X86-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edx165 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]]166 ; X86-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit167 ; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]]168 ; X86-NEXT: $eax = COPY [[MOVZX32rr8_]]169 ; X86-NEXT: RET 0, implicit $eax170 ;171 ; X64-LABEL: name: test_copy5172 ; X64: liveins: $eax, $edx173 ; X64-NEXT: {{ $}}174 ; X64-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edx175 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit176 ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]]177 ; X64-NEXT: $eax = COPY [[MOVZX32rr8_]]178 ; X64-NEXT: RET 0, implicit $eax179 %0(s32) = COPY $edx180 %1(s8) = G_TRUNC %0(s32)181 %2(s32) = G_ANYEXT %1(s8)182 $eax = COPY %2(s32)183 RET 0, implicit $eax184 185...186---187name: test_copy6188alignment: 16189legalized: true190regBankSelected: true191registers:192 - { id: 0, class: gpr, preferred-register: '' }193 - { id: 1, class: gpr, preferred-register: '' }194 - { id: 2, class: gpr, preferred-register: '' }195body: |196 bb.1 (%ir-block.0):197 liveins: $eax,$edx198 199 ; CHECK-LABEL: name: test_copy6200 ; CHECK: liveins: $eax, $edx201 ; CHECK-NEXT: {{ $}}202 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edx203 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit204 ; CHECK-NEXT: [[DEF:%[0-9]+]]:low32_addr_access_rbp = IMPLICIT_DEF205 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access_rbp = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit206 ; CHECK-NEXT: $eax = COPY [[INSERT_SUBREG]]207 ; CHECK-NEXT: RET 0, implicit $eax208 %0(s32) = COPY $edx209 %1(s16) = G_TRUNC %0(s32)210 %2(s32) = G_ANYEXT %1(s16)211 $eax = COPY %2(s32)212 RET 0, implicit $eax213 214...215