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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X863# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X644 5--- |6 define i8 @test_zext_i1toi8(i1 %a) {7 %r = zext i1 %a to i88 ret i8 %r9 }10 11 define i16 @test_zext_i1toi16(i1 %a) {12 %r = zext i1 %a to i1613 ret i16 %r14 }15 16 define i32 @test_zext_i1(i1 %a) {17 %r = zext i1 %a to i3218 ret i32 %r19 }20 21 define i32 @test_zext_i8(i8 %val) {22 %r = zext i8 %val to i3223 ret i32 %r24 }25 26 define i32 @test_zext_i16(i16 %val) {27 %r = zext i16 %val to i3228 ret i32 %r29 }30 31 define i32 @test_sext_i8(i8 %val) {32 %r = sext i8 %val to i3233 ret i32 %r34 }35 36 define i32 @test_sext_i16(i16 %val) {37 %r = sext i16 %val to i3238 ret i32 %r39 }40 41 define void @test_anyext_i1toi8() { ret void }42 define void @test_anyext_i1toi16() { ret void }43 define void @test_anyext_i1toi32() { ret void }44 define void @test_anyext_i8toi16() { ret void }45 define void @test_anyext_i8toi32() { ret void }46 define void @test_anyext_i16toi32() { ret void }47 48...49---50name: test_zext_i1toi851alignment: 1652legalized: true53regBankSelected: true54registers:55 - { id: 0, class: gpr, preferred-register: '' }56 - { id: 1, class: gpr, preferred-register: '' }57 - { id: 2, class: gpr, preferred-register: '' }58 59body: |60 bb.1 (%ir-block.0):61 liveins: $edi62 63 ; X86-LABEL: name: test_zext_i1toi864 ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi65 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit66 ; X86-NEXT: [[AND8ri:%[0-9]+]]:gr8 = AND8ri [[COPY1]], 1, implicit-def $eflags67 ; X86-NEXT: $al = COPY [[AND8ri]]68 ; X86-NEXT: RET 0, implicit $al69 ; X64-LABEL: name: test_zext_i1toi870 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi71 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit72 ; X64-NEXT: [[AND8ri:%[0-9]+]]:gr8 = AND8ri [[COPY1]], 1, implicit-def $eflags73 ; X64-NEXT: $al = COPY [[AND8ri]]74 ; X64-NEXT: RET 0, implicit $al75 %0(s32) = COPY $edi76 %1(s1) = G_TRUNC %0(s32)77 %2(s8) = G_ZEXT %1(s1)78 $al = COPY %2(s8)79 RET 0, implicit $al80 81...82---83name: test_zext_i1toi1684alignment: 1685legalized: true86regBankSelected: true87registers:88 - { id: 0, class: gpr, preferred-register: '' }89 - { id: 1, class: gpr, preferred-register: '' }90 - { id: 2, class: gpr, preferred-register: '' }91 92body: |93 bb.1 (%ir-block.0):94 liveins: $edi95 96 ; X86-LABEL: name: test_zext_i1toi1697 ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi98 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit99 ; X86-NEXT: [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF100 ; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr16 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit101 ; X86-NEXT: [[AND16ri_:%[0-9]+]]:gr16 = AND16ri [[INSERT_SUBREG]], 1, implicit-def $eflags102 ; X86-NEXT: $ax = COPY [[AND16ri_]]103 ; X86-NEXT: RET 0, implicit $ax104 ; X64-LABEL: name: test_zext_i1toi16105 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi106 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit107 ; X64-NEXT: [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF108 ; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr16 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit109 ; X64-NEXT: [[AND16ri_:%[0-9]+]]:gr16 = AND16ri [[INSERT_SUBREG]], 1, implicit-def $eflags110 ; X64-NEXT: $ax = COPY [[AND16ri_]]111 ; X64-NEXT: RET 0, implicit $ax112 %0(s32) = COPY $edi113 %1(s1) = G_TRUNC %0(s32)114 %2(s16) = G_ZEXT %1(s1)115 $ax = COPY %2(s16)116 RET 0, implicit $ax117 118...119---120name: test_zext_i1121alignment: 16122legalized: true123regBankSelected: true124registers:125 - { id: 0, class: gpr }126 - { id: 1, class: gpr }127 - { id: 2, class: gpr }128 129body: |130 bb.1 (%ir-block.0):131 liveins: $edi132 133 ; X86-LABEL: name: test_zext_i1134 ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi135 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit136 ; X86-NEXT: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF137 ; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr32 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit138 ; X86-NEXT: [[AND32ri_:%[0-9]+]]:gr32 = AND32ri [[INSERT_SUBREG]], 1, implicit-def $eflags139 ; X86-NEXT: $eax = COPY [[AND32ri_]]140 ; X86-NEXT: RET 0, implicit $eax141 ; X64-LABEL: name: test_zext_i1142 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi143 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit144 ; X64-NEXT: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF145 ; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr32 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit146 ; X64-NEXT: [[AND32ri_:%[0-9]+]]:gr32 = AND32ri [[INSERT_SUBREG]], 1, implicit-def $eflags147 ; X64-NEXT: $eax = COPY [[AND32ri_]]148 ; X64-NEXT: RET 0, implicit $eax149 %0(s32) = COPY $edi150 %1(s1) = G_TRUNC %0(s32)151 %2(s32) = G_ZEXT %1(s1)152 $eax = COPY %2(s32)153 RET 0, implicit $eax154 155...156---157name: test_zext_i8158alignment: 16159legalized: true160regBankSelected: true161registers:162 - { id: 0, class: gpr }163 - { id: 1, class: gpr }164 165body: |166 bb.1 (%ir-block.0):167 liveins: $edi168 169 ; X86-LABEL: name: test_zext_i8170 ; X86: [[COPY:%[0-9]+]]:gr8 = COPY $dil171 ; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]]172 ; X86-NEXT: $eax = COPY [[MOVZX32rr8_]]173 ; X86-NEXT: RET 0, implicit $eax174 ; X64-LABEL: name: test_zext_i8175 ; X64: [[COPY:%[0-9]+]]:gr8 = COPY $dil176 ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]]177 ; X64-NEXT: $eax = COPY [[MOVZX32rr8_]]178 ; X64-NEXT: RET 0, implicit $eax179 %0(s8) = COPY $dil180 %1(s32) = G_ZEXT %0(s8)181 $eax = COPY %1(s32)182 RET 0, implicit $eax183 184...185---186name: test_zext_i16187alignment: 16188legalized: true189regBankSelected: true190registers:191 - { id: 0, class: gpr }192 - { id: 1, class: gpr }193 194body: |195 bb.1 (%ir-block.0):196 liveins: $edi197 198 ; X86-LABEL: name: test_zext_i16199 ; X86: [[COPY:%[0-9]+]]:gr16 = COPY $di200 ; X86-NEXT: [[MOVZX32rr16_:%[0-9]+]]:gr32 = MOVZX32rr16 [[COPY]]201 ; X86-NEXT: $eax = COPY [[MOVZX32rr16_]]202 ; X86-NEXT: RET 0, implicit $eax203 ; X64-LABEL: name: test_zext_i16204 ; X64: [[COPY:%[0-9]+]]:gr16 = COPY $di205 ; X64-NEXT: [[MOVZX32rr16_:%[0-9]+]]:gr32 = MOVZX32rr16 [[COPY]]206 ; X64-NEXT: $eax = COPY [[MOVZX32rr16_]]207 ; X64-NEXT: RET 0, implicit $eax208 %0(s16) = COPY $di209 %1(s32) = G_ZEXT %0(s16)210 $eax = COPY %1(s32)211 RET 0, implicit $eax212 213...214---215name: test_sext_i8216alignment: 16217legalized: true218regBankSelected: true219registers:220 - { id: 0, class: gpr }221 - { id: 1, class: gpr }222 223body: |224 bb.1 (%ir-block.0):225 liveins: $edi226 227 ; X86-LABEL: name: test_sext_i8228 ; X86: [[COPY:%[0-9]+]]:gr8 = COPY $dil229 ; X86-NEXT: [[MOVSX32rr8_:%[0-9]+]]:gr32 = MOVSX32rr8 [[COPY]]230 ; X86-NEXT: $eax = COPY [[MOVSX32rr8_]]231 ; X86-NEXT: RET 0, implicit $eax232 ; X64-LABEL: name: test_sext_i8233 ; X64: [[COPY:%[0-9]+]]:gr8 = COPY $dil234 ; X64-NEXT: [[MOVSX32rr8_:%[0-9]+]]:gr32 = MOVSX32rr8 [[COPY]]235 ; X64-NEXT: $eax = COPY [[MOVSX32rr8_]]236 ; X64-NEXT: RET 0, implicit $eax237 %0(s8) = COPY $dil238 %1(s32) = G_SEXT %0(s8)239 $eax = COPY %1(s32)240 RET 0, implicit $eax241 242...243---244name: test_sext_i16245alignment: 16246legalized: true247regBankSelected: true248registers:249 - { id: 0, class: gpr }250 - { id: 1, class: gpr }251 252body: |253 bb.1 (%ir-block.0):254 liveins: $edi255 256 ; X86-LABEL: name: test_sext_i16257 ; X86: [[COPY:%[0-9]+]]:gr16 = COPY $di258 ; X86-NEXT: [[MOVSX32rr16_:%[0-9]+]]:gr32 = MOVSX32rr16 [[COPY]]259 ; X86-NEXT: $eax = COPY [[MOVSX32rr16_]]260 ; X86-NEXT: RET 0, implicit $eax261 ; X64-LABEL: name: test_sext_i16262 ; X64: [[COPY:%[0-9]+]]:gr16 = COPY $di263 ; X64-NEXT: [[MOVSX32rr16_:%[0-9]+]]:gr32 = MOVSX32rr16 [[COPY]]264 ; X64-NEXT: $eax = COPY [[MOVSX32rr16_]]265 ; X64-NEXT: RET 0, implicit $eax266 %0(s16) = COPY $di267 %1(s32) = G_SEXT %0(s16)268 $eax = COPY %1(s32)269 RET 0, implicit $eax270 271...272---273name: test_anyext_i1toi8274alignment: 16275legalized: true276regBankSelected: true277registers:278 - { id: 0, class: gpr }279 - { id: 1, class: gpr }280 - { id: 2, class: gpr }281 282body: |283 bb.1 (%ir-block.0):284 liveins: $edi285 286 ; X86-LABEL: name: test_anyext_i1toi8287 ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi288 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit289 ; X86-NEXT: $al = COPY [[COPY1]]290 ; X86-NEXT: RET 0, implicit $al291 ; X64-LABEL: name: test_anyext_i1toi8292 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi293 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit294 ; X64-NEXT: $al = COPY [[COPY1]]295 ; X64-NEXT: RET 0, implicit $al296 %0(s32) = COPY $edi297 %1(s1) = G_TRUNC %0(s32)298 %2(s8) = G_ANYEXT %1(s1)299 $al = COPY %2(s8)300 RET 0, implicit $al301...302---303name: test_anyext_i1toi16304alignment: 16305legalized: true306regBankSelected: true307registers:308 - { id: 0, class: gpr }309 - { id: 1, class: gpr }310 - { id: 2, class: gpr }311 312body: |313 bb.1 (%ir-block.0):314 liveins: $edi315 316 ; X86-LABEL: name: test_anyext_i1toi16317 ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi318 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit319 ; X86-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr16 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit320 ; X86-NEXT: $ax = COPY [[SUBREG_TO_REG]]321 ; X86-NEXT: RET 0, implicit $ax322 ; X64-LABEL: name: test_anyext_i1toi16323 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi324 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit325 ; X64-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr16 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit326 ; X64-NEXT: $ax = COPY [[SUBREG_TO_REG]]327 ; X64-NEXT: RET 0, implicit $ax328 %0(s32) = COPY $edi329 %1(s1) = G_TRUNC %0(s32)330 %2(s16) = G_ANYEXT %1(s1)331 $ax = COPY %2(s16)332 RET 0, implicit $ax333...334---335name: test_anyext_i1toi32336alignment: 16337legalized: true338regBankSelected: true339registers:340 - { id: 0, class: gpr }341 - { id: 1, class: gpr }342 - { id: 2, class: gpr }343 344body: |345 bb.1 (%ir-block.0):346 liveins: $edi347 348 ; X86-LABEL: name: test_anyext_i1toi32349 ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi350 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit351 ; X86-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit352 ; X86-NEXT: $eax = COPY [[SUBREG_TO_REG]]353 ; X86-NEXT: RET 0, implicit $eax354 ; X64-LABEL: name: test_anyext_i1toi32355 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi356 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit357 ; X64-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit358 ; X64-NEXT: $eax = COPY [[SUBREG_TO_REG]]359 ; X64-NEXT: RET 0, implicit $eax360 %0(s32) = COPY $edi361 %1(s1) = G_TRUNC %0(s32)362 %2(s32) = G_ANYEXT %1(s1)363 $eax = COPY %2(s32)364 RET 0, implicit $eax365...366---367name: test_anyext_i8toi16368alignment: 16369legalized: true370regBankSelected: true371registers:372 - { id: 0, class: gpr }373 - { id: 1, class: gpr }374 - { id: 2, class: gpr }375 376body: |377 bb.1 (%ir-block.0):378 liveins: $edi379 380 ; X86-LABEL: name: test_anyext_i8toi16381 ; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi382 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]]383 ; X86-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit384 ; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]]385 ; X86-NEXT: [[COPY3:%[0-9]+]]:gr16 = COPY [[MOVZX32rr8_]].sub_16bit386 ; X86-NEXT: $ax = COPY [[COPY3]]387 ; X86-NEXT: RET 0, implicit $ax388 ; X64-LABEL: name: test_anyext_i8toi16389 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi390 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit391 ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]]392 ; X64-NEXT: [[COPY2:%[0-9]+]]:gr16 = COPY [[MOVZX32rr8_]].sub_16bit393 ; X64-NEXT: $ax = COPY [[COPY2]]394 ; X64-NEXT: RET 0, implicit $ax395 %0(s32) = COPY $edi396 %1(s8) = G_TRUNC %0(s32)397 %2(s16) = G_ANYEXT %1(s8)398 $ax = COPY %2(s16)399 RET 0, implicit $ax400...401---402name: test_anyext_i8toi32403alignment: 16404legalized: true405regBankSelected: true406registers:407 - { id: 0, class: gpr }408 - { id: 1, class: gpr }409 - { id: 2, class: gpr }410 411body: |412 bb.1 (%ir-block.0):413 liveins: $edi414 415 ; X86-LABEL: name: test_anyext_i8toi32416 ; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi417 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]]418 ; X86-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit419 ; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]]420 ; X86-NEXT: $eax = COPY [[MOVZX32rr8_]]421 ; X86-NEXT: RET 0, implicit $eax422 ; X64-LABEL: name: test_anyext_i8toi32423 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi424 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit425 ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]]426 ; X64-NEXT: $eax = COPY [[MOVZX32rr8_]]427 ; X64-NEXT: RET 0, implicit $eax428 %0(s32) = COPY $edi429 %1(s8) = G_TRUNC %0(s32)430 %2(s32) = G_ANYEXT %1(s8)431 $eax = COPY %2(s32)432 RET 0, implicit $eax433...434---435name: test_anyext_i16toi32436alignment: 16437legalized: true438regBankSelected: true439registers:440 - { id: 0, class: gpr }441 - { id: 1, class: gpr }442 - { id: 2, class: gpr }443 444body: |445 bb.1 (%ir-block.0):446 liveins: $edi447 448 ; X86-LABEL: name: test_anyext_i16toi32449 ; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi450 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit451 ; X86-NEXT: [[DEF:%[0-9]+]]:low32_addr_access_rbp = IMPLICIT_DEF452 ; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access_rbp = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit453 ; X86-NEXT: $eax = COPY [[INSERT_SUBREG]]454 ; X86-NEXT: RET 0, implicit $eax455 ; X64-LABEL: name: test_anyext_i16toi32456 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi457 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit458 ; X64-NEXT: [[DEF:%[0-9]+]]:low32_addr_access_rbp = IMPLICIT_DEF459 ; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access_rbp = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit460 ; X64-NEXT: $eax = COPY [[INSERT_SUBREG]]461 ; X64-NEXT: RET 0, implicit $eax462 %0(s32) = COPY $edi463 %1(s16) = G_TRUNC %0(s32)464 %2(s32) = G_ANYEXT %1(s16)465 $eax = COPY %2(s32)466 RET 0, implicit $eax467...468