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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s3# RUN: llc -mtriple=i386-linux-gnu -mattr=+sse2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s4 5--- |6 7 define i1 @fcmp_float_oeq(float %x, float %y) {8 %1 = fcmp oeq float %x, %y9 ret i1 %110 }11 12 define i1 @fcmp_float_ogt(float %x, float %y) {13 %1 = fcmp ogt float %x, %y14 ret i1 %115 }16 17 define i1 @fcmp_float_oge(float %x, float %y) {18 %1 = fcmp oge float %x, %y19 ret i1 %120 }21 22 define i1 @fcmp_float_olt(float %x, float %y) {23 %1 = fcmp olt float %x, %y24 ret i1 %125 }26 27 define i1 @fcmp_float_ole(float %x, float %y) {28 %1 = fcmp ole float %x, %y29 ret i1 %130 }31 32 define i1 @fcmp_float_one(float %x, float %y) {33 %1 = fcmp one float %x, %y34 ret i1 %135 }36 37 define i1 @fcmp_float_ord(float %x, float %y) {38 %1 = fcmp ord float %x, %y39 ret i1 %140 }41 42 define i1 @fcmp_float_uno(float %x, float %y) {43 %1 = fcmp uno float %x, %y44 ret i1 %145 }46 47 define i1 @fcmp_float_ueq(float %x, float %y) {48 %1 = fcmp ueq float %x, %y49 ret i1 %150 }51 52 define i1 @fcmp_float_ugt(float %x, float %y) {53 %1 = fcmp ugt float %x, %y54 ret i1 %155 }56 57 define i1 @fcmp_float_uge(float %x, float %y) {58 %1 = fcmp uge float %x, %y59 ret i1 %160 }61 62 define i1 @fcmp_float_ult(float %x, float %y) {63 %1 = fcmp ult float %x, %y64 ret i1 %165 }66 67 define i1 @fcmp_float_ule(float %x, float %y) {68 %1 = fcmp ule float %x, %y69 ret i1 %170 }71 72 define i1 @fcmp_float_une(float %x, float %y) {73 %1 = fcmp une float %x, %y74 ret i1 %175 }76 77 define i1 @fcmp_double_oeq(double %x, double %y) {78 %1 = fcmp oeq double %x, %y79 ret i1 %180 }81 82 define i1 @fcmp_double_ogt(double %x, double %y) {83 %1 = fcmp ogt double %x, %y84 ret i1 %185 }86 87 define i1 @fcmp_double_oge(double %x, double %y) {88 %1 = fcmp oge double %x, %y89 ret i1 %190 }91 92 define i1 @fcmp_double_olt(double %x, double %y) {93 %1 = fcmp olt double %x, %y94 ret i1 %195 }96 97 define i1 @fcmp_double_ole(double %x, double %y) {98 %1 = fcmp ole double %x, %y99 ret i1 %1100 }101 102 define i1 @fcmp_double_one(double %x, double %y) {103 %1 = fcmp one double %x, %y104 ret i1 %1105 }106 107 define i1 @fcmp_double_ord(double %x, double %y) {108 %1 = fcmp ord double %x, %y109 ret i1 %1110 }111 112 define i1 @fcmp_double_uno(double %x, double %y) {113 %1 = fcmp uno double %x, %y114 ret i1 %1115 }116 117 define i1 @fcmp_double_ueq(double %x, double %y) {118 %1 = fcmp ueq double %x, %y119 ret i1 %1120 }121 122 define i1 @fcmp_double_ugt(double %x, double %y) {123 %1 = fcmp ugt double %x, %y124 ret i1 %1125 }126 127 define i1 @fcmp_double_uge(double %x, double %y) {128 %1 = fcmp uge double %x, %y129 ret i1 %1130 }131 132 define i1 @fcmp_double_ult(double %x, double %y) {133 %1 = fcmp ult double %x, %y134 ret i1 %1135 }136 137 define i1 @fcmp_double_ule(double %x, double %y) {138 %1 = fcmp ule double %x, %y139 ret i1 %1140 }141 142 define i1 @fcmp_double_une(double %x, double %y) {143 %1 = fcmp une double %x, %y144 ret i1 %1145 }146 147...148---149name: fcmp_float_oeq150alignment: 16151legalized: true152regBankSelected: true153tracksRegLiveness: true154registers:155 - { id: 0, class: vecr }156 - { id: 1, class: vecr }157 - { id: 2, class: vecr }158 - { id: 3, class: vecr }159 - { id: 4, class: _ }160 - { id: 5, class: gpr }161 - { id: 6, class: gpr }162body: |163 bb.1 (%ir-block.0):164 liveins: $xmm0, $xmm1165 166 ; CHECK-LABEL: name: fcmp_float_oeq167 ; CHECK: liveins: $xmm0, $xmm1168 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0169 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]170 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1171 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]172 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags173 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags174 ; CHECK: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags175 ; CHECK: [[AND8rr:%[0-9]+]]:gr8 = AND8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags176 ; CHECK: $al = COPY [[AND8rr]]177 ; CHECK: RET 0, implicit $al178 %2:vecr(s128) = COPY $xmm0179 %0:vecr(s32) = G_TRUNC %2(s128)180 %3:vecr(s128) = COPY $xmm1181 %1:vecr(s32) = G_TRUNC %3(s128)182 %6:gpr(s8) = G_FCMP floatpred(oeq), %0(s32), %1183 %5:gpr(s8) = COPY %6(s8)184 $al = COPY %5(s8)185 RET 0, implicit $al186 187...188---189name: fcmp_float_ogt190alignment: 16191legalized: true192regBankSelected: true193tracksRegLiveness: true194registers:195 - { id: 0, class: vecr }196 - { id: 1, class: vecr }197 - { id: 2, class: vecr }198 - { id: 3, class: vecr }199 - { id: 4, class: _ }200 - { id: 5, class: gpr }201 - { id: 6, class: gpr }202body: |203 bb.1 (%ir-block.0):204 liveins: $xmm0, $xmm1205 206 ; CHECK-LABEL: name: fcmp_float_ogt207 ; CHECK: liveins: $xmm0, $xmm1208 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0209 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]210 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1211 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]212 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags213 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags214 ; CHECK: $al = COPY [[SETCCr]]215 ; CHECK: RET 0, implicit $al216 %2:vecr(s128) = COPY $xmm0217 %0:vecr(s32) = G_TRUNC %2(s128)218 %3:vecr(s128) = COPY $xmm1219 %1:vecr(s32) = G_TRUNC %3(s128)220 %6:gpr(s8) = G_FCMP floatpred(ogt), %0(s32), %1221 %5:gpr(s8) = COPY %6(s8)222 $al = COPY %5(s8)223 RET 0, implicit $al224 225...226---227name: fcmp_float_oge228alignment: 16229legalized: true230regBankSelected: true231tracksRegLiveness: true232registers:233 - { id: 0, class: vecr }234 - { id: 1, class: vecr }235 - { id: 2, class: vecr }236 - { id: 3, class: vecr }237 - { id: 4, class: _ }238 - { id: 5, class: gpr }239 - { id: 6, class: gpr }240body: |241 bb.1 (%ir-block.0):242 liveins: $xmm0, $xmm1243 244 ; CHECK-LABEL: name: fcmp_float_oge245 ; CHECK: liveins: $xmm0, $xmm1246 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0247 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]248 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1249 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]250 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags251 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags252 ; CHECK: $al = COPY [[SETCCr]]253 ; CHECK: RET 0, implicit $al254 %2:vecr(s128) = COPY $xmm0255 %0:vecr(s32) = G_TRUNC %2(s128)256 %3:vecr(s128) = COPY $xmm1257 %1:vecr(s32) = G_TRUNC %3(s128)258 %6:gpr(s8) = G_FCMP floatpred(oge), %0(s32), %1259 %5:gpr(s8) = COPY %6(s8)260 $al = COPY %5(s8)261 RET 0, implicit $al262 263...264---265name: fcmp_float_olt266alignment: 16267legalized: true268regBankSelected: true269tracksRegLiveness: true270registers:271 - { id: 0, class: vecr }272 - { id: 1, class: vecr }273 - { id: 2, class: vecr }274 - { id: 3, class: vecr }275 - { id: 4, class: _ }276 - { id: 5, class: gpr }277 - { id: 6, class: gpr }278body: |279 bb.1 (%ir-block.0):280 liveins: $xmm0, $xmm1281 282 ; CHECK-LABEL: name: fcmp_float_olt283 ; CHECK: liveins: $xmm0, $xmm1284 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0285 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]286 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1287 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]288 ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags289 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags290 ; CHECK: $al = COPY [[SETCCr]]291 ; CHECK: RET 0, implicit $al292 %2:vecr(s128) = COPY $xmm0293 %0:vecr(s32) = G_TRUNC %2(s128)294 %3:vecr(s128) = COPY $xmm1295 %1:vecr(s32) = G_TRUNC %3(s128)296 %6:gpr(s8) = G_FCMP floatpred(olt), %0(s32), %1297 %5:gpr(s8) = COPY %6(s8)298 $al = COPY %5(s8)299 RET 0, implicit $al300 301...302---303name: fcmp_float_ole304alignment: 16305legalized: true306regBankSelected: true307tracksRegLiveness: true308registers:309 - { id: 0, class: vecr }310 - { id: 1, class: vecr }311 - { id: 2, class: vecr }312 - { id: 3, class: vecr }313 - { id: 4, class: _ }314 - { id: 5, class: gpr }315 - { id: 6, class: gpr }316body: |317 bb.1 (%ir-block.0):318 liveins: $xmm0, $xmm1319 320 ; CHECK-LABEL: name: fcmp_float_ole321 ; CHECK: liveins: $xmm0, $xmm1322 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0323 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]324 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1325 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]326 ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags327 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags328 ; CHECK: $al = COPY [[SETCCr]]329 ; CHECK: RET 0, implicit $al330 %2:vecr(s128) = COPY $xmm0331 %0:vecr(s32) = G_TRUNC %2(s128)332 %3:vecr(s128) = COPY $xmm1333 %1:vecr(s32) = G_TRUNC %3(s128)334 %6:gpr(s8) = G_FCMP floatpred(ole), %0(s32), %1335 %5:gpr(s8) = COPY %6(s8)336 $al = COPY %5(s8)337 RET 0, implicit $al338 339...340---341name: fcmp_float_one342alignment: 16343legalized: true344regBankSelected: true345tracksRegLiveness: true346registers:347 - { id: 0, class: vecr }348 - { id: 1, class: vecr }349 - { id: 2, class: vecr }350 - { id: 3, class: vecr }351 - { id: 4, class: _ }352 - { id: 5, class: gpr }353 - { id: 6, class: gpr }354body: |355 bb.1 (%ir-block.0):356 liveins: $xmm0, $xmm1357 358 ; CHECK-LABEL: name: fcmp_float_one359 ; CHECK: liveins: $xmm0, $xmm1360 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0361 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]362 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1363 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]364 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags365 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags366 ; CHECK: $al = COPY [[SETCCr]]367 ; CHECK: RET 0, implicit $al368 %2:vecr(s128) = COPY $xmm0369 %0:vecr(s32) = G_TRUNC %2(s128)370 %3:vecr(s128) = COPY $xmm1371 %1:vecr(s32) = G_TRUNC %3(s128)372 %6:gpr(s8) = G_FCMP floatpred(one), %0(s32), %1373 %5:gpr(s8) = COPY %6(s8)374 $al = COPY %5(s8)375 RET 0, implicit $al376 377...378---379name: fcmp_float_ord380alignment: 16381legalized: true382regBankSelected: true383tracksRegLiveness: true384registers:385 - { id: 0, class: vecr }386 - { id: 1, class: vecr }387 - { id: 2, class: vecr }388 - { id: 3, class: vecr }389 - { id: 4, class: _ }390 - { id: 5, class: gpr }391 - { id: 6, class: gpr }392body: |393 bb.1 (%ir-block.0):394 liveins: $xmm0, $xmm1395 396 ; CHECK-LABEL: name: fcmp_float_ord397 ; CHECK: liveins: $xmm0, $xmm1398 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0399 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]400 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1401 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]402 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags403 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags404 ; CHECK: $al = COPY [[SETCCr]]405 ; CHECK: RET 0, implicit $al406 %2:vecr(s128) = COPY $xmm0407 %0:vecr(s32) = G_TRUNC %2(s128)408 %3:vecr(s128) = COPY $xmm1409 %1:vecr(s32) = G_TRUNC %3(s128)410 %6:gpr(s8) = G_FCMP floatpred(ord), %0(s32), %1411 %5:gpr(s8) = COPY %6(s8)412 $al = COPY %5(s8)413 RET 0, implicit $al414 415...416---417name: fcmp_float_uno418alignment: 16419legalized: true420regBankSelected: true421tracksRegLiveness: true422registers:423 - { id: 0, class: vecr }424 - { id: 1, class: vecr }425 - { id: 2, class: vecr }426 - { id: 3, class: vecr }427 - { id: 4, class: _ }428 - { id: 5, class: gpr }429 - { id: 6, class: gpr }430body: |431 bb.1 (%ir-block.0):432 liveins: $xmm0, $xmm1433 434 ; CHECK-LABEL: name: fcmp_float_uno435 ; CHECK: liveins: $xmm0, $xmm1436 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0437 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]438 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1439 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]440 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags441 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags442 ; CHECK: $al = COPY [[SETCCr]]443 ; CHECK: RET 0, implicit $al444 %2:vecr(s128) = COPY $xmm0445 %0:vecr(s32) = G_TRUNC %2(s128)446 %3:vecr(s128) = COPY $xmm1447 %1:vecr(s32) = G_TRUNC %3(s128)448 %6:gpr(s8) = G_FCMP floatpred(uno), %0(s32), %1449 %5:gpr(s8) = COPY %6(s8)450 $al = COPY %5(s8)451 RET 0, implicit $al452 453...454---455name: fcmp_float_ueq456alignment: 16457legalized: true458regBankSelected: true459tracksRegLiveness: true460registers:461 - { id: 0, class: vecr }462 - { id: 1, class: vecr }463 - { id: 2, class: vecr }464 - { id: 3, class: vecr }465 - { id: 4, class: _ }466 - { id: 5, class: gpr }467 - { id: 6, class: gpr }468body: |469 bb.1 (%ir-block.0):470 liveins: $xmm0, $xmm1471 472 ; CHECK-LABEL: name: fcmp_float_ueq473 ; CHECK: liveins: $xmm0, $xmm1474 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0475 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]476 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1477 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]478 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags479 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags480 ; CHECK: $al = COPY [[SETCCr]]481 ; CHECK: RET 0, implicit $al482 %2:vecr(s128) = COPY $xmm0483 %0:vecr(s32) = G_TRUNC %2(s128)484 %3:vecr(s128) = COPY $xmm1485 %1:vecr(s32) = G_TRUNC %3(s128)486 %6:gpr(s8) = G_FCMP floatpred(ueq), %0(s32), %1487 %5:gpr(s8) = COPY %6(s8)488 $al = COPY %5(s8)489 RET 0, implicit $al490 491...492---493name: fcmp_float_ugt494alignment: 16495legalized: true496regBankSelected: true497tracksRegLiveness: true498registers:499 - { id: 0, class: vecr }500 - { id: 1, class: vecr }501 - { id: 2, class: vecr }502 - { id: 3, class: vecr }503 - { id: 4, class: _ }504 - { id: 5, class: gpr }505 - { id: 6, class: gpr }506body: |507 bb.1 (%ir-block.0):508 liveins: $xmm0, $xmm1509 510 ; CHECK-LABEL: name: fcmp_float_ugt511 ; CHECK: liveins: $xmm0, $xmm1512 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0513 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]514 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1515 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]516 ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags517 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags518 ; CHECK: $al = COPY [[SETCCr]]519 ; CHECK: RET 0, implicit $al520 %2:vecr(s128) = COPY $xmm0521 %0:vecr(s32) = G_TRUNC %2(s128)522 %3:vecr(s128) = COPY $xmm1523 %1:vecr(s32) = G_TRUNC %3(s128)524 %6:gpr(s8) = G_FCMP floatpred(ugt), %0(s32), %1525 %5:gpr(s8) = COPY %6(s8)526 $al = COPY %5(s8)527 RET 0, implicit $al528 529...530---531name: fcmp_float_uge532alignment: 16533legalized: true534regBankSelected: true535tracksRegLiveness: true536registers:537 - { id: 0, class: vecr }538 - { id: 1, class: vecr }539 - { id: 2, class: vecr }540 - { id: 3, class: vecr }541 - { id: 4, class: _ }542 - { id: 5, class: gpr }543 - { id: 6, class: gpr }544body: |545 bb.1 (%ir-block.0):546 liveins: $xmm0, $xmm1547 548 ; CHECK-LABEL: name: fcmp_float_uge549 ; CHECK: liveins: $xmm0, $xmm1550 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0551 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]552 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1553 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]554 ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags555 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags556 ; CHECK: $al = COPY [[SETCCr]]557 ; CHECK: RET 0, implicit $al558 %2:vecr(s128) = COPY $xmm0559 %0:vecr(s32) = G_TRUNC %2(s128)560 %3:vecr(s128) = COPY $xmm1561 %1:vecr(s32) = G_TRUNC %3(s128)562 %6:gpr(s8) = G_FCMP floatpred(uge), %0(s32), %1563 %5:gpr(s8) = COPY %6(s8)564 $al = COPY %5(s8)565 RET 0, implicit $al566 567...568---569name: fcmp_float_ult570alignment: 16571legalized: true572regBankSelected: true573tracksRegLiveness: true574registers:575 - { id: 0, class: vecr }576 - { id: 1, class: vecr }577 - { id: 2, class: vecr }578 - { id: 3, class: vecr }579 - { id: 4, class: _ }580 - { id: 5, class: gpr }581 - { id: 6, class: gpr }582body: |583 bb.1 (%ir-block.0):584 liveins: $xmm0, $xmm1585 586 ; CHECK-LABEL: name: fcmp_float_ult587 ; CHECK: liveins: $xmm0, $xmm1588 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0589 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]590 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1591 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]592 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags593 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags594 ; CHECK: $al = COPY [[SETCCr]]595 ; CHECK: RET 0, implicit $al596 %2:vecr(s128) = COPY $xmm0597 %0:vecr(s32) = G_TRUNC %2(s128)598 %3:vecr(s128) = COPY $xmm1599 %1:vecr(s32) = G_TRUNC %3(s128)600 %6:gpr(s8) = G_FCMP floatpred(ult), %0(s32), %1601 %5:gpr(s8) = COPY %6(s8)602 $al = COPY %5(s8)603 RET 0, implicit $al604 605...606---607name: fcmp_float_ule608alignment: 16609legalized: true610regBankSelected: true611tracksRegLiveness: true612registers:613 - { id: 0, class: vecr }614 - { id: 1, class: vecr }615 - { id: 2, class: vecr }616 - { id: 3, class: vecr }617 - { id: 4, class: _ }618 - { id: 5, class: gpr }619 - { id: 6, class: gpr }620body: |621 bb.1 (%ir-block.0):622 liveins: $xmm0, $xmm1623 624 ; CHECK-LABEL: name: fcmp_float_ule625 ; CHECK: liveins: $xmm0, $xmm1626 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0627 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]628 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1629 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]630 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags631 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags632 ; CHECK: $al = COPY [[SETCCr]]633 ; CHECK: RET 0, implicit $al634 %2:vecr(s128) = COPY $xmm0635 %0:vecr(s32) = G_TRUNC %2(s128)636 %3:vecr(s128) = COPY $xmm1637 %1:vecr(s32) = G_TRUNC %3(s128)638 %6:gpr(s8) = G_FCMP floatpred(ule), %0(s32), %1639 %5:gpr(s8) = COPY %6(s8)640 $al = COPY %5(s8)641 RET 0, implicit $al642 643...644---645name: fcmp_float_une646alignment: 16647legalized: true648regBankSelected: true649tracksRegLiveness: true650registers:651 - { id: 0, class: vecr }652 - { id: 1, class: vecr }653 - { id: 2, class: vecr }654 - { id: 3, class: vecr }655 - { id: 4, class: _ }656 - { id: 5, class: gpr }657 - { id: 6, class: gpr }658body: |659 bb.1 (%ir-block.0):660 liveins: $xmm0, $xmm1661 662 ; CHECK-LABEL: name: fcmp_float_une663 ; CHECK: liveins: $xmm0, $xmm1664 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0665 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]666 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1667 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]668 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags669 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags670 ; CHECK: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags671 ; CHECK: [[OR8rr:%[0-9]+]]:gr8 = OR8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags672 ; CHECK: $al = COPY [[OR8rr]]673 ; CHECK: RET 0, implicit $al674 %2:vecr(s128) = COPY $xmm0675 %0:vecr(s32) = G_TRUNC %2(s128)676 %3:vecr(s128) = COPY $xmm1677 %1:vecr(s32) = G_TRUNC %3(s128)678 %6:gpr(s8) = G_FCMP floatpred(une), %0(s32), %1679 %5:gpr(s8) = COPY %6(s8)680 $al = COPY %5(s8)681 RET 0, implicit $al682 683...684---685name: fcmp_double_oeq686alignment: 16687legalized: true688regBankSelected: true689tracksRegLiveness: true690registers:691 - { id: 0, class: vecr }692 - { id: 1, class: vecr }693 - { id: 2, class: vecr }694 - { id: 3, class: vecr }695 - { id: 4, class: _ }696 - { id: 5, class: gpr }697 - { id: 6, class: gpr }698body: |699 bb.1 (%ir-block.0):700 liveins: $xmm0, $xmm1701 702 ; CHECK-LABEL: name: fcmp_double_oeq703 ; CHECK: liveins: $xmm0, $xmm1704 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0705 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]706 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1707 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]708 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags709 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags710 ; CHECK: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags711 ; CHECK: [[AND8rr:%[0-9]+]]:gr8 = AND8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags712 ; CHECK: $al = COPY [[AND8rr]]713 ; CHECK: RET 0, implicit $al714 %2:vecr(s128) = COPY $xmm0715 %0:vecr(s64) = G_TRUNC %2(s128)716 %3:vecr(s128) = COPY $xmm1717 %1:vecr(s64) = G_TRUNC %3(s128)718 %6:gpr(s8) = G_FCMP floatpred(oeq), %0(s64), %1719 %5:gpr(s8) = COPY %6(s8)720 $al = COPY %5(s8)721 RET 0, implicit $al722 723...724---725name: fcmp_double_ogt726alignment: 16727legalized: true728regBankSelected: true729tracksRegLiveness: true730registers:731 - { id: 0, class: vecr }732 - { id: 1, class: vecr }733 - { id: 2, class: vecr }734 - { id: 3, class: vecr }735 - { id: 4, class: _ }736 - { id: 5, class: gpr }737 - { id: 6, class: gpr }738body: |739 bb.1 (%ir-block.0):740 liveins: $xmm0, $xmm1741 742 ; CHECK-LABEL: name: fcmp_double_ogt743 ; CHECK: liveins: $xmm0, $xmm1744 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0745 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]746 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1747 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]748 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags749 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags750 ; CHECK: $al = COPY [[SETCCr]]751 ; CHECK: RET 0, implicit $al752 %2:vecr(s128) = COPY $xmm0753 %0:vecr(s64) = G_TRUNC %2(s128)754 %3:vecr(s128) = COPY $xmm1755 %1:vecr(s64) = G_TRUNC %3(s128)756 %6:gpr(s8) = G_FCMP floatpred(ogt), %0(s64), %1757 %5:gpr(s8) = COPY %6(s8)758 $al = COPY %5(s8)759 RET 0, implicit $al760 761...762---763name: fcmp_double_oge764alignment: 16765legalized: true766regBankSelected: true767tracksRegLiveness: true768registers:769 - { id: 0, class: vecr }770 - { id: 1, class: vecr }771 - { id: 2, class: vecr }772 - { id: 3, class: vecr }773 - { id: 4, class: _ }774 - { id: 5, class: gpr }775 - { id: 6, class: gpr }776body: |777 bb.1 (%ir-block.0):778 liveins: $xmm0, $xmm1779 780 ; CHECK-LABEL: name: fcmp_double_oge781 ; CHECK: liveins: $xmm0, $xmm1782 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0783 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]784 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1785 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]786 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags787 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags788 ; CHECK: $al = COPY [[SETCCr]]789 ; CHECK: RET 0, implicit $al790 %2:vecr(s128) = COPY $xmm0791 %0:vecr(s64) = G_TRUNC %2(s128)792 %3:vecr(s128) = COPY $xmm1793 %1:vecr(s64) = G_TRUNC %3(s128)794 %6:gpr(s8) = G_FCMP floatpred(oge), %0(s64), %1795 %5:gpr(s8) = COPY %6(s8)796 $al = COPY %5(s8)797 RET 0, implicit $al798 799...800---801name: fcmp_double_olt802alignment: 16803legalized: true804regBankSelected: true805tracksRegLiveness: true806registers:807 - { id: 0, class: vecr }808 - { id: 1, class: vecr }809 - { id: 2, class: vecr }810 - { id: 3, class: vecr }811 - { id: 4, class: _ }812 - { id: 5, class: gpr }813 - { id: 6, class: gpr }814body: |815 bb.1 (%ir-block.0):816 liveins: $xmm0, $xmm1817 818 ; CHECK-LABEL: name: fcmp_double_olt819 ; CHECK: liveins: $xmm0, $xmm1820 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0821 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]822 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1823 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]824 ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags825 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags826 ; CHECK: $al = COPY [[SETCCr]]827 ; CHECK: RET 0, implicit $al828 %2:vecr(s128) = COPY $xmm0829 %0:vecr(s64) = G_TRUNC %2(s128)830 %3:vecr(s128) = COPY $xmm1831 %1:vecr(s64) = G_TRUNC %3(s128)832 %6:gpr(s8) = G_FCMP floatpred(olt), %0(s64), %1833 %5:gpr(s8) = COPY %6(s8)834 $al = COPY %5(s8)835 RET 0, implicit $al836 837...838---839name: fcmp_double_ole840alignment: 16841legalized: true842regBankSelected: true843tracksRegLiveness: true844registers:845 - { id: 0, class: vecr }846 - { id: 1, class: vecr }847 - { id: 2, class: vecr }848 - { id: 3, class: vecr }849 - { id: 4, class: _ }850 - { id: 5, class: gpr }851 - { id: 6, class: gpr }852body: |853 bb.1 (%ir-block.0):854 liveins: $xmm0, $xmm1855 856 ; CHECK-LABEL: name: fcmp_double_ole857 ; CHECK: liveins: $xmm0, $xmm1858 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0859 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]860 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1861 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]862 ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags863 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags864 ; CHECK: $al = COPY [[SETCCr]]865 ; CHECK: RET 0, implicit $al866 %2:vecr(s128) = COPY $xmm0867 %0:vecr(s64) = G_TRUNC %2(s128)868 %3:vecr(s128) = COPY $xmm1869 %1:vecr(s64) = G_TRUNC %3(s128)870 %6:gpr(s8) = G_FCMP floatpred(ole), %0(s64), %1871 %5:gpr(s8) = COPY %6(s8)872 $al = COPY %5(s8)873 RET 0, implicit $al874 875...876---877name: fcmp_double_one878alignment: 16879legalized: true880regBankSelected: true881tracksRegLiveness: true882registers:883 - { id: 0, class: vecr }884 - { id: 1, class: vecr }885 - { id: 2, class: vecr }886 - { id: 3, class: vecr }887 - { id: 4, class: _ }888 - { id: 5, class: gpr }889 - { id: 6, class: gpr }890body: |891 bb.1 (%ir-block.0):892 liveins: $xmm0, $xmm1893 894 ; CHECK-LABEL: name: fcmp_double_one895 ; CHECK: liveins: $xmm0, $xmm1896 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0897 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]898 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1899 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]900 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags901 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags902 ; CHECK: $al = COPY [[SETCCr]]903 ; CHECK: RET 0, implicit $al904 %2:vecr(s128) = COPY $xmm0905 %0:vecr(s64) = G_TRUNC %2(s128)906 %3:vecr(s128) = COPY $xmm1907 %1:vecr(s64) = G_TRUNC %3(s128)908 %6:gpr(s8) = G_FCMP floatpred(one), %0(s64), %1909 %5:gpr(s8) = COPY %6(s8)910 $al = COPY %5(s8)911 RET 0, implicit $al912 913...914---915name: fcmp_double_ord916alignment: 16917legalized: true918regBankSelected: true919tracksRegLiveness: true920registers:921 - { id: 0, class: vecr }922 - { id: 1, class: vecr }923 - { id: 2, class: vecr }924 - { id: 3, class: vecr }925 - { id: 4, class: _ }926 - { id: 5, class: gpr }927 - { id: 6, class: gpr }928body: |929 bb.1 (%ir-block.0):930 liveins: $xmm0, $xmm1931 932 ; CHECK-LABEL: name: fcmp_double_ord933 ; CHECK: liveins: $xmm0, $xmm1934 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0935 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]936 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1937 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]938 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags939 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags940 ; CHECK: $al = COPY [[SETCCr]]941 ; CHECK: RET 0, implicit $al942 %2:vecr(s128) = COPY $xmm0943 %0:vecr(s64) = G_TRUNC %2(s128)944 %3:vecr(s128) = COPY $xmm1945 %1:vecr(s64) = G_TRUNC %3(s128)946 %6:gpr(s8) = G_FCMP floatpred(ord), %0(s64), %1947 %5:gpr(s8) = COPY %6(s8)948 $al = COPY %5(s8)949 RET 0, implicit $al950 951...952---953name: fcmp_double_uno954alignment: 16955legalized: true956regBankSelected: true957tracksRegLiveness: true958registers:959 - { id: 0, class: vecr }960 - { id: 1, class: vecr }961 - { id: 2, class: vecr }962 - { id: 3, class: vecr }963 - { id: 4, class: _ }964 - { id: 5, class: gpr }965 - { id: 6, class: gpr }966body: |967 bb.1 (%ir-block.0):968 liveins: $xmm0, $xmm1969 970 ; CHECK-LABEL: name: fcmp_double_uno971 ; CHECK: liveins: $xmm0, $xmm1972 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0973 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]974 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1975 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]976 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags977 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags978 ; CHECK: $al = COPY [[SETCCr]]979 ; CHECK: RET 0, implicit $al980 %2:vecr(s128) = COPY $xmm0981 %0:vecr(s64) = G_TRUNC %2(s128)982 %3:vecr(s128) = COPY $xmm1983 %1:vecr(s64) = G_TRUNC %3(s128)984 %6:gpr(s8) = G_FCMP floatpred(uno), %0(s64), %1985 %5:gpr(s8) = COPY %6(s8)986 $al = COPY %5(s8)987 RET 0, implicit $al988 989...990---991name: fcmp_double_ueq992alignment: 16993legalized: true994regBankSelected: true995tracksRegLiveness: true996registers:997 - { id: 0, class: vecr }998 - { id: 1, class: vecr }999 - { id: 2, class: vecr }1000 - { id: 3, class: vecr }1001 - { id: 4, class: _ }1002 - { id: 5, class: gpr }1003 - { id: 6, class: gpr }1004body: |1005 bb.1 (%ir-block.0):1006 liveins: $xmm0, $xmm11007 1008 ; CHECK-LABEL: name: fcmp_double_ueq1009 ; CHECK: liveins: $xmm0, $xmm11010 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm01011 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]1012 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm11013 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]1014 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags1015 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags1016 ; CHECK: $al = COPY [[SETCCr]]1017 ; CHECK: RET 0, implicit $al1018 %2:vecr(s128) = COPY $xmm01019 %0:vecr(s64) = G_TRUNC %2(s128)1020 %3:vecr(s128) = COPY $xmm11021 %1:vecr(s64) = G_TRUNC %3(s128)1022 %6:gpr(s8) = G_FCMP floatpred(ueq), %0(s64), %11023 %5:gpr(s8) = COPY %6(s8)1024 $al = COPY %5(s8)1025 RET 0, implicit $al1026 1027...1028---1029name: fcmp_double_ugt1030alignment: 161031legalized: true1032regBankSelected: true1033tracksRegLiveness: true1034registers:1035 - { id: 0, class: vecr }1036 - { id: 1, class: vecr }1037 - { id: 2, class: vecr }1038 - { id: 3, class: vecr }1039 - { id: 4, class: _ }1040 - { id: 5, class: gpr }1041 - { id: 6, class: gpr }1042body: |1043 bb.1 (%ir-block.0):1044 liveins: $xmm0, $xmm11045 1046 ; CHECK-LABEL: name: fcmp_double_ugt1047 ; CHECK: liveins: $xmm0, $xmm11048 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm01049 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]1050 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm11051 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]1052 ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags1053 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags1054 ; CHECK: $al = COPY [[SETCCr]]1055 ; CHECK: RET 0, implicit $al1056 %2:vecr(s128) = COPY $xmm01057 %0:vecr(s64) = G_TRUNC %2(s128)1058 %3:vecr(s128) = COPY $xmm11059 %1:vecr(s64) = G_TRUNC %3(s128)1060 %6:gpr(s8) = G_FCMP floatpred(ugt), %0(s64), %11061 %5:gpr(s8) = COPY %6(s8)1062 $al = COPY %5(s8)1063 RET 0, implicit $al1064 1065...1066---1067name: fcmp_double_uge1068alignment: 161069legalized: true1070regBankSelected: true1071tracksRegLiveness: true1072registers:1073 - { id: 0, class: vecr }1074 - { id: 1, class: vecr }1075 - { id: 2, class: vecr }1076 - { id: 3, class: vecr }1077 - { id: 4, class: _ }1078 - { id: 5, class: gpr }1079 - { id: 6, class: gpr }1080body: |1081 bb.1 (%ir-block.0):1082 liveins: $xmm0, $xmm11083 1084 ; CHECK-LABEL: name: fcmp_double_uge1085 ; CHECK: liveins: $xmm0, $xmm11086 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm01087 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]1088 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm11089 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]1090 ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags1091 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags1092 ; CHECK: $al = COPY [[SETCCr]]1093 ; CHECK: RET 0, implicit $al1094 %2:vecr(s128) = COPY $xmm01095 %0:vecr(s64) = G_TRUNC %2(s128)1096 %3:vecr(s128) = COPY $xmm11097 %1:vecr(s64) = G_TRUNC %3(s128)1098 %6:gpr(s8) = G_FCMP floatpred(uge), %0(s64), %11099 %5:gpr(s8) = COPY %6(s8)1100 $al = COPY %5(s8)1101 RET 0, implicit $al1102 1103...1104---1105name: fcmp_double_ult1106alignment: 161107legalized: true1108regBankSelected: true1109tracksRegLiveness: true1110registers:1111 - { id: 0, class: vecr }1112 - { id: 1, class: vecr }1113 - { id: 2, class: vecr }1114 - { id: 3, class: vecr }1115 - { id: 4, class: _ }1116 - { id: 5, class: gpr }1117 - { id: 6, class: gpr }1118body: |1119 bb.1 (%ir-block.0):1120 liveins: $xmm0, $xmm11121 1122 ; CHECK-LABEL: name: fcmp_double_ult1123 ; CHECK: liveins: $xmm0, $xmm11124 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm01125 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]1126 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm11127 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]1128 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags1129 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags1130 ; CHECK: $al = COPY [[SETCCr]]1131 ; CHECK: RET 0, implicit $al1132 %2:vecr(s128) = COPY $xmm01133 %0:vecr(s64) = G_TRUNC %2(s128)1134 %3:vecr(s128) = COPY $xmm11135 %1:vecr(s64) = G_TRUNC %3(s128)1136 %6:gpr(s8) = G_FCMP floatpred(ult), %0(s64), %11137 %5:gpr(s8) = COPY %6(s8)1138 $al = COPY %5(s8)1139 RET 0, implicit $al1140 1141...1142---1143name: fcmp_double_ule1144alignment: 161145legalized: true1146regBankSelected: true1147tracksRegLiveness: true1148registers:1149 - { id: 0, class: vecr }1150 - { id: 1, class: vecr }1151 - { id: 2, class: vecr }1152 - { id: 3, class: vecr }1153 - { id: 4, class: _ }1154 - { id: 5, class: gpr }1155 - { id: 6, class: gpr }1156body: |1157 bb.1 (%ir-block.0):1158 liveins: $xmm0, $xmm11159 1160 ; CHECK-LABEL: name: fcmp_double_ule1161 ; CHECK: liveins: $xmm0, $xmm11162 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm01163 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]1164 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm11165 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]1166 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags1167 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags1168 ; CHECK: $al = COPY [[SETCCr]]1169 ; CHECK: RET 0, implicit $al1170 %2:vecr(s128) = COPY $xmm01171 %0:vecr(s64) = G_TRUNC %2(s128)1172 %3:vecr(s128) = COPY $xmm11173 %1:vecr(s64) = G_TRUNC %3(s128)1174 %6:gpr(s8) = G_FCMP floatpred(ule), %0(s64), %11175 %5:gpr(s8) = COPY %6(s8)1176 $al = COPY %5(s8)1177 RET 0, implicit $al1178 1179...1180---1181name: fcmp_double_une1182alignment: 161183legalized: true1184regBankSelected: true1185tracksRegLiveness: true1186registers:1187 - { id: 0, class: vecr }1188 - { id: 1, class: vecr }1189 - { id: 2, class: vecr }1190 - { id: 3, class: vecr }1191 - { id: 4, class: _ }1192 - { id: 5, class: gpr }1193 - { id: 6, class: gpr }1194body: |1195 bb.1 (%ir-block.0):1196 liveins: $xmm0, $xmm11197 1198 ; CHECK-LABEL: name: fcmp_double_une1199 ; CHECK: liveins: $xmm0, $xmm11200 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm01201 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]1202 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm11203 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]1204 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags1205 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags1206 ; CHECK: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags1207 ; CHECK: [[OR8rr:%[0-9]+]]:gr8 = OR8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags1208 ; CHECK: $al = COPY [[OR8rr]]1209 ; CHECK: RET 0, implicit $al1210 %2:vecr(s128) = COPY $xmm01211 %0:vecr(s64) = G_TRUNC %2(s128)1212 %3:vecr(s128) = COPY $xmm11213 %1:vecr(s64) = G_TRUNC %3(s128)1214 %6:gpr(s8) = G_FCMP floatpred(une), %0(s64), %11215 %5:gpr(s8) = COPY %6(s8)1216 $al = COPY %5(s8)1217 RET 0, implicit $al1218 1219...1220