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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=SSE3# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=AVX4# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=AVX512F5# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=AVX512VL6 7--- |8 define i8 @test_load_i8(ptr %p1) {9 %r = load atomic i8, ptr %p1 unordered, align 110 ret i8 %r11 }12 13 define i16 @test_load_i16(ptr %p1) {14 %r = load atomic i16, ptr %p1 unordered, align 215 ret i16 %r16 }17 18 define i32 @test_load_i32(ptr %p1) {19 %r = load atomic i32, ptr %p1 unordered, align 420 ret i32 %r21 }22 23 define i64 @test_load_i64(ptr %p1) {24 %r = load atomic i64, ptr %p1 unordered, align 825 ret i64 %r26 }27 28 define float @test_load_float(ptr %p1) {29 %r = load atomic float, ptr %p1 unordered, align 430 ret float %r31 }32 33 define float @test_load_float_vecreg(ptr %p1) {34 %r = load atomic float, ptr %p1 unordered, align 835 ret float %r36 }37 38 define double @test_load_double(ptr %p1) {39 %r = load atomic double, ptr %p1 unordered, align 840 ret double %r41 }42 43 define double @test_load_double_vecreg(ptr %p1) {44 %r = load atomic double, ptr %p1 unordered, align 845 ret double %r46 }47 48 define ptr @test_store_i32(i32 %val, ptr %p1) {49 store atomic i32 %val, ptr %p1 unordered, align 450 ret ptr %p151 }52 53 define ptr @test_store_i64(i64 %val, ptr %p1) {54 store atomic i64 %val, ptr %p1 unordered, align 855 ret ptr %p156 }57 58 define ptr @test_store_float(float %val, ptr %p1) {59 store atomic float %val, ptr %p1 unordered, align 460 ret ptr %p161 }62 63 define ptr @test_store_float_vec(float %val, ptr %p1) {64 store atomic float %val, ptr %p1 unordered, align 465 ret ptr %p166 }67 68 define ptr @test_store_double(double %val, ptr %p1) {69 store atomic double %val, ptr %p1 unordered, align 870 ret ptr %p171 }72 73 define ptr @test_store_double_vec(double %val, ptr %p1) {74 store atomic double %val, ptr %p1 unordered, align 875 ret ptr %p176 }77 78 define ptr @test_load_ptr(ptr %ptr1) {79 %p = load atomic ptr, ptr %ptr1 unordered, align 880 ret ptr %p81 }82 83 define void @test_store_ptr(ptr %ptr1, ptr %a) {84 store atomic ptr %a, ptr %ptr1 unordered, align 885 ret void86 }87 88 define i32 @test_gep_folding(ptr %arr, i32 %val) {89 %arrayidx = getelementptr i32, ptr %arr, i32 590 store atomic i32 %val, ptr %arrayidx unordered, align 891 %r = load atomic i32, ptr %arrayidx unordered, align 892 ret i32 %r93 }94 95 define i32 @test_gep_folding_largeGepIndex(ptr %arr, i32 %val) #0 {96 %arrayidx = getelementptr i32, ptr %arr, i64 5717986918097 store atomic i32 %val, ptr %arrayidx unordered, align 898 %r = load atomic i32, ptr %arrayidx unordered, align 899 ret i32 %r100 }101...102---103name: test_load_i8104alignment: 16105legalized: true106regBankSelected: true107registers:108 - { id: 0, class: gpr }109 - { id: 1, class: gpr }110body: |111 bb.1 (%ir-block.0):112 liveins: $rdi113 114 ; SSE-LABEL: name: test_load_i8115 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi116 ; SSE: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s8) from %ir.p1)117 ; SSE: $al = COPY [[MOV8rm]]118 ; SSE: RET 0, implicit $al119 ; AVX-LABEL: name: test_load_i8120 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi121 ; AVX: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s8) from %ir.p1)122 ; AVX: $al = COPY [[MOV8rm]]123 ; AVX: RET 0, implicit $al124 ; AVX512F-LABEL: name: test_load_i8125 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi126 ; AVX512F: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s8) from %ir.p1)127 ; AVX512F: $al = COPY [[MOV8rm]]128 ; AVX512F: RET 0, implicit $al129 ; AVX512VL-LABEL: name: test_load_i8130 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi131 ; AVX512VL: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s8) from %ir.p1)132 ; AVX512VL: $al = COPY [[MOV8rm]]133 ; AVX512VL: RET 0, implicit $al134 %0(p0) = COPY $rdi135 %1(s8) = G_LOAD %0(p0) :: (load unordered (s8) from %ir.p1)136 $al = COPY %1(s8)137 RET 0, implicit $al138 139...140---141name: test_load_i16142alignment: 16143legalized: true144regBankSelected: true145registers:146 - { id: 0, class: gpr }147 - { id: 1, class: gpr }148body: |149 bb.1 (%ir-block.0):150 liveins: $rdi151 152 ; SSE-LABEL: name: test_load_i16153 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi154 ; SSE: [[MOV16rm:%[0-9]+]]:gr16 = MOV16rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s16) from %ir.p1)155 ; SSE: $ax = COPY [[MOV16rm]]156 ; SSE: RET 0, implicit $ax157 ; AVX-LABEL: name: test_load_i16158 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi159 ; AVX: [[MOV16rm:%[0-9]+]]:gr16 = MOV16rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s16) from %ir.p1)160 ; AVX: $ax = COPY [[MOV16rm]]161 ; AVX: RET 0, implicit $ax162 ; AVX512F-LABEL: name: test_load_i16163 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi164 ; AVX512F: [[MOV16rm:%[0-9]+]]:gr16 = MOV16rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s16) from %ir.p1)165 ; AVX512F: $ax = COPY [[MOV16rm]]166 ; AVX512F: RET 0, implicit $ax167 ; AVX512VL-LABEL: name: test_load_i16168 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi169 ; AVX512VL: [[MOV16rm:%[0-9]+]]:gr16 = MOV16rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s16) from %ir.p1)170 ; AVX512VL: $ax = COPY [[MOV16rm]]171 ; AVX512VL: RET 0, implicit $ax172 %0(p0) = COPY $rdi173 %1(s16) = G_LOAD %0(p0) :: (load unordered (s16) from %ir.p1)174 $ax = COPY %1(s16)175 RET 0, implicit $ax176 177...178---179name: test_load_i32180alignment: 16181legalized: true182regBankSelected: true183registers:184 - { id: 0, class: gpr }185 - { id: 1, class: gpr }186body: |187 bb.1 (%ir-block.0):188 liveins: $rdi189 190 ; SSE-LABEL: name: test_load_i32191 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi192 ; SSE: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.p1)193 ; SSE: $eax = COPY [[MOV32rm]]194 ; SSE: RET 0, implicit $eax195 ; AVX-LABEL: name: test_load_i32196 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi197 ; AVX: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.p1)198 ; AVX: $eax = COPY [[MOV32rm]]199 ; AVX: RET 0, implicit $eax200 ; AVX512F-LABEL: name: test_load_i32201 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi202 ; AVX512F: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.p1)203 ; AVX512F: $eax = COPY [[MOV32rm]]204 ; AVX512F: RET 0, implicit $eax205 ; AVX512VL-LABEL: name: test_load_i32206 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi207 ; AVX512VL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.p1)208 ; AVX512VL: $eax = COPY [[MOV32rm]]209 ; AVX512VL: RET 0, implicit $eax210 %0(p0) = COPY $rdi211 %1(s32) = G_LOAD %0(p0) :: (load unordered (s32) from %ir.p1)212 $eax = COPY %1(s32)213 RET 0, implicit $eax214 215...216---217name: test_load_i64218alignment: 16219legalized: true220regBankSelected: true221registers:222 - { id: 0, class: gpr }223 - { id: 1, class: gpr }224body: |225 bb.1 (%ir-block.0):226 liveins: $rdi227 228 ; SSE-LABEL: name: test_load_i64229 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi230 ; SSE: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.p1)231 ; SSE: $rax = COPY [[MOV64rm]]232 ; SSE: RET 0, implicit $rax233 ; AVX-LABEL: name: test_load_i64234 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi235 ; AVX: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.p1)236 ; AVX: $rax = COPY [[MOV64rm]]237 ; AVX: RET 0, implicit $rax238 ; AVX512F-LABEL: name: test_load_i64239 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi240 ; AVX512F: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.p1)241 ; AVX512F: $rax = COPY [[MOV64rm]]242 ; AVX512F: RET 0, implicit $rax243 ; AVX512VL-LABEL: name: test_load_i64244 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi245 ; AVX512VL: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.p1)246 ; AVX512VL: $rax = COPY [[MOV64rm]]247 ; AVX512VL: RET 0, implicit $rax248 %0(p0) = COPY $rdi249 %1(s64) = G_LOAD %0(p0) :: (load unordered (s64) from %ir.p1)250 $rax = COPY %1(s64)251 RET 0, implicit $rax252 253...254---255name: test_load_float256alignment: 16257legalized: true258regBankSelected: true259registers:260 - { id: 0, class: gpr, preferred-register: '' }261 - { id: 1, class: gpr, preferred-register: '' }262 - { id: 2, class: vecr, preferred-register: '' }263 - { id: 3, class: vecr, preferred-register: '' }264body: |265 bb.1 (%ir-block.0):266 liveins: $rdi267 268 ; SSE-LABEL: name: test_load_float269 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi270 ; SSE: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.p1)271 ; SSE: [[COPY1:%[0-9]+]]:fr32 = COPY [[MOV32rm]]272 ; SSE: [[COPY2:%[0-9]+]]:vr128 = COPY [[COPY1]]273 ; SSE: $xmm0 = COPY [[COPY2]]274 ; SSE: RET 0, implicit $xmm0275 ; AVX-LABEL: name: test_load_float276 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi277 ; AVX: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.p1)278 ; AVX: [[COPY1:%[0-9]+]]:fr32 = COPY [[MOV32rm]]279 ; AVX: [[COPY2:%[0-9]+]]:vr128 = COPY [[COPY1]]280 ; AVX: $xmm0 = COPY [[COPY2]]281 ; AVX: RET 0, implicit $xmm0282 ; AVX512F-LABEL: name: test_load_float283 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi284 ; AVX512F: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.p1)285 ; AVX512F: [[COPY1:%[0-9]+]]:fr32x = COPY [[MOV32rm]]286 ; AVX512F: [[COPY2:%[0-9]+]]:vr128x = COPY [[COPY1]]287 ; AVX512F: $xmm0 = COPY [[COPY2]]288 ; AVX512F: RET 0, implicit $xmm0289 ; AVX512VL-LABEL: name: test_load_float290 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi291 ; AVX512VL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.p1)292 ; AVX512VL: [[COPY1:%[0-9]+]]:fr32x = COPY [[MOV32rm]]293 ; AVX512VL: [[COPY2:%[0-9]+]]:vr128x = COPY [[COPY1]]294 ; AVX512VL: $xmm0 = COPY [[COPY2]]295 ; AVX512VL: RET 0, implicit $xmm0296 %0:gpr(p0) = COPY $rdi297 %1:gpr(s32) = G_LOAD %0(p0) :: (load unordered (s32) from %ir.p1)298 %3:vecr(s32) = COPY %1(s32)299 %2:vecr(s128) = G_ANYEXT %3(s32)300 $xmm0 = COPY %2(s128)301 RET 0, implicit $xmm0302 303...304---305name: test_load_float_vecreg306alignment: 16307legalized: true308regBankSelected: true309registers:310 - { id: 0, class: gpr, preferred-register: '' }311 - { id: 1, class: gpr, preferred-register: '' }312 - { id: 2, class: vecr, preferred-register: '' }313 - { id: 3, class: vecr, preferred-register: '' }314body: |315 bb.1 (%ir-block.0):316 liveins: $rdi317 318 ; SSE-LABEL: name: test_load_float_vecreg319 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi320 ; SSE: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.p1)321 ; SSE: [[COPY1:%[0-9]+]]:fr32 = COPY [[MOV32rm]]322 ; SSE: [[COPY2:%[0-9]+]]:vr128 = COPY [[COPY1]]323 ; SSE: $xmm0 = COPY [[COPY2]]324 ; SSE: RET 0, implicit $xmm0325 ; AVX-LABEL: name: test_load_float_vecreg326 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi327 ; AVX: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.p1)328 ; AVX: [[COPY1:%[0-9]+]]:fr32 = COPY [[MOV32rm]]329 ; AVX: [[COPY2:%[0-9]+]]:vr128 = COPY [[COPY1]]330 ; AVX: $xmm0 = COPY [[COPY2]]331 ; AVX: RET 0, implicit $xmm0332 ; AVX512F-LABEL: name: test_load_float_vecreg333 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi334 ; AVX512F: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.p1)335 ; AVX512F: [[COPY1:%[0-9]+]]:fr32x = COPY [[MOV32rm]]336 ; AVX512F: [[COPY2:%[0-9]+]]:vr128x = COPY [[COPY1]]337 ; AVX512F: $xmm0 = COPY [[COPY2]]338 ; AVX512F: RET 0, implicit $xmm0339 ; AVX512VL-LABEL: name: test_load_float_vecreg340 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi341 ; AVX512VL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.p1)342 ; AVX512VL: [[COPY1:%[0-9]+]]:fr32x = COPY [[MOV32rm]]343 ; AVX512VL: [[COPY2:%[0-9]+]]:vr128x = COPY [[COPY1]]344 ; AVX512VL: $xmm0 = COPY [[COPY2]]345 ; AVX512VL: RET 0, implicit $xmm0346 %0:gpr(p0) = COPY $rdi347 %1:gpr(s32) = G_LOAD %0(p0) :: (load unordered (s32) from %ir.p1)348 %3:vecr(s32) = COPY %1(s32)349 %2:vecr(s128) = G_ANYEXT %3(s32)350 $xmm0 = COPY %2(s128)351 RET 0, implicit $xmm0352 353...354---355name: test_load_double356alignment: 16357legalized: true358regBankSelected: true359registers:360 - { id: 0, class: gpr, preferred-register: '' }361 - { id: 1, class: gpr, preferred-register: '' }362 - { id: 2, class: vecr, preferred-register: '' }363 - { id: 3, class: vecr, preferred-register: '' }364body: |365 bb.1 (%ir-block.0):366 liveins: $rdi367 368 ; SSE-LABEL: name: test_load_double369 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi370 ; SSE: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.p1)371 ; SSE: [[COPY1:%[0-9]+]]:fr64 = COPY [[MOV64rm]]372 ; SSE: [[COPY2:%[0-9]+]]:vr128 = COPY [[COPY1]]373 ; SSE: $xmm0 = COPY [[COPY2]]374 ; SSE: RET 0, implicit $xmm0375 ; AVX-LABEL: name: test_load_double376 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi377 ; AVX: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.p1)378 ; AVX: [[COPY1:%[0-9]+]]:fr64 = COPY [[MOV64rm]]379 ; AVX: [[COPY2:%[0-9]+]]:vr128 = COPY [[COPY1]]380 ; AVX: $xmm0 = COPY [[COPY2]]381 ; AVX: RET 0, implicit $xmm0382 ; AVX512F-LABEL: name: test_load_double383 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi384 ; AVX512F: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.p1)385 ; AVX512F: [[COPY1:%[0-9]+]]:fr64x = COPY [[MOV64rm]]386 ; AVX512F: [[COPY2:%[0-9]+]]:vr128x = COPY [[COPY1]]387 ; AVX512F: $xmm0 = COPY [[COPY2]]388 ; AVX512F: RET 0, implicit $xmm0389 ; AVX512VL-LABEL: name: test_load_double390 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi391 ; AVX512VL: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.p1)392 ; AVX512VL: [[COPY1:%[0-9]+]]:fr64x = COPY [[MOV64rm]]393 ; AVX512VL: [[COPY2:%[0-9]+]]:vr128x = COPY [[COPY1]]394 ; AVX512VL: $xmm0 = COPY [[COPY2]]395 ; AVX512VL: RET 0, implicit $xmm0396 %0:gpr(p0) = COPY $rdi397 %1:gpr(s64) = G_LOAD %0(p0) :: (load unordered (s64) from %ir.p1)398 %3:vecr(s64) = COPY %1(s64)399 %2:vecr(s128) = G_ANYEXT %3(s64)400 $xmm0 = COPY %2(s128)401 RET 0, implicit $xmm0402 403...404---405name: test_load_double_vecreg406alignment: 16407legalized: true408regBankSelected: true409registers:410 - { id: 0, class: gpr, preferred-register: '' }411 - { id: 1, class: gpr, preferred-register: '' }412 - { id: 2, class: vecr, preferred-register: '' }413 - { id: 3, class: vecr, preferred-register: '' }414body: |415 bb.1 (%ir-block.0):416 liveins: $rdi417 418 ; SSE-LABEL: name: test_load_double_vecreg419 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi420 ; SSE: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.p1)421 ; SSE: [[COPY1:%[0-9]+]]:fr64 = COPY [[MOV64rm]]422 ; SSE: [[COPY2:%[0-9]+]]:vr128 = COPY [[COPY1]]423 ; SSE: $xmm0 = COPY [[COPY2]]424 ; SSE: RET 0, implicit $xmm0425 ; AVX-LABEL: name: test_load_double_vecreg426 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi427 ; AVX: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.p1)428 ; AVX: [[COPY1:%[0-9]+]]:fr64 = COPY [[MOV64rm]]429 ; AVX: [[COPY2:%[0-9]+]]:vr128 = COPY [[COPY1]]430 ; AVX: $xmm0 = COPY [[COPY2]]431 ; AVX: RET 0, implicit $xmm0432 ; AVX512F-LABEL: name: test_load_double_vecreg433 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi434 ; AVX512F: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.p1)435 ; AVX512F: [[COPY1:%[0-9]+]]:fr64x = COPY [[MOV64rm]]436 ; AVX512F: [[COPY2:%[0-9]+]]:vr128x = COPY [[COPY1]]437 ; AVX512F: $xmm0 = COPY [[COPY2]]438 ; AVX512F: RET 0, implicit $xmm0439 ; AVX512VL-LABEL: name: test_load_double_vecreg440 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi441 ; AVX512VL: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.p1)442 ; AVX512VL: [[COPY1:%[0-9]+]]:fr64x = COPY [[MOV64rm]]443 ; AVX512VL: [[COPY2:%[0-9]+]]:vr128x = COPY [[COPY1]]444 ; AVX512VL: $xmm0 = COPY [[COPY2]]445 ; AVX512VL: RET 0, implicit $xmm0446 %0:gpr(p0) = COPY $rdi447 %1:gpr(s64) = G_LOAD %0(p0) :: (load unordered (s64) from %ir.p1)448 %3:vecr(s64) = COPY %1(s64)449 %2:vecr(s128) = G_ANYEXT %3(s64)450 $xmm0 = COPY %2(s128)451 RET 0, implicit $xmm0452 453...454---455name: test_store_i32456alignment: 16457legalized: true458regBankSelected: true459registers:460 - { id: 0, class: gpr }461 - { id: 1, class: gpr }462body: |463 bb.1 (%ir-block.0):464 liveins: $edi, $rsi465 466 ; SSE-LABEL: name: test_store_i32467 ; SSE: [[COPY:%[0-9]+]]:gr32 = COPY $edi468 ; SSE: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi469 ; SSE: MOV32mr [[COPY1]], 1, $noreg, 0, $noreg, [[COPY]] :: (store unordered (s32) into %ir.p1)470 ; SSE: $rax = COPY [[COPY1]]471 ; SSE: RET 0, implicit $rax472 ; AVX-LABEL: name: test_store_i32473 ; AVX: [[COPY:%[0-9]+]]:gr32 = COPY $edi474 ; AVX: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi475 ; AVX: MOV32mr [[COPY1]], 1, $noreg, 0, $noreg, [[COPY]] :: (store unordered (s32) into %ir.p1)476 ; AVX: $rax = COPY [[COPY1]]477 ; AVX: RET 0, implicit $rax478 ; AVX512F-LABEL: name: test_store_i32479 ; AVX512F: [[COPY:%[0-9]+]]:gr32 = COPY $edi480 ; AVX512F: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi481 ; AVX512F: MOV32mr [[COPY1]], 1, $noreg, 0, $noreg, [[COPY]] :: (store unordered (s32) into %ir.p1)482 ; AVX512F: $rax = COPY [[COPY1]]483 ; AVX512F: RET 0, implicit $rax484 ; AVX512VL-LABEL: name: test_store_i32485 ; AVX512VL: [[COPY:%[0-9]+]]:gr32 = COPY $edi486 ; AVX512VL: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi487 ; AVX512VL: MOV32mr [[COPY1]], 1, $noreg, 0, $noreg, [[COPY]] :: (store unordered (s32) into %ir.p1)488 ; AVX512VL: $rax = COPY [[COPY1]]489 ; AVX512VL: RET 0, implicit $rax490 %0(s32) = COPY $edi491 %1(p0) = COPY $rsi492 G_STORE %0(s32), %1(p0) :: (store unordered (s32) into %ir.p1)493 $rax = COPY %1(p0)494 RET 0, implicit $rax495 496...497---498name: test_store_i64499alignment: 16500legalized: true501regBankSelected: true502registers:503 - { id: 0, class: gpr }504 - { id: 1, class: gpr }505body: |506 bb.1 (%ir-block.0):507 liveins: $rdi, $rsi508 509 ; SSE-LABEL: name: test_store_i64510 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi511 ; SSE: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi512 ; SSE: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, [[COPY]] :: (store unordered (s64) into %ir.p1)513 ; SSE: $rax = COPY [[COPY1]]514 ; SSE: RET 0, implicit $rax515 ; AVX-LABEL: name: test_store_i64516 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi517 ; AVX: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi518 ; AVX: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, [[COPY]] :: (store unordered (s64) into %ir.p1)519 ; AVX: $rax = COPY [[COPY1]]520 ; AVX: RET 0, implicit $rax521 ; AVX512F-LABEL: name: test_store_i64522 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi523 ; AVX512F: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi524 ; AVX512F: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, [[COPY]] :: (store unordered (s64) into %ir.p1)525 ; AVX512F: $rax = COPY [[COPY1]]526 ; AVX512F: RET 0, implicit $rax527 ; AVX512VL-LABEL: name: test_store_i64528 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi529 ; AVX512VL: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi530 ; AVX512VL: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, [[COPY]] :: (store unordered (s64) into %ir.p1)531 ; AVX512VL: $rax = COPY [[COPY1]]532 ; AVX512VL: RET 0, implicit $rax533 %0(s64) = COPY $rdi534 %1(p0) = COPY $rsi535 G_STORE %0(s64), %1(p0) :: (store unordered (s64) into %ir.p1)536 $rax = COPY %1(p0)537 RET 0, implicit $rax538 539...540---541name: test_store_float542alignment: 16543legalized: true544regBankSelected: true545registers:546 - { id: 0, class: vecr, preferred-register: '' }547 - { id: 1, class: gpr, preferred-register: '' }548 - { id: 2, class: vecr, preferred-register: '' }549 - { id: 3, class: gpr, preferred-register: '' }550body: |551 bb.1 (%ir-block.0):552 liveins: $rdi, $xmm0553 554 ; SSE-LABEL: name: test_store_float555 ; SSE: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0556 ; SSE: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]557 ; SSE: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi558 ; SSE: [[COPY3:%[0-9]+]]:gr32 = COPY [[COPY1]]559 ; SSE: MOV32mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s32) into %ir.p1)560 ; SSE: $rax = COPY [[COPY2]]561 ; SSE: RET 0, implicit $rax562 ; AVX-LABEL: name: test_store_float563 ; AVX: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0564 ; AVX: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]565 ; AVX: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi566 ; AVX: [[COPY3:%[0-9]+]]:gr32 = COPY [[COPY1]]567 ; AVX: MOV32mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s32) into %ir.p1)568 ; AVX: $rax = COPY [[COPY2]]569 ; AVX: RET 0, implicit $rax570 ; AVX512F-LABEL: name: test_store_float571 ; AVX512F: [[COPY:%[0-9]+]]:vr128x = COPY $xmm0572 ; AVX512F: [[COPY1:%[0-9]+]]:fr32x = COPY [[COPY]]573 ; AVX512F: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi574 ; AVX512F: [[COPY3:%[0-9]+]]:gr32 = COPY [[COPY1]]575 ; AVX512F: MOV32mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s32) into %ir.p1)576 ; AVX512F: $rax = COPY [[COPY2]]577 ; AVX512F: RET 0, implicit $rax578 ; AVX512VL-LABEL: name: test_store_float579 ; AVX512VL: [[COPY:%[0-9]+]]:vr128x = COPY $xmm0580 ; AVX512VL: [[COPY1:%[0-9]+]]:fr32x = COPY [[COPY]]581 ; AVX512VL: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi582 ; AVX512VL: [[COPY3:%[0-9]+]]:gr32 = COPY [[COPY1]]583 ; AVX512VL: MOV32mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s32) into %ir.p1)584 ; AVX512VL: $rax = COPY [[COPY2]]585 ; AVX512VL: RET 0, implicit $rax586 %2:vecr(s128) = COPY $xmm0587 %0:vecr(s32) = G_TRUNC %2(s128)588 %1:gpr(p0) = COPY $rdi589 %3:gpr(s32) = COPY %0(s32)590 G_STORE %3(s32), %1(p0) :: (store unordered (s32) into %ir.p1)591 $rax = COPY %1(p0)592 RET 0, implicit $rax593 594...595---596name: test_store_float_vec597alignment: 16598legalized: true599regBankSelected: true600registers:601 - { id: 0, class: vecr, preferred-register: '' }602 - { id: 1, class: gpr, preferred-register: '' }603 - { id: 2, class: vecr, preferred-register: '' }604 - { id: 3, class: gpr, preferred-register: '' }605body: |606 bb.1 (%ir-block.0):607 liveins: $rdi, $xmm0608 609 ; SSE-LABEL: name: test_store_float_vec610 ; SSE: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0611 ; SSE: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]612 ; SSE: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi613 ; SSE: [[COPY3:%[0-9]+]]:gr32 = COPY [[COPY1]]614 ; SSE: MOV32mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s32) into %ir.p1)615 ; SSE: $rax = COPY [[COPY2]]616 ; SSE: RET 0, implicit $rax617 ; AVX-LABEL: name: test_store_float_vec618 ; AVX: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0619 ; AVX: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]620 ; AVX: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi621 ; AVX: [[COPY3:%[0-9]+]]:gr32 = COPY [[COPY1]]622 ; AVX: MOV32mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s32) into %ir.p1)623 ; AVX: $rax = COPY [[COPY2]]624 ; AVX: RET 0, implicit $rax625 ; AVX512F-LABEL: name: test_store_float_vec626 ; AVX512F: [[COPY:%[0-9]+]]:vr128x = COPY $xmm0627 ; AVX512F: [[COPY1:%[0-9]+]]:fr32x = COPY [[COPY]]628 ; AVX512F: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi629 ; AVX512F: [[COPY3:%[0-9]+]]:gr32 = COPY [[COPY1]]630 ; AVX512F: MOV32mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s32) into %ir.p1)631 ; AVX512F: $rax = COPY [[COPY2]]632 ; AVX512F: RET 0, implicit $rax633 ; AVX512VL-LABEL: name: test_store_float_vec634 ; AVX512VL: [[COPY:%[0-9]+]]:vr128x = COPY $xmm0635 ; AVX512VL: [[COPY1:%[0-9]+]]:fr32x = COPY [[COPY]]636 ; AVX512VL: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi637 ; AVX512VL: [[COPY3:%[0-9]+]]:gr32 = COPY [[COPY1]]638 ; AVX512VL: MOV32mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s32) into %ir.p1)639 ; AVX512VL: $rax = COPY [[COPY2]]640 ; AVX512VL: RET 0, implicit $rax641 %2:vecr(s128) = COPY $xmm0642 %0:vecr(s32) = G_TRUNC %2(s128)643 %1:gpr(p0) = COPY $rdi644 %3:gpr(s32) = COPY %0(s32)645 G_STORE %3(s32), %1(p0) :: (store unordered (s32) into %ir.p1)646 $rax = COPY %1(p0)647 RET 0, implicit $rax648 649...650---651name: test_store_double652alignment: 16653legalized: true654regBankSelected: true655registers:656 - { id: 0, class: vecr, preferred-register: '' }657 - { id: 1, class: gpr, preferred-register: '' }658 - { id: 2, class: vecr, preferred-register: '' }659 - { id: 3, class: gpr, preferred-register: '' }660# NO_AVX512X: %0:fr64 = COPY $xmm0661body: |662 bb.1 (%ir-block.0):663 liveins: $rdi, $xmm0664 665 ; SSE-LABEL: name: test_store_double666 ; SSE: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0667 ; SSE: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]668 ; SSE: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi669 ; SSE: [[COPY3:%[0-9]+]]:gr64 = COPY [[COPY1]]670 ; SSE: MOV64mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s64) into %ir.p1)671 ; SSE: $rax = COPY [[COPY2]]672 ; SSE: RET 0, implicit $rax673 ; AVX-LABEL: name: test_store_double674 ; AVX: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0675 ; AVX: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]676 ; AVX: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi677 ; AVX: [[COPY3:%[0-9]+]]:gr64 = COPY [[COPY1]]678 ; AVX: MOV64mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s64) into %ir.p1)679 ; AVX: $rax = COPY [[COPY2]]680 ; AVX: RET 0, implicit $rax681 ; AVX512F-LABEL: name: test_store_double682 ; AVX512F: [[COPY:%[0-9]+]]:vr128x = COPY $xmm0683 ; AVX512F: [[COPY1:%[0-9]+]]:fr64x = COPY [[COPY]]684 ; AVX512F: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi685 ; AVX512F: [[COPY3:%[0-9]+]]:gr64 = COPY [[COPY1]]686 ; AVX512F: MOV64mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s64) into %ir.p1)687 ; AVX512F: $rax = COPY [[COPY2]]688 ; AVX512F: RET 0, implicit $rax689 ; AVX512VL-LABEL: name: test_store_double690 ; AVX512VL: [[COPY:%[0-9]+]]:vr128x = COPY $xmm0691 ; AVX512VL: [[COPY1:%[0-9]+]]:fr64x = COPY [[COPY]]692 ; AVX512VL: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi693 ; AVX512VL: [[COPY3:%[0-9]+]]:gr64 = COPY [[COPY1]]694 ; AVX512VL: MOV64mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s64) into %ir.p1)695 ; AVX512VL: $rax = COPY [[COPY2]]696 ; AVX512VL: RET 0, implicit $rax697 %2:vecr(s128) = COPY $xmm0698 %0:vecr(s64) = G_TRUNC %2(s128)699 %1:gpr(p0) = COPY $rdi700 %3:gpr(s64) = COPY %0(s64)701 G_STORE %3(s64), %1(p0) :: (store unordered (s64) into %ir.p1)702 $rax = COPY %1(p0)703 RET 0, implicit $rax704 705...706---707name: test_store_double_vec708alignment: 16709legalized: true710regBankSelected: true711registers:712 - { id: 0, class: vecr, preferred-register: '' }713 - { id: 1, class: gpr, preferred-register: '' }714 - { id: 2, class: vecr, preferred-register: '' }715 - { id: 3, class: gpr, preferred-register: '' }716body: |717 bb.1 (%ir-block.0):718 liveins: $rdi, $xmm0719 720 ; SSE-LABEL: name: test_store_double_vec721 ; SSE: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0722 ; SSE: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]723 ; SSE: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi724 ; SSE: [[COPY3:%[0-9]+]]:gr64 = COPY [[COPY1]]725 ; SSE: MOV64mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s64) into %ir.p1)726 ; SSE: $rax = COPY [[COPY2]]727 ; SSE: RET 0, implicit $rax728 ; AVX-LABEL: name: test_store_double_vec729 ; AVX: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0730 ; AVX: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]731 ; AVX: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi732 ; AVX: [[COPY3:%[0-9]+]]:gr64 = COPY [[COPY1]]733 ; AVX: MOV64mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s64) into %ir.p1)734 ; AVX: $rax = COPY [[COPY2]]735 ; AVX: RET 0, implicit $rax736 ; AVX512F-LABEL: name: test_store_double_vec737 ; AVX512F: [[COPY:%[0-9]+]]:vr128x = COPY $xmm0738 ; AVX512F: [[COPY1:%[0-9]+]]:fr64x = COPY [[COPY]]739 ; AVX512F: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi740 ; AVX512F: [[COPY3:%[0-9]+]]:gr64 = COPY [[COPY1]]741 ; AVX512F: MOV64mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s64) into %ir.p1)742 ; AVX512F: $rax = COPY [[COPY2]]743 ; AVX512F: RET 0, implicit $rax744 ; AVX512VL-LABEL: name: test_store_double_vec745 ; AVX512VL: [[COPY:%[0-9]+]]:vr128x = COPY $xmm0746 ; AVX512VL: [[COPY1:%[0-9]+]]:fr64x = COPY [[COPY]]747 ; AVX512VL: [[COPY2:%[0-9]+]]:gr64 = COPY $rdi748 ; AVX512VL: [[COPY3:%[0-9]+]]:gr64 = COPY [[COPY1]]749 ; AVX512VL: MOV64mr [[COPY2]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store unordered (s64) into %ir.p1)750 ; AVX512VL: $rax = COPY [[COPY2]]751 ; AVX512VL: RET 0, implicit $rax752 %2:vecr(s128) = COPY $xmm0753 %0:vecr(s64) = G_TRUNC %2(s128)754 %1:gpr(p0) = COPY $rdi755 %3:gpr(s64) = COPY %0(s64)756 G_STORE %3(s64), %1(p0) :: (store unordered (s64) into %ir.p1)757 $rax = COPY %1(p0)758 RET 0, implicit $rax759 760...761---762name: test_load_ptr763alignment: 16764legalized: true765regBankSelected: true766selected: false767registers:768 - { id: 0, class: gpr }769 - { id: 1, class: gpr }770body: |771 bb.1 (%ir-block.0):772 liveins: $rdi773 774 ; SSE-LABEL: name: test_load_ptr775 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi776 ; SSE: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (p0) from %ir.ptr1)777 ; SSE: $rax = COPY [[MOV64rm]]778 ; SSE: RET 0, implicit $rax779 ; AVX-LABEL: name: test_load_ptr780 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi781 ; AVX: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (p0) from %ir.ptr1)782 ; AVX: $rax = COPY [[MOV64rm]]783 ; AVX: RET 0, implicit $rax784 ; AVX512F-LABEL: name: test_load_ptr785 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi786 ; AVX512F: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (p0) from %ir.ptr1)787 ; AVX512F: $rax = COPY [[MOV64rm]]788 ; AVX512F: RET 0, implicit $rax789 ; AVX512VL-LABEL: name: test_load_ptr790 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi791 ; AVX512VL: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered (p0) from %ir.ptr1)792 ; AVX512VL: $rax = COPY [[MOV64rm]]793 ; AVX512VL: RET 0, implicit $rax794 %0(p0) = COPY $rdi795 %1(p0) = G_LOAD %0(p0) :: (load unordered (p0) from %ir.ptr1)796 $rax = COPY %1(p0)797 RET 0, implicit $rax798 799...800---801name: test_store_ptr802alignment: 16803legalized: true804regBankSelected: true805selected: false806registers:807 - { id: 0, class: gpr }808 - { id: 1, class: gpr }809body: |810 bb.1 (%ir-block.0):811 liveins: $rdi, $rsi812 813 ; SSE-LABEL: name: test_store_ptr814 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi815 ; SSE: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi816 ; SSE: MOV64mr [[COPY]], 1, $noreg, 0, $noreg, [[COPY1]] :: (store unordered (p0) into %ir.ptr1)817 ; SSE: RET 0818 ; AVX-LABEL: name: test_store_ptr819 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi820 ; AVX: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi821 ; AVX: MOV64mr [[COPY]], 1, $noreg, 0, $noreg, [[COPY1]] :: (store unordered (p0) into %ir.ptr1)822 ; AVX: RET 0823 ; AVX512F-LABEL: name: test_store_ptr824 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi825 ; AVX512F: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi826 ; AVX512F: MOV64mr [[COPY]], 1, $noreg, 0, $noreg, [[COPY1]] :: (store unordered (p0) into %ir.ptr1)827 ; AVX512F: RET 0828 ; AVX512VL-LABEL: name: test_store_ptr829 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi830 ; AVX512VL: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi831 ; AVX512VL: MOV64mr [[COPY]], 1, $noreg, 0, $noreg, [[COPY1]] :: (store unordered (p0) into %ir.ptr1)832 ; AVX512VL: RET 0833 %0(p0) = COPY $rdi834 %1(p0) = COPY $rsi835 G_STORE %1(p0), %0(p0) :: (store unordered (p0) into %ir.ptr1)836 RET 0837 838...839---840name: test_gep_folding841alignment: 16842legalized: true843regBankSelected: true844registers:845 - { id: 0, class: gpr }846 - { id: 1, class: gpr }847 - { id: 2, class: gpr }848 - { id: 3, class: gpr }849 - { id: 4, class: gpr }850body: |851 bb.1 (%ir-block.0):852 liveins: $esi, $rdi853 854 ; SSE-LABEL: name: test_gep_folding855 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi856 ; SSE: [[COPY1:%[0-9]+]]:gr32 = COPY $esi857 ; SSE: MOV32mr [[COPY]], 1, $noreg, 20, $noreg, [[COPY1]] :: (store unordered (s32) into %ir.arrayidx)858 ; SSE: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 20, $noreg :: (load unordered (s32) from %ir.arrayidx)859 ; SSE: $eax = COPY [[MOV32rm]]860 ; SSE: RET 0, implicit $eax861 ; AVX-LABEL: name: test_gep_folding862 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi863 ; AVX: [[COPY1:%[0-9]+]]:gr32 = COPY $esi864 ; AVX: MOV32mr [[COPY]], 1, $noreg, 20, $noreg, [[COPY1]] :: (store unordered (s32) into %ir.arrayidx)865 ; AVX: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 20, $noreg :: (load unordered (s32) from %ir.arrayidx)866 ; AVX: $eax = COPY [[MOV32rm]]867 ; AVX: RET 0, implicit $eax868 ; AVX512F-LABEL: name: test_gep_folding869 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi870 ; AVX512F: [[COPY1:%[0-9]+]]:gr32 = COPY $esi871 ; AVX512F: MOV32mr [[COPY]], 1, $noreg, 20, $noreg, [[COPY1]] :: (store unordered (s32) into %ir.arrayidx)872 ; AVX512F: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 20, $noreg :: (load unordered (s32) from %ir.arrayidx)873 ; AVX512F: $eax = COPY [[MOV32rm]]874 ; AVX512F: RET 0, implicit $eax875 ; AVX512VL-LABEL: name: test_gep_folding876 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi877 ; AVX512VL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi878 ; AVX512VL: MOV32mr [[COPY]], 1, $noreg, 20, $noreg, [[COPY1]] :: (store unordered (s32) into %ir.arrayidx)879 ; AVX512VL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 20, $noreg :: (load unordered (s32) from %ir.arrayidx)880 ; AVX512VL: $eax = COPY [[MOV32rm]]881 ; AVX512VL: RET 0, implicit $eax882 %0(p0) = COPY $rdi883 %1(s32) = COPY $esi884 %2(s64) = G_CONSTANT i64 20885 %3(p0) = G_PTR_ADD %0, %2(s64)886 G_STORE %1(s32), %3(p0) :: (store unordered (s32) into %ir.arrayidx)887 %4(s32) = G_LOAD %3(p0) :: (load unordered (s32) from %ir.arrayidx)888 $eax = COPY %4(s32)889 RET 0, implicit $eax890 891...892---893name: test_gep_folding_largeGepIndex894alignment: 16895legalized: true896regBankSelected: true897registers:898 - { id: 0, class: gpr }899 - { id: 1, class: gpr }900 - { id: 2, class: gpr }901 - { id: 3, class: gpr }902 - { id: 4, class: gpr }903body: |904 bb.1 (%ir-block.0):905 liveins: $esi, $rdi906 907 ; SSE-LABEL: name: test_gep_folding_largeGepIndex908 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi909 ; SSE: [[COPY1:%[0-9]+]]:gr32 = COPY $esi910 ; SSE: [[MOV64ri:%[0-9]+]]:gr64_nosp = MOV64ri 228719476720911 ; SSE: [[LEA64r:%[0-9]+]]:gr64 = LEA64r [[COPY]], 1, [[MOV64ri]], 0, $noreg912 ; SSE: MOV32mr [[LEA64r]], 1, $noreg, 0, $noreg, [[COPY1]] :: (store unordered (s32) into %ir.arrayidx)913 ; SSE: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[LEA64r]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.arrayidx)914 ; SSE: $eax = COPY [[MOV32rm]]915 ; SSE: RET 0, implicit $eax916 ; AVX-LABEL: name: test_gep_folding_largeGepIndex917 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi918 ; AVX: [[COPY1:%[0-9]+]]:gr32 = COPY $esi919 ; AVX: [[MOV64ri:%[0-9]+]]:gr64_nosp = MOV64ri 228719476720920 ; AVX: [[LEA64r:%[0-9]+]]:gr64 = LEA64r [[COPY]], 1, [[MOV64ri]], 0, $noreg921 ; AVX: MOV32mr [[LEA64r]], 1, $noreg, 0, $noreg, [[COPY1]] :: (store unordered (s32) into %ir.arrayidx)922 ; AVX: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[LEA64r]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.arrayidx)923 ; AVX: $eax = COPY [[MOV32rm]]924 ; AVX: RET 0, implicit $eax925 ; AVX512F-LABEL: name: test_gep_folding_largeGepIndex926 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi927 ; AVX512F: [[COPY1:%[0-9]+]]:gr32 = COPY $esi928 ; AVX512F: [[MOV64ri:%[0-9]+]]:gr64_nosp = MOV64ri 228719476720929 ; AVX512F: [[LEA64r:%[0-9]+]]:gr64 = LEA64r [[COPY]], 1, [[MOV64ri]], 0, $noreg930 ; AVX512F: MOV32mr [[LEA64r]], 1, $noreg, 0, $noreg, [[COPY1]] :: (store unordered (s32) into %ir.arrayidx)931 ; AVX512F: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[LEA64r]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.arrayidx)932 ; AVX512F: $eax = COPY [[MOV32rm]]933 ; AVX512F: RET 0, implicit $eax934 ; AVX512VL-LABEL: name: test_gep_folding_largeGepIndex935 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi936 ; AVX512VL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi937 ; AVX512VL: [[MOV64ri:%[0-9]+]]:gr64_nosp = MOV64ri 228719476720938 ; AVX512VL: [[LEA64r:%[0-9]+]]:gr64 = LEA64r [[COPY]], 1, [[MOV64ri]], 0, $noreg939 ; AVX512VL: MOV32mr [[LEA64r]], 1, $noreg, 0, $noreg, [[COPY1]] :: (store unordered (s32) into %ir.arrayidx)940 ; AVX512VL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[LEA64r]], 1, $noreg, 0, $noreg :: (load unordered (s32) from %ir.arrayidx)941 ; AVX512VL: $eax = COPY [[MOV32rm]]942 ; AVX512VL: RET 0, implicit $eax943 %0(p0) = COPY $rdi944 %1(s32) = COPY $esi945 %2(s64) = G_CONSTANT i64 228719476720946 %3(p0) = G_PTR_ADD %0, %2(s64)947 G_STORE %1(s32), %3(p0) :: (store unordered (s32) into %ir.arrayidx)948 %4(s32) = G_LOAD %3(p0) :: (load unordered (s32) from %ir.arrayidx)949 $eax = COPY %4(s32)950 RET 0, implicit $eax951 952...953