185 lines · plain
1# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=ALL,NO_AVX512F2# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=ALL,AVX512ALL,AVX512F3# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=ALL,AVX512ALL,AVX512VL4 5 6--- |7 define <8 x i32> @test_load_v8i32_noalign(ptr %p1) {8 %r = load <8 x i32>, ptr %p1, align 19 ret <8 x i32> %r10 }11 12 define <8 x i32> @test_load_v8i32_align(ptr %p1) {13 %r = load <8 x i32>, ptr %p1, align 3214 ret <8 x i32> %r15 }16 17 define void @test_store_v8i32_noalign(<8 x i32> %val, ptr %p1) {18 store <8 x i32> %val, ptr %p1, align 119 ret void20 }21 22 define void @test_store_v8i32_align(<8 x i32> %val, ptr %p1) {23 store <8 x i32> %val, ptr %p1, align 3224 ret void25 }26 27 28...29---30name: test_load_v8i32_noalign31# ALL-LABEL: name: test_load_v8i32_noalign32alignment: 1633legalized: true34regBankSelected: true35# NO_AVX512F: registers:36# NO_AVX512F-NEXT: - { id: 0, class: gr64, preferred-register: '', flags: [ ] }37# NO_AVX512F-NEXT: - { id: 1, class: vr256, preferred-register: '', flags: [ ] }38#39# AVX512ALL: registers:40# AVX512ALL-NEXT: - { id: 0, class: gr64, preferred-register: '', flags: [ ] }41# AVX512F-NEXT: - { id: 1, class: vr256, preferred-register: '', flags: [ ] }42# AVX512VL-NEXT: - { id: 1, class: vr256x, preferred-register: '', flags: [ ] }43registers:44 - { id: 0, class: gpr }45 - { id: 1, class: vecr }46# NO_AVX512F: %0:gr64 = COPY $rdi47# NO_AVX512F-NEXT: %1:vr256 = VMOVUPSYrm %0, 1, $noreg, 0, $noreg :: (load (<8 x s32>) from %ir.p1, align 1)48# NO_AVX512F-NEXT: $ymm0 = COPY %149# NO_AVX512F-NEXT: RET 0, implicit $ymm050#51# AVX512F: %0:gr64 = COPY $rdi52# AVX512F-NEXT: %1:vr256 = VMOVUPSYrm %0, 1, $noreg, 0, $noreg :: (load (<8 x s32>) from %ir.p1, align 1)53# AVX512F-NEXT: $ymm0 = COPY %154# AVX512F-NEXT: RET 0, implicit $ymm055#56# AVX512VL: %0:gr64 = COPY $rdi57# AVX512VL-NEXT: %1:vr256x = VMOVUPSZ256rm %0, 1, $noreg, 0, $noreg :: (load (<8 x s32>) from %ir.p1, align 1)58# AVX512VL-NEXT: $ymm0 = COPY %159# AVX512VL-NEXT: RET 0, implicit $ymm060body: |61 bb.1 (%ir-block.0):62 liveins: $rdi63 64 %0(p0) = COPY $rdi65 %1(<8 x s32>) = G_LOAD %0(p0) :: (load (<8 x s32>) from %ir.p1, align 1)66 $ymm0 = COPY %1(<8 x s32>)67 RET 0, implicit $ymm068 69...70---71name: test_load_v8i32_align72# ALL-LABEL: name: test_load_v8i32_align73alignment: 1674legalized: true75regBankSelected: true76registers:77 - { id: 0, class: gpr }78 - { id: 1, class: vecr }79# NO_AVX512F: %0:gr64 = COPY $rdi80# NO_AVX512F-NEXT: %1:vr256 = VMOVAPSYrm %0, 1, $noreg, 0, $noreg :: (load (<8 x s32>) from %ir.p1)81# NO_AVX512F-NEXT: $ymm0 = COPY %182# NO_AVX512F-NEXT: RET 0, implicit $ymm083#84# AVX512F: %0:gr64 = COPY $rdi85# AVX512F-NEXT: %1:vr256 = VMOVAPSYrm %0, 1, $noreg, 0, $noreg :: (load (<8 x s32>) from %ir.p1)86# AVX512F-NEXT: $ymm0 = COPY %187# AVX512F-NEXT: RET 0, implicit $ymm088#89# AVX512VL: %0:gr64 = COPY $rdi90# AVX512VL-NEXT: %1:vr256x = VMOVAPSZ256rm %0, 1, $noreg, 0, $noreg :: (load (<8 x s32>) from %ir.p1)91# AVX512VL-NEXT: $ymm0 = COPY %192# AVX512VL-NEXT: RET 0, implicit $ymm093body: |94 bb.1 (%ir-block.0):95 liveins: $rdi96 97 %0(p0) = COPY $rdi98 %1(<8 x s32>) = G_LOAD %0(p0) :: (load (<8 x s32>) from %ir.p1)99 $ymm0 = COPY %1(<8 x s32>)100 RET 0, implicit $ymm0101 102...103---104name: test_store_v8i32_noalign105# ALL-LABEL: name: test_store_v8i32_noalign106alignment: 16107legalized: true108regBankSelected: true109# NO_AVX512F: registers:110# NO_AVX512F-NEXT: - { id: 0, class: vr256, preferred-register: '', flags: [ ] }111# NO_AVX512F-NEXT: - { id: 1, class: gr64, preferred-register: '', flags: [ ] }112#113# AVX512ALL: registers:114# AVX512F-NEXT: - { id: 0, class: vr256, preferred-register: '', flags: [ ] }115# AVX512VL-NEXT: - { id: 0, class: vr256x, preferred-register: '', flags: [ ] }116# AVX512ALL-NEXT: - { id: 1, class: gr64, preferred-register: '', flags: [ ] }117registers:118 - { id: 0, class: vecr }119 - { id: 1, class: gpr }120# NO_AVX512F: %0:vr256 = COPY $ymm0121# NO_AVX512F-NEXT: %1:gr64 = COPY $rdi122# NO_AVX512F-NEXT: VMOVUPSYmr %1, 1, $noreg, 0, $noreg, %0 :: (store (<8 x s32>) into %ir.p1, align 1)123# NO_AVX512F-NEXT: RET 0124#125# AVX512F: %0:vr256 = COPY $ymm0126# AVX512F-NEXT: %1:gr64 = COPY $rdi127# AVX512F-NEXT: VMOVUPSYmr %1, 1, $noreg, 0, $noreg, %0 :: (store (<8 x s32>) into %ir.p1, align 1)128# AVX512F-NEXT: RET 0129#130# AVX512VL: %0:vr256x = COPY $ymm0131# AVX512VL-NEXT: %1:gr64 = COPY $rdi132# AVX512VL-NEXT: VMOVUPSZ256mr %1, 1, $noreg, 0, $noreg, %0 :: (store (<8 x s32>) into %ir.p1, align 1)133# AVX512VL-NEXT: RET 0134body: |135 bb.1 (%ir-block.0):136 liveins: $rdi, $ymm0137 138 %0(<8 x s32>) = COPY $ymm0139 %1(p0) = COPY $rdi140 G_STORE %0(<8 x s32>), %1(p0) :: (store (<8 x s32>) into %ir.p1, align 1)141 RET 0142 143...144---145name: test_store_v8i32_align146# ALL-LABEL: name: test_store_v8i32_align147alignment: 16148legalized: true149regBankSelected: true150# NO_AVX512F: registers:151# NO_AVX512F-NEXT: - { id: 0, class: vr256, preferred-register: '', flags: [ ] }152# NO_AVX512F-NEXT: - { id: 1, class: gr64, preferred-register: '', flags: [ ] }153#154# AVX512ALL: registers:155# AVX512F-NEXT: - { id: 0, class: vr256, preferred-register: '', flags: [ ] }156# AVX512VL-NEXT: - { id: 0, class: vr256x, preferred-register: '', flags: [ ] }157# AVX512ALL-NEXT: - { id: 1, class: gr64, preferred-register: '', flags: [ ] }158registers:159 - { id: 0, class: vecr }160 - { id: 1, class: gpr }161# NO_AVX512F: %0:vr256 = COPY $ymm0162# NO_AVX512F-NEXT: %1:gr64 = COPY $rdi163# NO_AVX512F-NEXT: VMOVAPSYmr %1, 1, $noreg, 0, $noreg, %0 :: (store (<8 x s32>) into %ir.p1)164# NO_AVX512F-NEXT: RET 0165#166# AVX512F: %0:vr256 = COPY $ymm0167# AVX512F-NEXT: %1:gr64 = COPY $rdi168# AVX512F-NEXT: VMOVAPSYmr %1, 1, $noreg, 0, $noreg, %0 :: (store (<8 x s32>) into %ir.p1)169# AVX512F-NEXT: RET 0170#171# AVX512VL: %0:vr256x = COPY $ymm0172# AVX512VL-NEXT: %1:gr64 = COPY $rdi173# AVX512VL-NEXT: VMOVAPSZ256mr %1, 1, $noreg, 0, $noreg, %0 :: (store (<8 x s32>) into %ir.p1)174# AVX512VL-NEXT: RET 0175body: |176 bb.1 (%ir-block.0):177 liveins: $rdi, $ymm0178 179 %0(<8 x s32>) = COPY $ymm0180 %1(p0) = COPY $rdi181 G_STORE %0(<8 x s32>), %1(p0) :: (store (<8 x s32>) into %ir.p1)182 RET 0183 184...185