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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X643 4define i16 @test_shl_i4(i16 %v, i16 %a, i16 %b) {5; Let's say the arguments are the following unsigned6; integers in two’s complement representation:7;8; %v: 77 (0000 0000  0100 1101)9; %a: 74 (0000 0000  0100 1010)10; %b: 72 (0000 0000  0100 1000)11; X64-LABEL: test_shl_i4:12; X64:       # %bb.0:13; X64-NEXT:    # kill: def $esi killed $esi def $rsi14; X64-NEXT:    # kill: def $edx killed $edx def $rdx15; X64-NEXT:    leal (%rdx,%rsi), %ecx16; X64-NEXT:    andb $15, %cl17; X64-NEXT:    # kill: def $cl killed $cl killed $ecx18; X64-NEXT:    shlb %cl, %dil19; X64-NEXT:    movzbl %dil, %eax20; X64-NEXT:    andw $15, %ax21; X64-NEXT:    # kill: def $ax killed $ax killed $eax22; X64-NEXT:    retq23  %v.t = trunc i16 %v to i4  ; %v.t: 13 (1101)24  %a.t = trunc i16 %a to i4  ; %a.t: 10 (1010)25  %b.t = trunc i16 %b to i4  ; %b.t:  8 (1000)26  %n.t = add i4 %a.t, %b.t   ; %n.t:  2 (0010)27  %r.t = shl i4 %v.t, %n.t   ; %r.t:  4 (0100)28  %r = zext i4 %r.t to i1629; %r:  4 (0000 0000 0000 0100)30  ret i16 %r31 32; %di:  77 (0000 0000  0100 1101)33; %si:  74 (0000 0000  0100 1010)34; %dx:  72 (0000 0000  0100 1000)35; %dx: 146 (0000 0000  1001 0010)36; %dx:   2 (0000 0000  0000 0010)37; %cx:   2 (0000 0000  0000 0010)38; %di:  52 (0000 0000  0011 0100)39; %di:   4 (0000 0000  0000 0100)40; %ax:   4 (0000 0000  0000 0100)41; Let's pretend that legalizing G_SHL by widening its second42; source operand is done via G_ANYEXT rather than G_ZEXT and43; see what happens:44;              addb %sil, %dl45; %dx: 146 (0000 0000  1001 0010)46;              movl %edx, %ecx47; %cx: 146 (0000 0000  1001 0010)48;              shlb %cl, %dil49; %di:   0 (0000 0000  0000 0000)50;              andw $15, %di51; %di:   0 (0000 0000  0000 0000)52;              movl %edi, %eax53; %ax:   0 (0000 0000  0000 0000)54;              retq55}56