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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE424; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX15; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX26; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX5127 8;9; trunc(abs(sub(sext(a),sext(b)))) -> abds(a,b)10;11 12define <16 x i8> @abd_ext_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {13; SSE2-LABEL: abd_ext_v16i8:14; SSE2: # %bb.0:15; SSE2-NEXT: movdqa %xmm0, %xmm216; SSE2-NEXT: pcmpgtb %xmm1, %xmm217; SSE2-NEXT: psubb %xmm1, %xmm018; SSE2-NEXT: pxor %xmm2, %xmm019; SSE2-NEXT: psubb %xmm0, %xmm220; SSE2-NEXT: movdqa %xmm2, %xmm021; SSE2-NEXT: retq22;23; SSE42-LABEL: abd_ext_v16i8:24; SSE42: # %bb.0:25; SSE42-NEXT: movdqa %xmm0, %xmm226; SSE42-NEXT: pminsb %xmm1, %xmm227; SSE42-NEXT: pmaxsb %xmm1, %xmm028; SSE42-NEXT: psubb %xmm2, %xmm029; SSE42-NEXT: retq30;31; AVX-LABEL: abd_ext_v16i8:32; AVX: # %bb.0:33; AVX-NEXT: vpminsb %xmm1, %xmm0, %xmm234; AVX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm035; AVX-NEXT: vpsubb %xmm2, %xmm0, %xmm036; AVX-NEXT: retq37 %aext = sext <16 x i8> %a to <16 x i64>38 %bext = sext <16 x i8> %b to <16 x i64>39 %sub = sub <16 x i64> %aext, %bext40 %abs = call <16 x i64> @llvm.abs.v16i64(<16 x i64> %sub, i1 false)41 %trunc = trunc <16 x i64> %abs to <16 x i8>42 ret <16 x i8> %trunc43}44 45define <16 x i8> @abd_ext_v16i8_undef(<16 x i8> %a, <16 x i8> %b) nounwind {46; SSE2-LABEL: abd_ext_v16i8_undef:47; SSE2: # %bb.0:48; SSE2-NEXT: movdqa %xmm0, %xmm249; SSE2-NEXT: pcmpgtb %xmm1, %xmm250; SSE2-NEXT: psubb %xmm1, %xmm051; SSE2-NEXT: pxor %xmm2, %xmm052; SSE2-NEXT: psubb %xmm0, %xmm253; SSE2-NEXT: movdqa %xmm2, %xmm054; SSE2-NEXT: retq55;56; SSE42-LABEL: abd_ext_v16i8_undef:57; SSE42: # %bb.0:58; SSE42-NEXT: movdqa %xmm0, %xmm259; SSE42-NEXT: pminsb %xmm1, %xmm260; SSE42-NEXT: pmaxsb %xmm1, %xmm061; SSE42-NEXT: psubb %xmm2, %xmm062; SSE42-NEXT: retq63;64; AVX-LABEL: abd_ext_v16i8_undef:65; AVX: # %bb.0:66; AVX-NEXT: vpminsb %xmm1, %xmm0, %xmm267; AVX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm068; AVX-NEXT: vpsubb %xmm2, %xmm0, %xmm069; AVX-NEXT: retq70 %aext = sext <16 x i8> %a to <16 x i64>71 %bext = sext <16 x i8> %b to <16 x i64>72 %sub = sub <16 x i64> %aext, %bext73 %abs = call <16 x i64> @llvm.abs.v16i64(<16 x i64> %sub, i1 true)74 %trunc = trunc <16 x i64> %abs to <16 x i8>75 ret <16 x i8> %trunc76}77 78define <8 x i16> @abd_ext_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {79; SSE-LABEL: abd_ext_v8i16:80; SSE: # %bb.0:81; SSE-NEXT: movdqa %xmm0, %xmm282; SSE-NEXT: pminsw %xmm1, %xmm283; SSE-NEXT: pmaxsw %xmm1, %xmm084; SSE-NEXT: psubw %xmm2, %xmm085; SSE-NEXT: retq86;87; AVX-LABEL: abd_ext_v8i16:88; AVX: # %bb.0:89; AVX-NEXT: vpminsw %xmm1, %xmm0, %xmm290; AVX-NEXT: vpmaxsw %xmm1, %xmm0, %xmm091; AVX-NEXT: vpsubw %xmm2, %xmm0, %xmm092; AVX-NEXT: retq93 %aext = sext <8 x i16> %a to <8 x i64>94 %bext = sext <8 x i16> %b to <8 x i64>95 %sub = sub <8 x i64> %aext, %bext96 %abs = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %sub, i1 false)97 %trunc = trunc <8 x i64> %abs to <8 x i16>98 ret <8 x i16> %trunc99}100 101define <8 x i16> @abd_ext_v8i16_undef(<8 x i16> %a, <8 x i16> %b) nounwind {102; SSE-LABEL: abd_ext_v8i16_undef:103; SSE: # %bb.0:104; SSE-NEXT: movdqa %xmm0, %xmm2105; SSE-NEXT: pminsw %xmm1, %xmm2106; SSE-NEXT: pmaxsw %xmm1, %xmm0107; SSE-NEXT: psubw %xmm2, %xmm0108; SSE-NEXT: retq109;110; AVX-LABEL: abd_ext_v8i16_undef:111; AVX: # %bb.0:112; AVX-NEXT: vpminsw %xmm1, %xmm0, %xmm2113; AVX-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0114; AVX-NEXT: vpsubw %xmm2, %xmm0, %xmm0115; AVX-NEXT: retq116 %aext = sext <8 x i16> %a to <8 x i64>117 %bext = sext <8 x i16> %b to <8 x i64>118 %sub = sub <8 x i64> %aext, %bext119 %abs = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %sub, i1 true)120 %trunc = trunc <8 x i64> %abs to <8 x i16>121 ret <8 x i16> %trunc122}123 124define <4 x i32> @abd_ext_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {125; SSE2-LABEL: abd_ext_v4i32:126; SSE2: # %bb.0:127; SSE2-NEXT: movdqa %xmm0, %xmm2128; SSE2-NEXT: pcmpgtd %xmm1, %xmm2129; SSE2-NEXT: psubd %xmm1, %xmm0130; SSE2-NEXT: pxor %xmm2, %xmm0131; SSE2-NEXT: psubd %xmm0, %xmm2132; SSE2-NEXT: movdqa %xmm2, %xmm0133; SSE2-NEXT: retq134;135; SSE42-LABEL: abd_ext_v4i32:136; SSE42: # %bb.0:137; SSE42-NEXT: movdqa %xmm0, %xmm2138; SSE42-NEXT: pminsd %xmm1, %xmm2139; SSE42-NEXT: pmaxsd %xmm1, %xmm0140; SSE42-NEXT: psubd %xmm2, %xmm0141; SSE42-NEXT: retq142;143; AVX-LABEL: abd_ext_v4i32:144; AVX: # %bb.0:145; AVX-NEXT: vpminsd %xmm1, %xmm0, %xmm2146; AVX-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0147; AVX-NEXT: vpsubd %xmm2, %xmm0, %xmm0148; AVX-NEXT: retq149 %aext = sext <4 x i32> %a to <4 x i64>150 %bext = sext <4 x i32> %b to <4 x i64>151 %sub = sub <4 x i64> %aext, %bext152 %abs = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %sub, i1 false)153 %trunc = trunc <4 x i64> %abs to <4 x i32>154 ret <4 x i32> %trunc155}156 157define <4 x i32> @abd_ext_v4i32_undef(<4 x i32> %a, <4 x i32> %b) nounwind {158; SSE2-LABEL: abd_ext_v4i32_undef:159; SSE2: # %bb.0:160; SSE2-NEXT: movdqa %xmm0, %xmm2161; SSE2-NEXT: pcmpgtd %xmm1, %xmm2162; SSE2-NEXT: psubd %xmm1, %xmm0163; SSE2-NEXT: pxor %xmm2, %xmm0164; SSE2-NEXT: psubd %xmm0, %xmm2165; SSE2-NEXT: movdqa %xmm2, %xmm0166; SSE2-NEXT: retq167;168; SSE42-LABEL: abd_ext_v4i32_undef:169; SSE42: # %bb.0:170; SSE42-NEXT: movdqa %xmm0, %xmm2171; SSE42-NEXT: pminsd %xmm1, %xmm2172; SSE42-NEXT: pmaxsd %xmm1, %xmm0173; SSE42-NEXT: psubd %xmm2, %xmm0174; SSE42-NEXT: retq175;176; AVX-LABEL: abd_ext_v4i32_undef:177; AVX: # %bb.0:178; AVX-NEXT: vpminsd %xmm1, %xmm0, %xmm2179; AVX-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0180; AVX-NEXT: vpsubd %xmm2, %xmm0, %xmm0181; AVX-NEXT: retq182 %aext = sext <4 x i32> %a to <4 x i64>183 %bext = sext <4 x i32> %b to <4 x i64>184 %sub = sub <4 x i64> %aext, %bext185 %abs = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %sub, i1 true)186 %trunc = trunc <4 x i64> %abs to <4 x i32>187 ret <4 x i32> %trunc188}189 190define <2 x i64> @abd_ext_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {191; SSE2-LABEL: abd_ext_v2i64:192; SSE2: # %bb.0:193; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648]194; SSE2-NEXT: movdqa %xmm1, %xmm3195; SSE2-NEXT: pxor %xmm2, %xmm3196; SSE2-NEXT: pxor %xmm0, %xmm2197; SSE2-NEXT: movdqa %xmm2, %xmm4198; SSE2-NEXT: pcmpgtd %xmm3, %xmm4199; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]200; SSE2-NEXT: pcmpeqd %xmm3, %xmm2201; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]202; SSE2-NEXT: pand %xmm5, %xmm3203; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]204; SSE2-NEXT: por %xmm3, %xmm2205; SSE2-NEXT: psubq %xmm1, %xmm0206; SSE2-NEXT: pxor %xmm2, %xmm0207; SSE2-NEXT: psubq %xmm0, %xmm2208; SSE2-NEXT: movdqa %xmm2, %xmm0209; SSE2-NEXT: retq210;211; SSE42-LABEL: abd_ext_v2i64:212; SSE42: # %bb.0:213; SSE42-NEXT: movdqa %xmm0, %xmm2214; SSE42-NEXT: pcmpgtq %xmm1, %xmm2215; SSE42-NEXT: psubq %xmm1, %xmm0216; SSE42-NEXT: pxor %xmm2, %xmm0217; SSE42-NEXT: psubq %xmm0, %xmm2218; SSE42-NEXT: movdqa %xmm2, %xmm0219; SSE42-NEXT: retq220;221; AVX1-LABEL: abd_ext_v2i64:222; AVX1: # %bb.0:223; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2224; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0225; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm0226; AVX1-NEXT: vpsubq %xmm0, %xmm2, %xmm0227; AVX1-NEXT: retq228;229; AVX2-LABEL: abd_ext_v2i64:230; AVX2: # %bb.0:231; AVX2-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2232; AVX2-NEXT: vpsubq %xmm1, %xmm0, %xmm0233; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0234; AVX2-NEXT: vpsubq %xmm0, %xmm2, %xmm0235; AVX2-NEXT: retq236;237; AVX512-LABEL: abd_ext_v2i64:238; AVX512: # %bb.0:239; AVX512-NEXT: vpminsq %xmm1, %xmm0, %xmm2240; AVX512-NEXT: vpmaxsq %xmm1, %xmm0, %xmm0241; AVX512-NEXT: vpsubq %xmm2, %xmm0, %xmm0242; AVX512-NEXT: retq243 %aext = sext <2 x i64> %a to <2 x i128>244 %bext = sext <2 x i64> %b to <2 x i128>245 %sub = sub <2 x i128> %aext, %bext246 %abs = call <2 x i128> @llvm.abs.v2i128(<2 x i128> %sub, i1 false)247 %trunc = trunc <2 x i128> %abs to <2 x i64>248 ret <2 x i64> %trunc249}250 251define <2 x i64> @abd_ext_v2i64_undef(<2 x i64> %a, <2 x i64> %b) nounwind {252; SSE2-LABEL: abd_ext_v2i64_undef:253; SSE2: # %bb.0:254; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648]255; SSE2-NEXT: movdqa %xmm1, %xmm3256; SSE2-NEXT: pxor %xmm2, %xmm3257; SSE2-NEXT: pxor %xmm0, %xmm2258; SSE2-NEXT: movdqa %xmm2, %xmm4259; SSE2-NEXT: pcmpgtd %xmm3, %xmm4260; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]261; SSE2-NEXT: pcmpeqd %xmm3, %xmm2262; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]263; SSE2-NEXT: pand %xmm5, %xmm3264; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]265; SSE2-NEXT: por %xmm3, %xmm2266; SSE2-NEXT: psubq %xmm1, %xmm0267; SSE2-NEXT: pxor %xmm2, %xmm0268; SSE2-NEXT: psubq %xmm0, %xmm2269; SSE2-NEXT: movdqa %xmm2, %xmm0270; SSE2-NEXT: retq271;272; SSE42-LABEL: abd_ext_v2i64_undef:273; SSE42: # %bb.0:274; SSE42-NEXT: movdqa %xmm0, %xmm2275; SSE42-NEXT: pcmpgtq %xmm1, %xmm2276; SSE42-NEXT: psubq %xmm1, %xmm0277; SSE42-NEXT: pxor %xmm2, %xmm0278; SSE42-NEXT: psubq %xmm0, %xmm2279; SSE42-NEXT: movdqa %xmm2, %xmm0280; SSE42-NEXT: retq281;282; AVX1-LABEL: abd_ext_v2i64_undef:283; AVX1: # %bb.0:284; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2285; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0286; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm0287; AVX1-NEXT: vpsubq %xmm0, %xmm2, %xmm0288; AVX1-NEXT: retq289;290; AVX2-LABEL: abd_ext_v2i64_undef:291; AVX2: # %bb.0:292; AVX2-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2293; AVX2-NEXT: vpsubq %xmm1, %xmm0, %xmm0294; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0295; AVX2-NEXT: vpsubq %xmm0, %xmm2, %xmm0296; AVX2-NEXT: retq297;298; AVX512-LABEL: abd_ext_v2i64_undef:299; AVX512: # %bb.0:300; AVX512-NEXT: vpminsq %xmm1, %xmm0, %xmm2301; AVX512-NEXT: vpmaxsq %xmm1, %xmm0, %xmm0302; AVX512-NEXT: vpsubq %xmm2, %xmm0, %xmm0303; AVX512-NEXT: retq304 %aext = sext <2 x i64> %a to <2 x i128>305 %bext = sext <2 x i64> %b to <2 x i128>306 %sub = sub <2 x i128> %aext, %bext307 %abs = call <2 x i128> @llvm.abs.v2i128(<2 x i128> %sub, i1 true)308 %trunc = trunc <2 x i128> %abs to <2 x i64>309 ret <2 x i64> %trunc310}311 312;313; sub(smax(a,b),smin(a,b)) -> abds(a,b)314;315 316define <16 x i8> @abd_minmax_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {317; SSE2-LABEL: abd_minmax_v16i8:318; SSE2: # %bb.0:319; SSE2-NEXT: movdqa %xmm0, %xmm2320; SSE2-NEXT: pcmpgtb %xmm1, %xmm2321; SSE2-NEXT: psubb %xmm1, %xmm0322; SSE2-NEXT: pxor %xmm2, %xmm0323; SSE2-NEXT: psubb %xmm0, %xmm2324; SSE2-NEXT: movdqa %xmm2, %xmm0325; SSE2-NEXT: retq326;327; SSE42-LABEL: abd_minmax_v16i8:328; SSE42: # %bb.0:329; SSE42-NEXT: movdqa %xmm0, %xmm2330; SSE42-NEXT: pminsb %xmm1, %xmm2331; SSE42-NEXT: pmaxsb %xmm1, %xmm0332; SSE42-NEXT: psubb %xmm2, %xmm0333; SSE42-NEXT: retq334;335; AVX-LABEL: abd_minmax_v16i8:336; AVX: # %bb.0:337; AVX-NEXT: vpminsb %xmm1, %xmm0, %xmm2338; AVX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0339; AVX-NEXT: vpsubb %xmm2, %xmm0, %xmm0340; AVX-NEXT: retq341 %min = call <16 x i8> @llvm.smin.v16i8(<16 x i8> %a, <16 x i8> %b)342 %max = call <16 x i8> @llvm.smax.v16i8(<16 x i8> %a, <16 x i8> %b)343 %sub = sub <16 x i8> %max, %min344 ret <16 x i8> %sub345}346 347define <8 x i16> @abd_minmax_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {348; SSE-LABEL: abd_minmax_v8i16:349; SSE: # %bb.0:350; SSE-NEXT: movdqa %xmm0, %xmm2351; SSE-NEXT: pminsw %xmm1, %xmm2352; SSE-NEXT: pmaxsw %xmm1, %xmm0353; SSE-NEXT: psubw %xmm2, %xmm0354; SSE-NEXT: retq355;356; AVX-LABEL: abd_minmax_v8i16:357; AVX: # %bb.0:358; AVX-NEXT: vpminsw %xmm1, %xmm0, %xmm2359; AVX-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0360; AVX-NEXT: vpsubw %xmm2, %xmm0, %xmm0361; AVX-NEXT: retq362 %min = call <8 x i16> @llvm.smin.v8i16(<8 x i16> %a, <8 x i16> %b)363 %max = call <8 x i16> @llvm.smax.v8i16(<8 x i16> %a, <8 x i16> %b)364 %sub = sub <8 x i16> %max, %min365 ret <8 x i16> %sub366}367 368define <4 x i32> @abd_minmax_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {369; SSE2-LABEL: abd_minmax_v4i32:370; SSE2: # %bb.0:371; SSE2-NEXT: movdqa %xmm0, %xmm2372; SSE2-NEXT: pcmpgtd %xmm1, %xmm2373; SSE2-NEXT: psubd %xmm1, %xmm0374; SSE2-NEXT: pxor %xmm2, %xmm0375; SSE2-NEXT: psubd %xmm0, %xmm2376; SSE2-NEXT: movdqa %xmm2, %xmm0377; SSE2-NEXT: retq378;379; SSE42-LABEL: abd_minmax_v4i32:380; SSE42: # %bb.0:381; SSE42-NEXT: movdqa %xmm0, %xmm2382; SSE42-NEXT: pminsd %xmm1, %xmm2383; SSE42-NEXT: pmaxsd %xmm1, %xmm0384; SSE42-NEXT: psubd %xmm2, %xmm0385; SSE42-NEXT: retq386;387; AVX-LABEL: abd_minmax_v4i32:388; AVX: # %bb.0:389; AVX-NEXT: vpminsd %xmm1, %xmm0, %xmm2390; AVX-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0391; AVX-NEXT: vpsubd %xmm2, %xmm0, %xmm0392; AVX-NEXT: retq393 %min = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %a, <4 x i32> %b)394 %max = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %a, <4 x i32> %b)395 %sub = sub <4 x i32> %max, %min396 ret <4 x i32> %sub397}398 399define <2 x i64> @abd_minmax_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {400; SSE2-LABEL: abd_minmax_v2i64:401; SSE2: # %bb.0:402; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648]403; SSE2-NEXT: movdqa %xmm1, %xmm3404; SSE2-NEXT: pxor %xmm2, %xmm3405; SSE2-NEXT: pxor %xmm0, %xmm2406; SSE2-NEXT: movdqa %xmm2, %xmm4407; SSE2-NEXT: pcmpgtd %xmm3, %xmm4408; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]409; SSE2-NEXT: pcmpeqd %xmm3, %xmm2410; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]411; SSE2-NEXT: pand %xmm5, %xmm3412; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]413; SSE2-NEXT: por %xmm3, %xmm2414; SSE2-NEXT: psubq %xmm1, %xmm0415; SSE2-NEXT: pxor %xmm2, %xmm0416; SSE2-NEXT: psubq %xmm0, %xmm2417; SSE2-NEXT: movdqa %xmm2, %xmm0418; SSE2-NEXT: retq419;420; SSE42-LABEL: abd_minmax_v2i64:421; SSE42: # %bb.0:422; SSE42-NEXT: movdqa %xmm0, %xmm2423; SSE42-NEXT: pcmpgtq %xmm1, %xmm2424; SSE42-NEXT: psubq %xmm1, %xmm0425; SSE42-NEXT: pxor %xmm2, %xmm0426; SSE42-NEXT: psubq %xmm0, %xmm2427; SSE42-NEXT: movdqa %xmm2, %xmm0428; SSE42-NEXT: retq429;430; AVX1-LABEL: abd_minmax_v2i64:431; AVX1: # %bb.0:432; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2433; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0434; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm0435; AVX1-NEXT: vpsubq %xmm0, %xmm2, %xmm0436; AVX1-NEXT: retq437;438; AVX2-LABEL: abd_minmax_v2i64:439; AVX2: # %bb.0:440; AVX2-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2441; AVX2-NEXT: vpsubq %xmm1, %xmm0, %xmm0442; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0443; AVX2-NEXT: vpsubq %xmm0, %xmm2, %xmm0444; AVX2-NEXT: retq445;446; AVX512-LABEL: abd_minmax_v2i64:447; AVX512: # %bb.0:448; AVX512-NEXT: vpminsq %xmm1, %xmm0, %xmm2449; AVX512-NEXT: vpmaxsq %xmm1, %xmm0, %xmm0450; AVX512-NEXT: vpsubq %xmm2, %xmm0, %xmm0451; AVX512-NEXT: retq452 %min = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %a, <2 x i64> %b)453 %max = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %a, <2 x i64> %b)454 %sub = sub <2 x i64> %max, %min455 ret <2 x i64> %sub456}457 458;459; select(icmp(a,b),sub(a,b),sub(b,a)) -> abds(a,b)460;461 462define <16 x i8> @abd_cmp_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {463; SSE2-LABEL: abd_cmp_v16i8:464; SSE2: # %bb.0:465; SSE2-NEXT: movdqa %xmm0, %xmm2466; SSE2-NEXT: pcmpgtb %xmm1, %xmm2467; SSE2-NEXT: psubb %xmm1, %xmm0468; SSE2-NEXT: pxor %xmm2, %xmm0469; SSE2-NEXT: psubb %xmm0, %xmm2470; SSE2-NEXT: movdqa %xmm2, %xmm0471; SSE2-NEXT: retq472;473; SSE42-LABEL: abd_cmp_v16i8:474; SSE42: # %bb.0:475; SSE42-NEXT: movdqa %xmm0, %xmm2476; SSE42-NEXT: pminsb %xmm1, %xmm2477; SSE42-NEXT: pmaxsb %xmm1, %xmm0478; SSE42-NEXT: psubb %xmm2, %xmm0479; SSE42-NEXT: retq480;481; AVX-LABEL: abd_cmp_v16i8:482; AVX: # %bb.0:483; AVX-NEXT: vpminsb %xmm1, %xmm0, %xmm2484; AVX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0485; AVX-NEXT: vpsubb %xmm2, %xmm0, %xmm0486; AVX-NEXT: retq487 %cmp = icmp sgt <16 x i8> %a, %b488 %ab = sub <16 x i8> %a, %b489 %ba = sub <16 x i8> %b, %a490 %sel = select <16 x i1> %cmp, <16 x i8> %ab, <16 x i8> %ba491 ret <16 x i8> %sel492}493 494define <8 x i16> @abd_cmp_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {495; SSE-LABEL: abd_cmp_v8i16:496; SSE: # %bb.0:497; SSE-NEXT: movdqa %xmm0, %xmm2498; SSE-NEXT: pminsw %xmm1, %xmm2499; SSE-NEXT: pmaxsw %xmm1, %xmm0500; SSE-NEXT: psubw %xmm2, %xmm0501; SSE-NEXT: retq502;503; AVX-LABEL: abd_cmp_v8i16:504; AVX: # %bb.0:505; AVX-NEXT: vpminsw %xmm1, %xmm0, %xmm2506; AVX-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0507; AVX-NEXT: vpsubw %xmm2, %xmm0, %xmm0508; AVX-NEXT: retq509 %cmp = icmp sge <8 x i16> %a, %b510 %ab = sub <8 x i16> %a, %b511 %ba = sub <8 x i16> %b, %a512 %sel = select <8 x i1> %cmp, <8 x i16> %ab, <8 x i16> %ba513 ret <8 x i16> %sel514}515 516define <4 x i32> @abd_cmp_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {517; SSE2-LABEL: abd_cmp_v4i32:518; SSE2: # %bb.0:519; SSE2-NEXT: movdqa %xmm0, %xmm2520; SSE2-NEXT: pcmpgtd %xmm1, %xmm2521; SSE2-NEXT: psubd %xmm1, %xmm0522; SSE2-NEXT: pxor %xmm2, %xmm0523; SSE2-NEXT: psubd %xmm0, %xmm2524; SSE2-NEXT: movdqa %xmm2, %xmm0525; SSE2-NEXT: retq526;527; SSE42-LABEL: abd_cmp_v4i32:528; SSE42: # %bb.0:529; SSE42-NEXT: movdqa %xmm0, %xmm2530; SSE42-NEXT: pminsd %xmm1, %xmm2531; SSE42-NEXT: pmaxsd %xmm1, %xmm0532; SSE42-NEXT: psubd %xmm2, %xmm0533; SSE42-NEXT: retq534;535; AVX-LABEL: abd_cmp_v4i32:536; AVX: # %bb.0:537; AVX-NEXT: vpminsd %xmm1, %xmm0, %xmm2538; AVX-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0539; AVX-NEXT: vpsubd %xmm2, %xmm0, %xmm0540; AVX-NEXT: retq541 %cmp = icmp slt <4 x i32> %a, %b542 %ab = sub <4 x i32> %a, %b543 %ba = sub <4 x i32> %b, %a544 %sel = select <4 x i1> %cmp, <4 x i32> %ba, <4 x i32> %ab545 ret <4 x i32> %sel546}547 548define <2 x i64> @abd_cmp_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {549; SSE2-LABEL: abd_cmp_v2i64:550; SSE2: # %bb.0:551; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648]552; SSE2-NEXT: movdqa %xmm1, %xmm3553; SSE2-NEXT: pxor %xmm2, %xmm3554; SSE2-NEXT: pxor %xmm0, %xmm2555; SSE2-NEXT: movdqa %xmm2, %xmm4556; SSE2-NEXT: pcmpgtd %xmm3, %xmm4557; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]558; SSE2-NEXT: pcmpeqd %xmm3, %xmm2559; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]560; SSE2-NEXT: pand %xmm5, %xmm3561; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]562; SSE2-NEXT: por %xmm3, %xmm2563; SSE2-NEXT: psubq %xmm1, %xmm0564; SSE2-NEXT: pxor %xmm2, %xmm0565; SSE2-NEXT: psubq %xmm0, %xmm2566; SSE2-NEXT: movdqa %xmm2, %xmm0567; SSE2-NEXT: retq568;569; SSE42-LABEL: abd_cmp_v2i64:570; SSE42: # %bb.0:571; SSE42-NEXT: movdqa %xmm0, %xmm2572; SSE42-NEXT: pcmpgtq %xmm1, %xmm2573; SSE42-NEXT: psubq %xmm1, %xmm0574; SSE42-NEXT: pxor %xmm2, %xmm0575; SSE42-NEXT: psubq %xmm0, %xmm2576; SSE42-NEXT: movdqa %xmm2, %xmm0577; SSE42-NEXT: retq578;579; AVX1-LABEL: abd_cmp_v2i64:580; AVX1: # %bb.0:581; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2582; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0583; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm0584; AVX1-NEXT: vpsubq %xmm0, %xmm2, %xmm0585; AVX1-NEXT: retq586;587; AVX2-LABEL: abd_cmp_v2i64:588; AVX2: # %bb.0:589; AVX2-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2590; AVX2-NEXT: vpsubq %xmm1, %xmm0, %xmm0591; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0592; AVX2-NEXT: vpsubq %xmm0, %xmm2, %xmm0593; AVX2-NEXT: retq594;595; AVX512-LABEL: abd_cmp_v2i64:596; AVX512: # %bb.0:597; AVX512-NEXT: vpminsq %xmm1, %xmm0, %xmm2598; AVX512-NEXT: vpmaxsq %xmm1, %xmm0, %xmm0599; AVX512-NEXT: vpsubq %xmm2, %xmm0, %xmm0600; AVX512-NEXT: retq601 %cmp = icmp sge <2 x i64> %a, %b602 %ab = sub <2 x i64> %a, %b603 %ba = sub <2 x i64> %b, %a604 %sel = select <2 x i1> %cmp, <2 x i64> %ab, <2 x i64> %ba605 ret <2 x i64> %sel606}607 608;609; abs(sub_nsw(x, y)) -> abds(a,b)610;611 612define <16 x i8> @abd_subnsw_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {613; SSE2-LABEL: abd_subnsw_v16i8:614; SSE2: # %bb.0:615; SSE2-NEXT: psubb %xmm1, %xmm0616; SSE2-NEXT: pxor %xmm1, %xmm1617; SSE2-NEXT: psubb %xmm0, %xmm1618; SSE2-NEXT: pminub %xmm1, %xmm0619; SSE2-NEXT: retq620;621; SSE42-LABEL: abd_subnsw_v16i8:622; SSE42: # %bb.0:623; SSE42-NEXT: psubb %xmm1, %xmm0624; SSE42-NEXT: pabsb %xmm0, %xmm0625; SSE42-NEXT: retq626;627; AVX-LABEL: abd_subnsw_v16i8:628; AVX: # %bb.0:629; AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0630; AVX-NEXT: vpabsb %xmm0, %xmm0631; AVX-NEXT: retq632 %sub = sub nsw <16 x i8> %a, %b633 %abs = call <16 x i8> @llvm.abs.v16i8(<16 x i8> %sub, i1 false)634 ret <16 x i8> %abs635}636 637define <8 x i16> @abd_subnsw_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {638; SSE2-LABEL: abd_subnsw_v8i16:639; SSE2: # %bb.0:640; SSE2-NEXT: psubw %xmm1, %xmm0641; SSE2-NEXT: pxor %xmm1, %xmm1642; SSE2-NEXT: psubw %xmm0, %xmm1643; SSE2-NEXT: pmaxsw %xmm1, %xmm0644; SSE2-NEXT: retq645;646; SSE42-LABEL: abd_subnsw_v8i16:647; SSE42: # %bb.0:648; SSE42-NEXT: psubw %xmm1, %xmm0649; SSE42-NEXT: pabsw %xmm0, %xmm0650; SSE42-NEXT: retq651;652; AVX-LABEL: abd_subnsw_v8i16:653; AVX: # %bb.0:654; AVX-NEXT: vpsubw %xmm1, %xmm0, %xmm0655; AVX-NEXT: vpabsw %xmm0, %xmm0656; AVX-NEXT: retq657 %sub = sub nsw <8 x i16> %a, %b658 %abs = call <8 x i16> @llvm.abs.v8i16(<8 x i16> %sub, i1 false)659 ret <8 x i16> %abs660}661 662define <4 x i32> @abd_subnsw_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {663; SSE2-LABEL: abd_subnsw_v4i32:664; SSE2: # %bb.0:665; SSE2-NEXT: psubd %xmm1, %xmm0666; SSE2-NEXT: movdqa %xmm0, %xmm1667; SSE2-NEXT: psrad $31, %xmm1668; SSE2-NEXT: pxor %xmm1, %xmm0669; SSE2-NEXT: psubd %xmm1, %xmm0670; SSE2-NEXT: retq671;672; SSE42-LABEL: abd_subnsw_v4i32:673; SSE42: # %bb.0:674; SSE42-NEXT: psubd %xmm1, %xmm0675; SSE42-NEXT: pabsd %xmm0, %xmm0676; SSE42-NEXT: retq677;678; AVX-LABEL: abd_subnsw_v4i32:679; AVX: # %bb.0:680; AVX-NEXT: vpsubd %xmm1, %xmm0, %xmm0681; AVX-NEXT: vpabsd %xmm0, %xmm0682; AVX-NEXT: retq683 %sub = sub nsw <4 x i32> %a, %b684 %abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %sub, i1 false)685 ret <4 x i32> %abs686}687 688define <2 x i64> @abd_subnsw_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {689; SSE2-LABEL: abd_subnsw_v2i64:690; SSE2: # %bb.0:691; SSE2-NEXT: psubq %xmm1, %xmm0692; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]693; SSE2-NEXT: psrad $31, %xmm1694; SSE2-NEXT: pxor %xmm1, %xmm0695; SSE2-NEXT: psubq %xmm1, %xmm0696; SSE2-NEXT: retq697;698; SSE42-LABEL: abd_subnsw_v2i64:699; SSE42: # %bb.0:700; SSE42-NEXT: psubq %xmm1, %xmm0701; SSE42-NEXT: pxor %xmm1, %xmm1702; SSE42-NEXT: psubq %xmm0, %xmm1703; SSE42-NEXT: blendvpd %xmm0, %xmm1, %xmm0704; SSE42-NEXT: retq705;706; AVX1-LABEL: abd_subnsw_v2i64:707; AVX1: # %bb.0:708; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0709; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1710; AVX1-NEXT: vpsubq %xmm0, %xmm1, %xmm1711; AVX1-NEXT: vblendvpd %xmm0, %xmm1, %xmm0, %xmm0712; AVX1-NEXT: retq713;714; AVX2-LABEL: abd_subnsw_v2i64:715; AVX2: # %bb.0:716; AVX2-NEXT: vpsubq %xmm1, %xmm0, %xmm0717; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1718; AVX2-NEXT: vpsubq %xmm0, %xmm1, %xmm1719; AVX2-NEXT: vblendvpd %xmm0, %xmm1, %xmm0, %xmm0720; AVX2-NEXT: retq721;722; AVX512-LABEL: abd_subnsw_v2i64:723; AVX512: # %bb.0:724; AVX512-NEXT: vpsubq %xmm1, %xmm0, %xmm0725; AVX512-NEXT: vpabsq %xmm0, %xmm0726; AVX512-NEXT: retq727 %sub = sub nsw <2 x i64> %a, %b728 %abs = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %sub, i1 false)729 ret <2 x i64> %abs730}731 732;733; Special cases734;735 736define <2 x i64> @abd_cmp_v2i64_multiuse_cmp(<2 x i64> %a, <2 x i64> %b) nounwind {737; SSE2-LABEL: abd_cmp_v2i64_multiuse_cmp:738; SSE2: # %bb.0:739; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648]740; SSE2-NEXT: movdqa %xmm1, %xmm3741; SSE2-NEXT: pxor %xmm2, %xmm3742; SSE2-NEXT: pxor %xmm0, %xmm2743; SSE2-NEXT: movdqa %xmm2, %xmm4744; SSE2-NEXT: pcmpgtd %xmm3, %xmm4745; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]746; SSE2-NEXT: movdqa %xmm2, %xmm6747; SSE2-NEXT: pcmpeqd %xmm3, %xmm6748; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]749; SSE2-NEXT: pand %xmm6, %xmm5750; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]751; SSE2-NEXT: por %xmm5, %xmm4752; SSE2-NEXT: psubq %xmm1, %xmm0753; SSE2-NEXT: pxor %xmm4, %xmm0754; SSE2-NEXT: psubq %xmm0, %xmm4755; SSE2-NEXT: pcmpgtd %xmm2, %xmm3756; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,0,2,2]757; SSE2-NEXT: pand %xmm6, %xmm0758; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[1,1,3,3]759; SSE2-NEXT: por %xmm0, %xmm1760; SSE2-NEXT: pcmpeqd %xmm0, %xmm0761; SSE2-NEXT: pxor %xmm1, %xmm0762; SSE2-NEXT: paddq %xmm4, %xmm0763; SSE2-NEXT: retq764;765; SSE42-LABEL: abd_cmp_v2i64_multiuse_cmp:766; SSE42: # %bb.0:767; SSE42-NEXT: movdqa %xmm0, %xmm2768; SSE42-NEXT: pcmpgtq %xmm1, %xmm2769; SSE42-NEXT: movdqa %xmm0, %xmm3770; SSE42-NEXT: psubq %xmm1, %xmm3771; SSE42-NEXT: pxor %xmm2, %xmm3772; SSE42-NEXT: psubq %xmm3, %xmm2773; SSE42-NEXT: pcmpgtq %xmm0, %xmm1774; SSE42-NEXT: pcmpeqd %xmm0, %xmm0775; SSE42-NEXT: pxor %xmm1, %xmm0776; SSE42-NEXT: paddq %xmm2, %xmm0777; SSE42-NEXT: retq778;779; AVX1-LABEL: abd_cmp_v2i64_multiuse_cmp:780; AVX1: # %bb.0:781; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2782; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm3783; AVX1-NEXT: vpxor %xmm2, %xmm3, %xmm3784; AVX1-NEXT: vpsubq %xmm3, %xmm2, %xmm2785; AVX1-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0786; AVX1-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1787; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0788; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm0789; AVX1-NEXT: retq790;791; AVX2-LABEL: abd_cmp_v2i64_multiuse_cmp:792; AVX2: # %bb.0:793; AVX2-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2794; AVX2-NEXT: vpsubq %xmm1, %xmm0, %xmm3795; AVX2-NEXT: vpxor %xmm2, %xmm3, %xmm3796; AVX2-NEXT: vpsubq %xmm3, %xmm2, %xmm2797; AVX2-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0798; AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1799; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0800; AVX2-NEXT: vpaddq %xmm2, %xmm0, %xmm0801; AVX2-NEXT: retq802;803; AVX512-LABEL: abd_cmp_v2i64_multiuse_cmp:804; AVX512: # %bb.0:805; AVX512-NEXT: vpminsq %xmm1, %xmm0, %xmm2806; AVX512-NEXT: vpmaxsq %xmm1, %xmm0, %xmm3807; AVX512-NEXT: vpsubq %xmm2, %xmm3, %xmm2808; AVX512-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0809; AVX512-NEXT: vpternlogq {{.*#+}} xmm0 = ~xmm0810; AVX512-NEXT: vpaddq %xmm2, %xmm0, %xmm0811; AVX512-NEXT: retq812 %cmp = icmp sge <2 x i64> %a, %b813 %ab = sub <2 x i64> %a, %b814 %ba = sub <2 x i64> %b, %a815 %sel = select <2 x i1> %cmp, <2 x i64> %ab, <2 x i64> %ba816 %ext = sext <2 x i1> %cmp to <2 x i64>817 %res = add <2 x i64> %ext, %sel818 ret <2 x i64> %res819}820 821define <8 x i16> @abd_cmp_v8i16_multiuse_sub(<8 x i16> %a, <8 x i16> %b) nounwind {822; SSE-LABEL: abd_cmp_v8i16_multiuse_sub:823; SSE: # %bb.0:824; SSE-NEXT: movdqa %xmm0, %xmm2825; SSE-NEXT: psubw %xmm1, %xmm2826; SSE-NEXT: movdqa %xmm0, %xmm3827; SSE-NEXT: pminsw %xmm1, %xmm3828; SSE-NEXT: pmaxsw %xmm1, %xmm0829; SSE-NEXT: psubw %xmm3, %xmm0830; SSE-NEXT: paddw %xmm2, %xmm0831; SSE-NEXT: retq832;833; AVX-LABEL: abd_cmp_v8i16_multiuse_sub:834; AVX: # %bb.0:835; AVX-NEXT: vpsubw %xmm1, %xmm0, %xmm2836; AVX-NEXT: vpminsw %xmm1, %xmm0, %xmm3837; AVX-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0838; AVX-NEXT: vpsubw %xmm3, %xmm0, %xmm0839; AVX-NEXT: vpaddw %xmm0, %xmm2, %xmm0840; AVX-NEXT: retq841 %cmp = icmp sgt <8 x i16> %a, %b842 %ab = sub <8 x i16> %a, %b843 %ba = sub <8 x i16> %b, %a844 %sel = select <8 x i1> %cmp, <8 x i16> %ab, <8 x i16> %ba845 %res = add <8 x i16> %ab, %sel846 ret <8 x i16> %res847}848 849declare <16 x i8> @llvm.abs.v16i8(<16 x i8>, i1)850declare <8 x i16> @llvm.abs.v8i16(<8 x i16>, i1)851declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)852declare <2 x i64> @llvm.abs.v2i64(<2 x i64>, i1)853declare <4 x i64> @llvm.abs.v4i64(<4 x i64>, i1)854declare <8 x i64> @llvm.abs.v8i64(<8 x i64>, i1)855declare <16 x i64> @llvm.abs.v16i64(<16 x i64>, i1)856declare <2 x i128> @llvm.abs.v2i128(<2 x i128>, i1)857 858declare <16 x i8> @llvm.smax.v16i8(<16 x i8>, <16 x i8>)859declare <8 x i16> @llvm.smax.v8i16(<8 x i16>, <8 x i16>)860declare <4 x i32> @llvm.smax.v4i32(<4 x i32>, <4 x i32>)861declare <2 x i64> @llvm.smax.v2i64(<2 x i64>, <2 x i64>)862 863declare <16 x i8> @llvm.smin.v16i8(<16 x i8>, <16 x i8>)864declare <8 x i16> @llvm.smin.v8i16(<8 x i16>, <8 x i16>)865declare <4 x i32> @llvm.smin.v4i32(<4 x i32>, <4 x i32>)866declare <2 x i64> @llvm.smin.v2i64(<2 x i64>, <2 x i64>)867