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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX13; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX24; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX5125 6;7; trunc(abs(sub(zext(a),zext(b)))) -> abdu(a,b)8;9 10define <32 x i8> @abd_ext_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {11; AVX1-LABEL: abd_ext_v32i8:12; AVX1: # %bb.0:13; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm214; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm315; AVX1-NEXT: vpminub %xmm2, %xmm3, %xmm416; AVX1-NEXT: vpmaxub %xmm2, %xmm3, %xmm217; AVX1-NEXT: vpsubb %xmm4, %xmm2, %xmm218; AVX1-NEXT: vpminub %xmm1, %xmm0, %xmm319; AVX1-NEXT: vpmaxub %xmm1, %xmm0, %xmm020; AVX1-NEXT: vpsubb %xmm3, %xmm0, %xmm021; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm022; AVX1-NEXT: retq23;24; AVX2-LABEL: abd_ext_v32i8:25; AVX2: # %bb.0:26; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm227; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm028; AVX2-NEXT: vpsubb %ymm2, %ymm0, %ymm029; AVX2-NEXT: retq30;31; AVX512-LABEL: abd_ext_v32i8:32; AVX512: # %bb.0:33; AVX512-NEXT: vpminub %ymm1, %ymm0, %ymm234; AVX512-NEXT: vpmaxub %ymm1, %ymm0, %ymm035; AVX512-NEXT: vpsubb %ymm2, %ymm0, %ymm036; AVX512-NEXT: retq37 %aext = zext <32 x i8> %a to <32 x i64>38 %bext = zext <32 x i8> %b to <32 x i64>39 %sub = sub <32 x i64> %aext, %bext40 %abs = call <32 x i64> @llvm.abs.v32i64(<32 x i64> %sub, i1 false)41 %trunc = trunc <32 x i64> %abs to <32 x i8>42 ret <32 x i8> %trunc43}44 45define <32 x i8> @abd_ext_v32i8_undef(<32 x i8> %a, <32 x i8> %b) nounwind {46; AVX1-LABEL: abd_ext_v32i8_undef:47; AVX1: # %bb.0:48; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm249; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm350; AVX1-NEXT: vpminub %xmm2, %xmm3, %xmm451; AVX1-NEXT: vpmaxub %xmm2, %xmm3, %xmm252; AVX1-NEXT: vpsubb %xmm4, %xmm2, %xmm253; AVX1-NEXT: vpminub %xmm1, %xmm0, %xmm354; AVX1-NEXT: vpmaxub %xmm1, %xmm0, %xmm055; AVX1-NEXT: vpsubb %xmm3, %xmm0, %xmm056; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm057; AVX1-NEXT: retq58;59; AVX2-LABEL: abd_ext_v32i8_undef:60; AVX2: # %bb.0:61; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm262; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm063; AVX2-NEXT: vpsubb %ymm2, %ymm0, %ymm064; AVX2-NEXT: retq65;66; AVX512-LABEL: abd_ext_v32i8_undef:67; AVX512: # %bb.0:68; AVX512-NEXT: vpminub %ymm1, %ymm0, %ymm269; AVX512-NEXT: vpmaxub %ymm1, %ymm0, %ymm070; AVX512-NEXT: vpsubb %ymm2, %ymm0, %ymm071; AVX512-NEXT: retq72 %aext = zext <32 x i8> %a to <32 x i64>73 %bext = zext <32 x i8> %b to <32 x i64>74 %sub = sub <32 x i64> %aext, %bext75 %abs = call <32 x i64> @llvm.abs.v32i64(<32 x i64> %sub, i1 true)76 %trunc = trunc <32 x i64> %abs to <32 x i8>77 ret <32 x i8> %trunc78}79 80define <16 x i16> @abd_ext_v16i16(<16 x i16> %a, <16 x i16> %b) nounwind {81; AVX1-LABEL: abd_ext_v16i16:82; AVX1: # %bb.0:83; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm284; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm385; AVX1-NEXT: vpminuw %xmm2, %xmm3, %xmm486; AVX1-NEXT: vpmaxuw %xmm2, %xmm3, %xmm287; AVX1-NEXT: vpsubw %xmm4, %xmm2, %xmm288; AVX1-NEXT: vpminuw %xmm1, %xmm0, %xmm389; AVX1-NEXT: vpmaxuw %xmm1, %xmm0, %xmm090; AVX1-NEXT: vpsubw %xmm3, %xmm0, %xmm091; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm092; AVX1-NEXT: retq93;94; AVX2-LABEL: abd_ext_v16i16:95; AVX2: # %bb.0:96; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm297; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm098; AVX2-NEXT: vpsubw %ymm2, %ymm0, %ymm099; AVX2-NEXT: retq100;101; AVX512-LABEL: abd_ext_v16i16:102; AVX512: # %bb.0:103; AVX512-NEXT: vpminuw %ymm1, %ymm0, %ymm2104; AVX512-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0105; AVX512-NEXT: vpsubw %ymm2, %ymm0, %ymm0106; AVX512-NEXT: retq107 %aext = zext <16 x i16> %a to <16 x i64>108 %bext = zext <16 x i16> %b to <16 x i64>109 %sub = sub <16 x i64> %aext, %bext110 %abs = call <16 x i64> @llvm.abs.v16i64(<16 x i64> %sub, i1 false)111 %trunc = trunc <16 x i64> %abs to <16 x i16>112 ret <16 x i16> %trunc113}114 115define <16 x i16> @abd_ext_v16i16_undef(<16 x i16> %a, <16 x i16> %b) nounwind {116; AVX1-LABEL: abd_ext_v16i16_undef:117; AVX1: # %bb.0:118; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2119; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3120; AVX1-NEXT: vpminuw %xmm2, %xmm3, %xmm4121; AVX1-NEXT: vpmaxuw %xmm2, %xmm3, %xmm2122; AVX1-NEXT: vpsubw %xmm4, %xmm2, %xmm2123; AVX1-NEXT: vpminuw %xmm1, %xmm0, %xmm3124; AVX1-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0125; AVX1-NEXT: vpsubw %xmm3, %xmm0, %xmm0126; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0127; AVX1-NEXT: retq128;129; AVX2-LABEL: abd_ext_v16i16_undef:130; AVX2: # %bb.0:131; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm2132; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0133; AVX2-NEXT: vpsubw %ymm2, %ymm0, %ymm0134; AVX2-NEXT: retq135;136; AVX512-LABEL: abd_ext_v16i16_undef:137; AVX512: # %bb.0:138; AVX512-NEXT: vpminuw %ymm1, %ymm0, %ymm2139; AVX512-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0140; AVX512-NEXT: vpsubw %ymm2, %ymm0, %ymm0141; AVX512-NEXT: retq142 %aext = zext <16 x i16> %a to <16 x i64>143 %bext = zext <16 x i16> %b to <16 x i64>144 %sub = sub <16 x i64> %aext, %bext145 %abs = call <16 x i64> @llvm.abs.v16i64(<16 x i64> %sub, i1 true)146 %trunc = trunc <16 x i64> %abs to <16 x i16>147 ret <16 x i16> %trunc148}149 150define <8 x i32> @abd_ext_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind {151; AVX1-LABEL: abd_ext_v8i32:152; AVX1: # %bb.0:153; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2154; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3155; AVX1-NEXT: vpminud %xmm2, %xmm3, %xmm4156; AVX1-NEXT: vpmaxud %xmm2, %xmm3, %xmm2157; AVX1-NEXT: vpsubd %xmm4, %xmm2, %xmm2158; AVX1-NEXT: vpminud %xmm1, %xmm0, %xmm3159; AVX1-NEXT: vpmaxud %xmm1, %xmm0, %xmm0160; AVX1-NEXT: vpsubd %xmm3, %xmm0, %xmm0161; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0162; AVX1-NEXT: retq163;164; AVX2-LABEL: abd_ext_v8i32:165; AVX2: # %bb.0:166; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm2167; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0168; AVX2-NEXT: vpsubd %ymm2, %ymm0, %ymm0169; AVX2-NEXT: retq170;171; AVX512-LABEL: abd_ext_v8i32:172; AVX512: # %bb.0:173; AVX512-NEXT: vpminud %ymm1, %ymm0, %ymm2174; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0175; AVX512-NEXT: vpsubd %ymm2, %ymm0, %ymm0176; AVX512-NEXT: retq177 %aext = zext <8 x i32> %a to <8 x i64>178 %bext = zext <8 x i32> %b to <8 x i64>179 %sub = sub <8 x i64> %aext, %bext180 %abs = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %sub, i1 false)181 %trunc = trunc <8 x i64> %abs to <8 x i32>182 ret <8 x i32> %trunc183}184 185define <8 x i32> @abd_ext_v8i32_undef(<8 x i32> %a, <8 x i32> %b) nounwind {186; AVX1-LABEL: abd_ext_v8i32_undef:187; AVX1: # %bb.0:188; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2189; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3190; AVX1-NEXT: vpminud %xmm2, %xmm3, %xmm4191; AVX1-NEXT: vpmaxud %xmm2, %xmm3, %xmm2192; AVX1-NEXT: vpsubd %xmm4, %xmm2, %xmm2193; AVX1-NEXT: vpminud %xmm1, %xmm0, %xmm3194; AVX1-NEXT: vpmaxud %xmm1, %xmm0, %xmm0195; AVX1-NEXT: vpsubd %xmm3, %xmm0, %xmm0196; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0197; AVX1-NEXT: retq198;199; AVX2-LABEL: abd_ext_v8i32_undef:200; AVX2: # %bb.0:201; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm2202; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0203; AVX2-NEXT: vpsubd %ymm2, %ymm0, %ymm0204; AVX2-NEXT: retq205;206; AVX512-LABEL: abd_ext_v8i32_undef:207; AVX512: # %bb.0:208; AVX512-NEXT: vpminud %ymm1, %ymm0, %ymm2209; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0210; AVX512-NEXT: vpsubd %ymm2, %ymm0, %ymm0211; AVX512-NEXT: retq212 %aext = zext <8 x i32> %a to <8 x i64>213 %bext = zext <8 x i32> %b to <8 x i64>214 %sub = sub <8 x i64> %aext, %bext215 %abs = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %sub, i1 true)216 %trunc = trunc <8 x i64> %abs to <8 x i32>217 ret <8 x i32> %trunc218}219 220define <4 x i64> @abd_ext_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind {221; AVX1-LABEL: abd_ext_v4i64:222; AVX1: # %bb.0:223; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2224; AVX1-NEXT: vmovddup {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]225; AVX1-NEXT: # xmm3 = mem[0,0]226; AVX1-NEXT: vpxor %xmm3, %xmm2, %xmm4227; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5228; AVX1-NEXT: vpxor %xmm3, %xmm5, %xmm6229; AVX1-NEXT: vpcmpgtq %xmm4, %xmm6, %xmm4230; AVX1-NEXT: vpsubq %xmm2, %xmm5, %xmm2231; AVX1-NEXT: vpxor %xmm4, %xmm2, %xmm2232; AVX1-NEXT: vpsubq %xmm2, %xmm4, %xmm2233; AVX1-NEXT: vpxor %xmm3, %xmm1, %xmm4234; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm3235; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm3236; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0237; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm0238; AVX1-NEXT: vpsubq %xmm0, %xmm3, %xmm0239; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0240; AVX1-NEXT: retq241;242; AVX2-LABEL: abd_ext_v4i64:243; AVX2: # %bb.0:244; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]245; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm3246; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm2247; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2248; AVX2-NEXT: vpsubq %ymm1, %ymm0, %ymm0249; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0250; AVX2-NEXT: vpsubq %ymm0, %ymm2, %ymm0251; AVX2-NEXT: retq252;253; AVX512-LABEL: abd_ext_v4i64:254; AVX512: # %bb.0:255; AVX512-NEXT: vpminuq %ymm1, %ymm0, %ymm2256; AVX512-NEXT: vpmaxuq %ymm1, %ymm0, %ymm0257; AVX512-NEXT: vpsubq %ymm2, %ymm0, %ymm0258; AVX512-NEXT: retq259 %aext = zext <4 x i64> %a to <4 x i128>260 %bext = zext <4 x i64> %b to <4 x i128>261 %sub = sub <4 x i128> %aext, %bext262 %abs = call <4 x i128> @llvm.abs.v4i128(<4 x i128> %sub, i1 false)263 %trunc = trunc <4 x i128> %abs to <4 x i64>264 ret <4 x i64> %trunc265}266 267define <4 x i64> @abd_ext_v4i64_undef(<4 x i64> %a, <4 x i64> %b) nounwind {268; AVX1-LABEL: abd_ext_v4i64_undef:269; AVX1: # %bb.0:270; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2271; AVX1-NEXT: vmovddup {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]272; AVX1-NEXT: # xmm3 = mem[0,0]273; AVX1-NEXT: vpxor %xmm3, %xmm2, %xmm4274; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5275; AVX1-NEXT: vpxor %xmm3, %xmm5, %xmm6276; AVX1-NEXT: vpcmpgtq %xmm4, %xmm6, %xmm4277; AVX1-NEXT: vpsubq %xmm2, %xmm5, %xmm2278; AVX1-NEXT: vpxor %xmm4, %xmm2, %xmm2279; AVX1-NEXT: vpsubq %xmm2, %xmm4, %xmm2280; AVX1-NEXT: vpxor %xmm3, %xmm1, %xmm4281; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm3282; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm3283; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0284; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm0285; AVX1-NEXT: vpsubq %xmm0, %xmm3, %xmm0286; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0287; AVX1-NEXT: retq288;289; AVX2-LABEL: abd_ext_v4i64_undef:290; AVX2: # %bb.0:291; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]292; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm3293; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm2294; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2295; AVX2-NEXT: vpsubq %ymm1, %ymm0, %ymm0296; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0297; AVX2-NEXT: vpsubq %ymm0, %ymm2, %ymm0298; AVX2-NEXT: retq299;300; AVX512-LABEL: abd_ext_v4i64_undef:301; AVX512: # %bb.0:302; AVX512-NEXT: vpminuq %ymm1, %ymm0, %ymm2303; AVX512-NEXT: vpmaxuq %ymm1, %ymm0, %ymm0304; AVX512-NEXT: vpsubq %ymm2, %ymm0, %ymm0305; AVX512-NEXT: retq306 %aext = zext <4 x i64> %a to <4 x i128>307 %bext = zext <4 x i64> %b to <4 x i128>308 %sub = sub <4 x i128> %aext, %bext309 %abs = call <4 x i128> @llvm.abs.v4i128(<4 x i128> %sub, i1 true)310 %trunc = trunc <4 x i128> %abs to <4 x i64>311 ret <4 x i64> %trunc312}313 314;315; sub(umax(a,b),umin(a,b)) -> abdu(a,b)316;317 318define <32 x i8> @abd_minmax_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {319; AVX1-LABEL: abd_minmax_v32i8:320; AVX1: # %bb.0:321; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2322; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3323; AVX1-NEXT: vpminub %xmm2, %xmm3, %xmm4324; AVX1-NEXT: vpmaxub %xmm2, %xmm3, %xmm2325; AVX1-NEXT: vpsubb %xmm4, %xmm2, %xmm2326; AVX1-NEXT: vpminub %xmm1, %xmm0, %xmm3327; AVX1-NEXT: vpmaxub %xmm1, %xmm0, %xmm0328; AVX1-NEXT: vpsubb %xmm3, %xmm0, %xmm0329; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0330; AVX1-NEXT: retq331;332; AVX2-LABEL: abd_minmax_v32i8:333; AVX2: # %bb.0:334; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm2335; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0336; AVX2-NEXT: vpsubb %ymm2, %ymm0, %ymm0337; AVX2-NEXT: retq338;339; AVX512-LABEL: abd_minmax_v32i8:340; AVX512: # %bb.0:341; AVX512-NEXT: vpminub %ymm1, %ymm0, %ymm2342; AVX512-NEXT: vpmaxub %ymm1, %ymm0, %ymm0343; AVX512-NEXT: vpsubb %ymm2, %ymm0, %ymm0344; AVX512-NEXT: retq345 %min = call <32 x i8> @llvm.umin.v32i8(<32 x i8> %a, <32 x i8> %b)346 %max = call <32 x i8> @llvm.umax.v32i8(<32 x i8> %a, <32 x i8> %b)347 %sub = sub <32 x i8> %max, %min348 ret <32 x i8> %sub349}350 351define <16 x i16> @abd_minmax_v16i16(<16 x i16> %a, <16 x i16> %b) nounwind {352; AVX1-LABEL: abd_minmax_v16i16:353; AVX1: # %bb.0:354; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2355; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3356; AVX1-NEXT: vpminuw %xmm2, %xmm3, %xmm4357; AVX1-NEXT: vpmaxuw %xmm2, %xmm3, %xmm2358; AVX1-NEXT: vpsubw %xmm4, %xmm2, %xmm2359; AVX1-NEXT: vpminuw %xmm1, %xmm0, %xmm3360; AVX1-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0361; AVX1-NEXT: vpsubw %xmm3, %xmm0, %xmm0362; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0363; AVX1-NEXT: retq364;365; AVX2-LABEL: abd_minmax_v16i16:366; AVX2: # %bb.0:367; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm2368; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0369; AVX2-NEXT: vpsubw %ymm2, %ymm0, %ymm0370; AVX2-NEXT: retq371;372; AVX512-LABEL: abd_minmax_v16i16:373; AVX512: # %bb.0:374; AVX512-NEXT: vpminuw %ymm1, %ymm0, %ymm2375; AVX512-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0376; AVX512-NEXT: vpsubw %ymm2, %ymm0, %ymm0377; AVX512-NEXT: retq378 %min = call <16 x i16> @llvm.umin.v16i16(<16 x i16> %a, <16 x i16> %b)379 %max = call <16 x i16> @llvm.umax.v16i16(<16 x i16> %a, <16 x i16> %b)380 %sub = sub <16 x i16> %max, %min381 ret <16 x i16> %sub382}383 384define <8 x i32> @abd_minmax_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind {385; AVX1-LABEL: abd_minmax_v8i32:386; AVX1: # %bb.0:387; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2388; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3389; AVX1-NEXT: vpminud %xmm2, %xmm3, %xmm4390; AVX1-NEXT: vpmaxud %xmm2, %xmm3, %xmm2391; AVX1-NEXT: vpsubd %xmm4, %xmm2, %xmm2392; AVX1-NEXT: vpminud %xmm1, %xmm0, %xmm3393; AVX1-NEXT: vpmaxud %xmm1, %xmm0, %xmm0394; AVX1-NEXT: vpsubd %xmm3, %xmm0, %xmm0395; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0396; AVX1-NEXT: retq397;398; AVX2-LABEL: abd_minmax_v8i32:399; AVX2: # %bb.0:400; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm2401; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0402; AVX2-NEXT: vpsubd %ymm2, %ymm0, %ymm0403; AVX2-NEXT: retq404;405; AVX512-LABEL: abd_minmax_v8i32:406; AVX512: # %bb.0:407; AVX512-NEXT: vpminud %ymm1, %ymm0, %ymm2408; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0409; AVX512-NEXT: vpsubd %ymm2, %ymm0, %ymm0410; AVX512-NEXT: retq411 %min = call <8 x i32> @llvm.umin.v8i32(<8 x i32> %a, <8 x i32> %b)412 %max = call <8 x i32> @llvm.umax.v8i32(<8 x i32> %a, <8 x i32> %b)413 %sub = sub <8 x i32> %max, %min414 ret <8 x i32> %sub415}416 417define <4 x i64> @abd_minmax_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind {418; AVX1-LABEL: abd_minmax_v4i64:419; AVX1: # %bb.0:420; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2421; AVX1-NEXT: vmovddup {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]422; AVX1-NEXT: # xmm3 = mem[0,0]423; AVX1-NEXT: vpxor %xmm3, %xmm2, %xmm4424; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5425; AVX1-NEXT: vpxor %xmm3, %xmm5, %xmm6426; AVX1-NEXT: vpcmpgtq %xmm4, %xmm6, %xmm4427; AVX1-NEXT: vpsubq %xmm2, %xmm5, %xmm2428; AVX1-NEXT: vpxor %xmm4, %xmm2, %xmm2429; AVX1-NEXT: vpsubq %xmm2, %xmm4, %xmm2430; AVX1-NEXT: vpxor %xmm3, %xmm1, %xmm4431; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm3432; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm3433; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0434; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm0435; AVX1-NEXT: vpsubq %xmm0, %xmm3, %xmm0436; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0437; AVX1-NEXT: retq438;439; AVX2-LABEL: abd_minmax_v4i64:440; AVX2: # %bb.0:441; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]442; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm3443; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm2444; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2445; AVX2-NEXT: vpsubq %ymm1, %ymm0, %ymm0446; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0447; AVX2-NEXT: vpsubq %ymm0, %ymm2, %ymm0448; AVX2-NEXT: retq449;450; AVX512-LABEL: abd_minmax_v4i64:451; AVX512: # %bb.0:452; AVX512-NEXT: vpminuq %ymm1, %ymm0, %ymm2453; AVX512-NEXT: vpmaxuq %ymm1, %ymm0, %ymm0454; AVX512-NEXT: vpsubq %ymm2, %ymm0, %ymm0455; AVX512-NEXT: retq456 %min = call <4 x i64> @llvm.umin.v4i64(<4 x i64> %a, <4 x i64> %b)457 %max = call <4 x i64> @llvm.umax.v4i64(<4 x i64> %a, <4 x i64> %b)458 %sub = sub <4 x i64> %max, %min459 ret <4 x i64> %sub460}461 462;463; select(icmp(a,b),sub(a,b),sub(b,a)) -> abdu(a,b)464;465 466define <32 x i8> @abd_cmp_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {467; AVX1-LABEL: abd_cmp_v32i8:468; AVX1: # %bb.0:469; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2470; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3471; AVX1-NEXT: vpminub %xmm2, %xmm3, %xmm4472; AVX1-NEXT: vpmaxub %xmm2, %xmm3, %xmm2473; AVX1-NEXT: vpsubb %xmm4, %xmm2, %xmm2474; AVX1-NEXT: vpminub %xmm1, %xmm0, %xmm3475; AVX1-NEXT: vpmaxub %xmm1, %xmm0, %xmm0476; AVX1-NEXT: vpsubb %xmm3, %xmm0, %xmm0477; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0478; AVX1-NEXT: retq479;480; AVX2-LABEL: abd_cmp_v32i8:481; AVX2: # %bb.0:482; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm2483; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0484; AVX2-NEXT: vpsubb %ymm2, %ymm0, %ymm0485; AVX2-NEXT: retq486;487; AVX512-LABEL: abd_cmp_v32i8:488; AVX512: # %bb.0:489; AVX512-NEXT: vpminub %ymm1, %ymm0, %ymm2490; AVX512-NEXT: vpmaxub %ymm1, %ymm0, %ymm0491; AVX512-NEXT: vpsubb %ymm2, %ymm0, %ymm0492; AVX512-NEXT: retq493 %cmp = icmp ugt <32 x i8> %a, %b494 %ab = sub <32 x i8> %a, %b495 %ba = sub <32 x i8> %b, %a496 %sel = select <32 x i1> %cmp, <32 x i8> %ab, <32 x i8> %ba497 ret <32 x i8> %sel498}499 500define <16 x i16> @abd_cmp_v16i16(<16 x i16> %a, <16 x i16> %b) nounwind {501; AVX1-LABEL: abd_cmp_v16i16:502; AVX1: # %bb.0:503; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2504; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3505; AVX1-NEXT: vpminuw %xmm2, %xmm3, %xmm4506; AVX1-NEXT: vpmaxuw %xmm2, %xmm3, %xmm2507; AVX1-NEXT: vpsubw %xmm4, %xmm2, %xmm2508; AVX1-NEXT: vpminuw %xmm1, %xmm0, %xmm3509; AVX1-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0510; AVX1-NEXT: vpsubw %xmm3, %xmm0, %xmm0511; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0512; AVX1-NEXT: retq513;514; AVX2-LABEL: abd_cmp_v16i16:515; AVX2: # %bb.0:516; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm2517; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0518; AVX2-NEXT: vpsubw %ymm2, %ymm0, %ymm0519; AVX2-NEXT: retq520;521; AVX512-LABEL: abd_cmp_v16i16:522; AVX512: # %bb.0:523; AVX512-NEXT: vpminuw %ymm1, %ymm0, %ymm2524; AVX512-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0525; AVX512-NEXT: vpsubw %ymm2, %ymm0, %ymm0526; AVX512-NEXT: retq527 %cmp = icmp uge <16 x i16> %a, %b528 %ab = sub <16 x i16> %a, %b529 %ba = sub <16 x i16> %b, %a530 %sel = select <16 x i1> %cmp, <16 x i16> %ab, <16 x i16> %ba531 ret <16 x i16> %sel532}533 534define <8 x i32> @abd_cmp_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind {535; AVX1-LABEL: abd_cmp_v8i32:536; AVX1: # %bb.0:537; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2538; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3539; AVX1-NEXT: vpminud %xmm2, %xmm3, %xmm4540; AVX1-NEXT: vpmaxud %xmm2, %xmm3, %xmm2541; AVX1-NEXT: vpsubd %xmm4, %xmm2, %xmm2542; AVX1-NEXT: vpminud %xmm1, %xmm0, %xmm3543; AVX1-NEXT: vpmaxud %xmm1, %xmm0, %xmm0544; AVX1-NEXT: vpsubd %xmm3, %xmm0, %xmm0545; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0546; AVX1-NEXT: retq547;548; AVX2-LABEL: abd_cmp_v8i32:549; AVX2: # %bb.0:550; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm2551; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0552; AVX2-NEXT: vpsubd %ymm2, %ymm0, %ymm0553; AVX2-NEXT: retq554;555; AVX512-LABEL: abd_cmp_v8i32:556; AVX512: # %bb.0:557; AVX512-NEXT: vpminud %ymm1, %ymm0, %ymm2558; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0559; AVX512-NEXT: vpsubd %ymm2, %ymm0, %ymm0560; AVX512-NEXT: retq561 %cmp = icmp ult <8 x i32> %a, %b562 %ab = sub <8 x i32> %a, %b563 %ba = sub <8 x i32> %b, %a564 %sel = select <8 x i1> %cmp, <8 x i32> %ba, <8 x i32> %ab565 ret <8 x i32> %sel566}567 568define <4 x i64> @abd_cmp_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind {569; AVX1-LABEL: abd_cmp_v4i64:570; AVX1: # %bb.0:571; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2572; AVX1-NEXT: vmovddup {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]573; AVX1-NEXT: # xmm3 = mem[0,0]574; AVX1-NEXT: vpxor %xmm3, %xmm2, %xmm4575; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5576; AVX1-NEXT: vpxor %xmm3, %xmm5, %xmm6577; AVX1-NEXT: vpcmpgtq %xmm4, %xmm6, %xmm4578; AVX1-NEXT: vpsubq %xmm2, %xmm5, %xmm2579; AVX1-NEXT: vpxor %xmm4, %xmm2, %xmm2580; AVX1-NEXT: vpsubq %xmm2, %xmm4, %xmm2581; AVX1-NEXT: vpxor %xmm3, %xmm1, %xmm4582; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm3583; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm3584; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0585; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm0586; AVX1-NEXT: vpsubq %xmm0, %xmm3, %xmm0587; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0588; AVX1-NEXT: retq589;590; AVX2-LABEL: abd_cmp_v4i64:591; AVX2: # %bb.0:592; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]593; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm3594; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm2595; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2596; AVX2-NEXT: vpsubq %ymm1, %ymm0, %ymm0597; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0598; AVX2-NEXT: vpsubq %ymm0, %ymm2, %ymm0599; AVX2-NEXT: retq600;601; AVX512-LABEL: abd_cmp_v4i64:602; AVX512: # %bb.0:603; AVX512-NEXT: vpminuq %ymm1, %ymm0, %ymm2604; AVX512-NEXT: vpmaxuq %ymm1, %ymm0, %ymm0605; AVX512-NEXT: vpsubq %ymm2, %ymm0, %ymm0606; AVX512-NEXT: retq607 %cmp = icmp uge <4 x i64> %a, %b608 %ab = sub <4 x i64> %a, %b609 %ba = sub <4 x i64> %b, %a610 %sel = select <4 x i1> %cmp, <4 x i64> %ab, <4 x i64> %ba611 ret <4 x i64> %sel612}613 614declare <32 x i8> @llvm.abs.v32i8(<32 x i8>, i1)615declare <16 x i16> @llvm.abs.v16i16(<16 x i16>, i1)616declare <8 x i32> @llvm.abs.v8i32(<8 x i32>, i1)617declare <4 x i64> @llvm.abs.v4i64(<4 x i64>, i1)618declare <8 x i64> @llvm.abs.v8i64(<8 x i64>, i1)619declare <16 x i64> @llvm.abs.v16i64(<16 x i64>, i1)620declare <32 x i64> @llvm.abs.v32i64(<32 x i64>, i1)621declare <4 x i128> @llvm.abs.v4i128(<4 x i128>, i1)622 623declare <32 x i8> @llvm.umax.v32i8(<32 x i8>, <32 x i8>)624declare <16 x i16> @llvm.umax.v16i16(<16 x i16>, <16 x i16>)625declare <8 x i32> @llvm.umax.v8i32(<8 x i32>, <8 x i32>)626declare <4 x i64> @llvm.umax.v4i64(<4 x i64>, <4 x i64>)627 628declare <32 x i8> @llvm.umin.v32i8(<32 x i8>, <32 x i8>)629declare <16 x i16> @llvm.umin.v16i16(<16 x i16>, <16 x i16>)630declare <8 x i32> @llvm.umin.v8i32(<8 x i32>, <8 x i32>)631declare <4 x i64> @llvm.umin.v4i64(<4 x i64>, <4 x i64>)632