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1; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s2 3; CHECK-LABEL: add_shl_add_constant_1_i324; CHECK: leal 984(%rsi,%rdi,8), %eax5; CHECK-NEXT: retq6define i32 @add_shl_add_constant_1_i32(i32 %x, i32 %y) nounwind {7 %add.0 = add i32 %x, 1238 %shl = shl i32 %add.0, 39 %add.1 = add i32 %shl, %y10 ret i32 %add.111}12 13; CHECK-LABEL: add_shl_add_constant_2_i3214; CHECK: leal 984(%rsi,%rdi,8), %eax15; CHECK-NEXT: retq16define i32 @add_shl_add_constant_2_i32(i32 %x, i32 %y) nounwind {17 %add.0 = add i32 %x, 12318 %shl = shl i32 %add.0, 319 %add.1 = add i32 %y, %shl20 ret i32 %add.121}22 23; CHECK: LCPI2_0:24; CHECK: .long 98425; CHECK: _add_shl_add_constant_1_v4i3226; CHECK: pslld $3, %[[REG:xmm[0-9]+]]27; CHECK: paddd %xmm1, %[[REG]]28; CHECK: paddd LCPI2_0(%rip), %[[REG:xmm[0-9]+]]29; CHECK: retq30define <4 x i32> @add_shl_add_constant_1_v4i32(<4 x i32> %x, <4 x i32> %y) nounwind {31 %add.0 = add <4 x i32> %x, <i32 123, i32 123, i32 123, i32 123>32 %shl = shl <4 x i32> %add.0, <i32 3, i32 3, i32 3, i32 3>33 %add.1 = add <4 x i32> %shl, %y34 ret <4 x i32> %add.135}36 37; CHECK: LCPI3_0:38; CHECK: .long 98439; CHECK: _add_shl_add_constant_2_v4i3240; CHECK: pslld $3, %[[REG:xmm[0-9]+]]41; CHECK: paddd %xmm1, %[[REG]]42; CHECK: paddd LCPI3_0(%rip), %[[REG:xmm[0-9]+]]43; CHECK: retq44define <4 x i32> @add_shl_add_constant_2_v4i32(<4 x i32> %x, <4 x i32> %y) nounwind {45 %add.0 = add <4 x i32> %x, <i32 123, i32 123, i32 123, i32 123>46 %shl = shl <4 x i32> %add.0, <i32 3, i32 3, i32 3, i32 3>47 %add.1 = add <4 x i32> %y, %shl48 ret <4 x i32> %add.149}50