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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X644 5declare void @use(i32 %arg)6declare void @vec_use(<4 x i32> %arg)7 8; (x+c1)+c29 10define i32 @add_const_add_const(i32 %arg) {11; X86-LABEL: add_const_add_const:12; X86: # %bb.0:13; X86-NEXT: movl {{[0-9]+}}(%esp), %eax14; X86-NEXT: addl $10, %eax15; X86-NEXT: retl16;17; X64-LABEL: add_const_add_const:18; X64: # %bb.0:19; X64-NEXT: # kill: def $edi killed $edi def $rdi20; X64-NEXT: leal 10(%rdi), %eax21; X64-NEXT: retq22 %t0 = add i32 %arg, 823 %t1 = add i32 %t0, 224 ret i32 %t125}26 27define i32 @add_const_add_const_extrause(i32 %arg) {28; X86-LABEL: add_const_add_const_extrause:29; X86: # %bb.0:30; X86-NEXT: pushl %esi31; X86-NEXT: .cfi_def_cfa_offset 832; X86-NEXT: .cfi_offset %esi, -833; X86-NEXT: movl {{[0-9]+}}(%esp), %esi34; X86-NEXT: leal 8(%esi), %eax35; X86-NEXT: pushl %eax36; X86-NEXT: .cfi_adjust_cfa_offset 437; X86-NEXT: calll use@PLT38; X86-NEXT: addl $4, %esp39; X86-NEXT: .cfi_adjust_cfa_offset -440; X86-NEXT: addl $10, %esi41; X86-NEXT: movl %esi, %eax42; X86-NEXT: popl %esi43; X86-NEXT: .cfi_def_cfa_offset 444; X86-NEXT: retl45;46; X64-LABEL: add_const_add_const_extrause:47; X64: # %bb.0:48; X64-NEXT: pushq %rbx49; X64-NEXT: .cfi_def_cfa_offset 1650; X64-NEXT: .cfi_offset %rbx, -1651; X64-NEXT: movl %edi, %ebx52; X64-NEXT: leal 8(%rbx), %edi53; X64-NEXT: callq use@PLT54; X64-NEXT: addl $10, %ebx55; X64-NEXT: movl %ebx, %eax56; X64-NEXT: popq %rbx57; X64-NEXT: .cfi_def_cfa_offset 858; X64-NEXT: retq59 %t0 = add i32 %arg, 860 call void @use(i32 %t0)61 %t1 = add i32 %t0, 262 ret i32 %t163}64 65define <4 x i32> @vec_add_const_add_const(<4 x i32> %arg) {66; X86-LABEL: vec_add_const_add_const:67; X86: # %bb.0:68; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm069; X86-NEXT: retl70;71; X64-LABEL: vec_add_const_add_const:72; X64: # %bb.0:73; X64-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm074; X64-NEXT: retq75 %t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>76 %t1 = add <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>77 ret <4 x i32> %t178}79 80define <4 x i32> @vec_add_const_add_const_extrause(<4 x i32> %arg) {81; X86-LABEL: vec_add_const_add_const_extrause:82; X86: # %bb.0:83; X86-NEXT: subl $16, %esp84; X86-NEXT: .cfi_def_cfa_offset 2085; X86-NEXT: movdqa %xmm0, %xmm186; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill87; X86-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]88; X86-NEXT: paddd %xmm1, %xmm089; X86-NEXT: calll vec_use@PLT90; X86-NEXT: movdqu (%esp), %xmm0 # 16-byte Reload91; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm092; X86-NEXT: addl $16, %esp93; X86-NEXT: .cfi_def_cfa_offset 494; X86-NEXT: retl95;96; X64-LABEL: vec_add_const_add_const_extrause:97; X64: # %bb.0:98; X64-NEXT: subq $24, %rsp99; X64-NEXT: .cfi_def_cfa_offset 32100; X64-NEXT: movdqa %xmm0, %xmm1101; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill102; X64-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]103; X64-NEXT: paddd %xmm1, %xmm0104; X64-NEXT: callq vec_use@PLT105; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload106; X64-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0107; X64-NEXT: addq $24, %rsp108; X64-NEXT: .cfi_def_cfa_offset 8109; X64-NEXT: retq110 %t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>111 call void @vec_use(<4 x i32> %t0)112 %t1 = add <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>113 ret <4 x i32> %t1114}115 116define <4 x i32> @vec_add_const_add_const_nonsplat(<4 x i32> %arg) {117; X86-LABEL: vec_add_const_add_const_nonsplat:118; X86: # %bb.0:119; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0120; X86-NEXT: retl121;122; X64-LABEL: vec_add_const_add_const_nonsplat:123; X64: # %bb.0:124; X64-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0125; X64-NEXT: retq126 %t0 = add <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>127 %t1 = add <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>128 ret <4 x i32> %t1129}130 131; (x+c1)-c2132 133define i32 @add_const_sub_const(i32 %arg) {134; X86-LABEL: add_const_sub_const:135; X86: # %bb.0:136; X86-NEXT: movl {{[0-9]+}}(%esp), %eax137; X86-NEXT: addl $6, %eax138; X86-NEXT: retl139;140; X64-LABEL: add_const_sub_const:141; X64: # %bb.0:142; X64-NEXT: # kill: def $edi killed $edi def $rdi143; X64-NEXT: leal 6(%rdi), %eax144; X64-NEXT: retq145 %t0 = add i32 %arg, 8146 %t1 = sub i32 %t0, 2147 ret i32 %t1148}149 150define i32 @add_const_sub_const_extrause(i32 %arg) {151; X86-LABEL: add_const_sub_const_extrause:152; X86: # %bb.0:153; X86-NEXT: pushl %esi154; X86-NEXT: .cfi_def_cfa_offset 8155; X86-NEXT: .cfi_offset %esi, -8156; X86-NEXT: movl {{[0-9]+}}(%esp), %esi157; X86-NEXT: leal 8(%esi), %eax158; X86-NEXT: pushl %eax159; X86-NEXT: .cfi_adjust_cfa_offset 4160; X86-NEXT: calll use@PLT161; X86-NEXT: addl $4, %esp162; X86-NEXT: .cfi_adjust_cfa_offset -4163; X86-NEXT: addl $6, %esi164; X86-NEXT: movl %esi, %eax165; X86-NEXT: popl %esi166; X86-NEXT: .cfi_def_cfa_offset 4167; X86-NEXT: retl168;169; X64-LABEL: add_const_sub_const_extrause:170; X64: # %bb.0:171; X64-NEXT: pushq %rbx172; X64-NEXT: .cfi_def_cfa_offset 16173; X64-NEXT: .cfi_offset %rbx, -16174; X64-NEXT: movl %edi, %ebx175; X64-NEXT: leal 8(%rbx), %edi176; X64-NEXT: callq use@PLT177; X64-NEXT: addl $6, %ebx178; X64-NEXT: movl %ebx, %eax179; X64-NEXT: popq %rbx180; X64-NEXT: .cfi_def_cfa_offset 8181; X64-NEXT: retq182 %t0 = add i32 %arg, 8183 call void @use(i32 %t0)184 %t1 = sub i32 %t0, 2185 ret i32 %t1186}187 188define <4 x i32> @vec_add_const_sub_const(<4 x i32> %arg) {189; X86-LABEL: vec_add_const_sub_const:190; X86: # %bb.0:191; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0192; X86-NEXT: retl193;194; X64-LABEL: vec_add_const_sub_const:195; X64: # %bb.0:196; X64-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0197; X64-NEXT: retq198 %t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>199 %t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>200 ret <4 x i32> %t1201}202 203define <4 x i32> @vec_add_const_sub_const_extrause(<4 x i32> %arg) {204; X86-LABEL: vec_add_const_sub_const_extrause:205; X86: # %bb.0:206; X86-NEXT: subl $16, %esp207; X86-NEXT: .cfi_def_cfa_offset 20208; X86-NEXT: movdqa %xmm0, %xmm1209; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill210; X86-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]211; X86-NEXT: paddd %xmm1, %xmm0212; X86-NEXT: calll vec_use@PLT213; X86-NEXT: movdqu (%esp), %xmm0 # 16-byte Reload214; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0215; X86-NEXT: addl $16, %esp216; X86-NEXT: .cfi_def_cfa_offset 4217; X86-NEXT: retl218;219; X64-LABEL: vec_add_const_sub_const_extrause:220; X64: # %bb.0:221; X64-NEXT: subq $24, %rsp222; X64-NEXT: .cfi_def_cfa_offset 32223; X64-NEXT: movdqa %xmm0, %xmm1224; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill225; X64-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]226; X64-NEXT: paddd %xmm1, %xmm0227; X64-NEXT: callq vec_use@PLT228; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload229; X64-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0230; X64-NEXT: addq $24, %rsp231; X64-NEXT: .cfi_def_cfa_offset 8232; X64-NEXT: retq233 %t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>234 call void @vec_use(<4 x i32> %t0)235 %t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>236 ret <4 x i32> %t1237}238 239define <4 x i32> @vec_add_const_sub_const_nonsplat(<4 x i32> %arg) {240; X86-LABEL: vec_add_const_sub_const_nonsplat:241; X86: # %bb.0:242; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0243; X86-NEXT: retl244;245; X64-LABEL: vec_add_const_sub_const_nonsplat:246; X64: # %bb.0:247; X64-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0248; X64-NEXT: retq249 %t0 = add <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>250 %t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>251 ret <4 x i32> %t1252}253 254; c2-(x+c1)255 256define i32 @add_const_const_sub(i32 %arg) {257; X86-LABEL: add_const_const_sub:258; X86: # %bb.0:259; X86-NEXT: movl $-6, %eax260; X86-NEXT: subl {{[0-9]+}}(%esp), %eax261; X86-NEXT: retl262;263; X64-LABEL: add_const_const_sub:264; X64: # %bb.0:265; X64-NEXT: movl $-6, %eax266; X64-NEXT: subl %edi, %eax267; X64-NEXT: retq268 %t0 = add i32 %arg, 8269 %t1 = sub i32 2, %t0270 ret i32 %t1271}272 273define i32 @add_const_const_sub_extrause(i32 %arg) {274; X86-LABEL: add_const_const_sub_extrause:275; X86: # %bb.0:276; X86-NEXT: pushl %esi277; X86-NEXT: .cfi_def_cfa_offset 8278; X86-NEXT: .cfi_offset %esi, -8279; X86-NEXT: movl {{[0-9]+}}(%esp), %esi280; X86-NEXT: leal 8(%esi), %eax281; X86-NEXT: pushl %eax282; X86-NEXT: .cfi_adjust_cfa_offset 4283; X86-NEXT: calll use@PLT284; X86-NEXT: addl $4, %esp285; X86-NEXT: .cfi_adjust_cfa_offset -4286; X86-NEXT: movl $-6, %eax287; X86-NEXT: subl %esi, %eax288; X86-NEXT: popl %esi289; X86-NEXT: .cfi_def_cfa_offset 4290; X86-NEXT: retl291;292; X64-LABEL: add_const_const_sub_extrause:293; X64: # %bb.0:294; X64-NEXT: pushq %rbx295; X64-NEXT: .cfi_def_cfa_offset 16296; X64-NEXT: .cfi_offset %rbx, -16297; X64-NEXT: movl %edi, %ebx298; X64-NEXT: leal 8(%rbx), %edi299; X64-NEXT: callq use@PLT300; X64-NEXT: movl $-6, %eax301; X64-NEXT: subl %ebx, %eax302; X64-NEXT: popq %rbx303; X64-NEXT: .cfi_def_cfa_offset 8304; X64-NEXT: retq305 %t0 = add i32 %arg, 8306 call void @use(i32 %t0)307 %t1 = sub i32 2, %t0308 ret i32 %t1309}310 311define <4 x i32> @vec_add_const_const_sub(<4 x i32> %arg) {312; X86-LABEL: vec_add_const_const_sub:313; X86: # %bb.0:314; X86-NEXT: movdqa {{.*#+}} xmm1 = [4294967290,4294967290,4294967290,4294967290]315; X86-NEXT: psubd %xmm0, %xmm1316; X86-NEXT: movdqa %xmm1, %xmm0317; X86-NEXT: retl318;319; X64-LABEL: vec_add_const_const_sub:320; X64: # %bb.0:321; X64-NEXT: movdqa {{.*#+}} xmm1 = [4294967290,4294967290,4294967290,4294967290]322; X64-NEXT: psubd %xmm0, %xmm1323; X64-NEXT: movdqa %xmm1, %xmm0324; X64-NEXT: retq325 %t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>326 %t1 = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %t0327 ret <4 x i32> %t1328}329 330define <4 x i32> @vec_add_const_const_sub_extrause(<4 x i32> %arg) {331; X86-LABEL: vec_add_const_const_sub_extrause:332; X86: # %bb.0:333; X86-NEXT: subl $16, %esp334; X86-NEXT: .cfi_def_cfa_offset 20335; X86-NEXT: movdqa %xmm0, %xmm1336; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill337; X86-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]338; X86-NEXT: paddd %xmm1, %xmm0339; X86-NEXT: calll vec_use@PLT340; X86-NEXT: movdqa {{.*#+}} xmm0 = [4294967290,4294967290,4294967290,4294967290]341; X86-NEXT: movdqu (%esp), %xmm1 # 16-byte Reload342; X86-NEXT: psubd %xmm1, %xmm0343; X86-NEXT: addl $16, %esp344; X86-NEXT: .cfi_def_cfa_offset 4345; X86-NEXT: retl346;347; X64-LABEL: vec_add_const_const_sub_extrause:348; X64: # %bb.0:349; X64-NEXT: subq $24, %rsp350; X64-NEXT: .cfi_def_cfa_offset 32351; X64-NEXT: movdqa %xmm0, %xmm1352; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill353; X64-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]354; X64-NEXT: paddd %xmm1, %xmm0355; X64-NEXT: callq vec_use@PLT356; X64-NEXT: movdqa {{.*#+}} xmm0 = [4294967290,4294967290,4294967290,4294967290]357; X64-NEXT: psubd (%rsp), %xmm0 # 16-byte Folded Reload358; X64-NEXT: addq $24, %rsp359; X64-NEXT: .cfi_def_cfa_offset 8360; X64-NEXT: retq361 %t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>362 call void @vec_use(<4 x i32> %t0)363 %t1 = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %t0364 ret <4 x i32> %t1365}366 367define <4 x i32> @vec_add_const_const_sub_nonsplat(<4 x i32> %arg) {368; X86-LABEL: vec_add_const_const_sub_nonsplat:369; X86: # %bb.0:370; X86-NEXT: movdqa {{.*#+}} xmm1 = [4294967277,u,u,4294967290]371; X86-NEXT: psubd %xmm0, %xmm1372; X86-NEXT: movdqa %xmm1, %xmm0373; X86-NEXT: retl374;375; X64-LABEL: vec_add_const_const_sub_nonsplat:376; X64: # %bb.0:377; X64-NEXT: movdqa {{.*#+}} xmm1 = [4294967277,u,u,4294967290]378; X64-NEXT: psubd %xmm0, %xmm1379; X64-NEXT: movdqa %xmm1, %xmm0380; X64-NEXT: retq381 %t0 = add <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>382 %t1 = sub <4 x i32> <i32 2, i32 3, i32 undef, i32 2>, %t0383 ret <4 x i32> %t1384}385 386; (x-c1)+c2387 388define i32 @sub_const_add_const(i32 %arg) {389; X86-LABEL: sub_const_add_const:390; X86: # %bb.0:391; X86-NEXT: movl {{[0-9]+}}(%esp), %eax392; X86-NEXT: addl $-6, %eax393; X86-NEXT: retl394;395; X64-LABEL: sub_const_add_const:396; X64: # %bb.0:397; X64-NEXT: # kill: def $edi killed $edi def $rdi398; X64-NEXT: leal -6(%rdi), %eax399; X64-NEXT: retq400 %t0 = sub i32 %arg, 8401 %t1 = add i32 %t0, 2402 ret i32 %t1403}404 405define i32 @sub_const_add_const_extrause(i32 %arg) {406; X86-LABEL: sub_const_add_const_extrause:407; X86: # %bb.0:408; X86-NEXT: pushl %esi409; X86-NEXT: .cfi_def_cfa_offset 8410; X86-NEXT: .cfi_offset %esi, -8411; X86-NEXT: movl {{[0-9]+}}(%esp), %esi412; X86-NEXT: leal -8(%esi), %eax413; X86-NEXT: pushl %eax414; X86-NEXT: .cfi_adjust_cfa_offset 4415; X86-NEXT: calll use@PLT416; X86-NEXT: addl $4, %esp417; X86-NEXT: .cfi_adjust_cfa_offset -4418; X86-NEXT: addl $-6, %esi419; X86-NEXT: movl %esi, %eax420; X86-NEXT: popl %esi421; X86-NEXT: .cfi_def_cfa_offset 4422; X86-NEXT: retl423;424; X64-LABEL: sub_const_add_const_extrause:425; X64: # %bb.0:426; X64-NEXT: pushq %rbx427; X64-NEXT: .cfi_def_cfa_offset 16428; X64-NEXT: .cfi_offset %rbx, -16429; X64-NEXT: movl %edi, %ebx430; X64-NEXT: leal -8(%rbx), %edi431; X64-NEXT: callq use@PLT432; X64-NEXT: addl $-6, %ebx433; X64-NEXT: movl %ebx, %eax434; X64-NEXT: popq %rbx435; X64-NEXT: .cfi_def_cfa_offset 8436; X64-NEXT: retq437 %t0 = sub i32 %arg, 8438 call void @use(i32 %t0)439 %t1 = add i32 %t0, 2440 ret i32 %t1441}442 443define <4 x i32> @vec_sub_const_add_const(<4 x i32> %arg) {444; X86-LABEL: vec_sub_const_add_const:445; X86: # %bb.0:446; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0447; X86-NEXT: retl448;449; X64-LABEL: vec_sub_const_add_const:450; X64: # %bb.0:451; X64-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0452; X64-NEXT: retq453 %t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>454 %t1 = add <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>455 ret <4 x i32> %t1456}457 458define <4 x i32> @vec_sub_const_add_const_extrause(<4 x i32> %arg) {459; X86-LABEL: vec_sub_const_add_const_extrause:460; X86: # %bb.0:461; X86-NEXT: subl $16, %esp462; X86-NEXT: .cfi_def_cfa_offset 20463; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill464; X86-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0465; X86-NEXT: calll vec_use@PLT466; X86-NEXT: movdqu (%esp), %xmm0 # 16-byte Reload467; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0468; X86-NEXT: addl $16, %esp469; X86-NEXT: .cfi_def_cfa_offset 4470; X86-NEXT: retl471;472; X64-LABEL: vec_sub_const_add_const_extrause:473; X64: # %bb.0:474; X64-NEXT: subq $24, %rsp475; X64-NEXT: .cfi_def_cfa_offset 32476; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill477; X64-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0478; X64-NEXT: callq vec_use@PLT479; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload480; X64-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0481; X64-NEXT: addq $24, %rsp482; X64-NEXT: .cfi_def_cfa_offset 8483; X64-NEXT: retq484 %t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>485 call void @vec_use(<4 x i32> %t0)486 %t1 = add <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>487 ret <4 x i32> %t1488}489 490define <4 x i32> @vec_sub_const_add_const_nonsplat(<4 x i32> %arg) {491; X86-LABEL: vec_sub_const_add_const_nonsplat:492; X86: # %bb.0:493; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0494; X86-NEXT: retl495;496; X64-LABEL: vec_sub_const_add_const_nonsplat:497; X64: # %bb.0:498; X64-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0499; X64-NEXT: retq500 %t0 = sub <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>501 %t1 = add <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>502 ret <4 x i32> %t1503}504 505; (x-c1)-c2506 507define i32 @sub_const_sub_const(i32 %arg) {508; X86-LABEL: sub_const_sub_const:509; X86: # %bb.0:510; X86-NEXT: movl {{[0-9]+}}(%esp), %eax511; X86-NEXT: addl $-10, %eax512; X86-NEXT: retl513;514; X64-LABEL: sub_const_sub_const:515; X64: # %bb.0:516; X64-NEXT: # kill: def $edi killed $edi def $rdi517; X64-NEXT: leal -10(%rdi), %eax518; X64-NEXT: retq519 %t0 = sub i32 %arg, 8520 %t1 = sub i32 %t0, 2521 ret i32 %t1522}523 524define i32 @sub_const_sub_const_extrause(i32 %arg) {525; X86-LABEL: sub_const_sub_const_extrause:526; X86: # %bb.0:527; X86-NEXT: pushl %esi528; X86-NEXT: .cfi_def_cfa_offset 8529; X86-NEXT: .cfi_offset %esi, -8530; X86-NEXT: movl {{[0-9]+}}(%esp), %esi531; X86-NEXT: leal -8(%esi), %eax532; X86-NEXT: pushl %eax533; X86-NEXT: .cfi_adjust_cfa_offset 4534; X86-NEXT: calll use@PLT535; X86-NEXT: addl $4, %esp536; X86-NEXT: .cfi_adjust_cfa_offset -4537; X86-NEXT: addl $-10, %esi538; X86-NEXT: movl %esi, %eax539; X86-NEXT: popl %esi540; X86-NEXT: .cfi_def_cfa_offset 4541; X86-NEXT: retl542;543; X64-LABEL: sub_const_sub_const_extrause:544; X64: # %bb.0:545; X64-NEXT: pushq %rbx546; X64-NEXT: .cfi_def_cfa_offset 16547; X64-NEXT: .cfi_offset %rbx, -16548; X64-NEXT: movl %edi, %ebx549; X64-NEXT: leal -8(%rbx), %edi550; X64-NEXT: callq use@PLT551; X64-NEXT: addl $-10, %ebx552; X64-NEXT: movl %ebx, %eax553; X64-NEXT: popq %rbx554; X64-NEXT: .cfi_def_cfa_offset 8555; X64-NEXT: retq556 %t0 = sub i32 %arg, 8557 call void @use(i32 %t0)558 %t1 = sub i32 %t0, 2559 ret i32 %t1560}561 562define <4 x i32> @vec_sub_const_sub_const(<4 x i32> %arg) {563; X86-LABEL: vec_sub_const_sub_const:564; X86: # %bb.0:565; X86-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0566; X86-NEXT: retl567;568; X64-LABEL: vec_sub_const_sub_const:569; X64: # %bb.0:570; X64-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0571; X64-NEXT: retq572 %t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>573 %t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>574 ret <4 x i32> %t1575}576 577define <4 x i32> @vec_sub_const_sub_const_extrause(<4 x i32> %arg) {578; X86-LABEL: vec_sub_const_sub_const_extrause:579; X86: # %bb.0:580; X86-NEXT: subl $16, %esp581; X86-NEXT: .cfi_def_cfa_offset 20582; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill583; X86-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0584; X86-NEXT: calll vec_use@PLT585; X86-NEXT: movdqu (%esp), %xmm0 # 16-byte Reload586; X86-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0587; X86-NEXT: addl $16, %esp588; X86-NEXT: .cfi_def_cfa_offset 4589; X86-NEXT: retl590;591; X64-LABEL: vec_sub_const_sub_const_extrause:592; X64: # %bb.0:593; X64-NEXT: subq $24, %rsp594; X64-NEXT: .cfi_def_cfa_offset 32595; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill596; X64-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0597; X64-NEXT: callq vec_use@PLT598; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload599; X64-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0600; X64-NEXT: addq $24, %rsp601; X64-NEXT: .cfi_def_cfa_offset 8602; X64-NEXT: retq603 %t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>604 call void @vec_use(<4 x i32> %t0)605 %t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>606 ret <4 x i32> %t1607}608 609define <4 x i32> @vec_sub_const_sub_const_nonsplat(<4 x i32> %arg) {610; X86-LABEL: vec_sub_const_sub_const_nonsplat:611; X86: # %bb.0:612; X86-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0613; X86-NEXT: retl614;615; X64-LABEL: vec_sub_const_sub_const_nonsplat:616; X64: # %bb.0:617; X64-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0618; X64-NEXT: retq619 %t0 = sub <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>620 %t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>621 ret <4 x i32> %t1622}623 624; c2-(x-c1)625 626define i32 @sub_const_const_sub(i32 %arg) {627; X86-LABEL: sub_const_const_sub:628; X86: # %bb.0:629; X86-NEXT: movl $10, %eax630; X86-NEXT: subl {{[0-9]+}}(%esp), %eax631; X86-NEXT: retl632;633; X64-LABEL: sub_const_const_sub:634; X64: # %bb.0:635; X64-NEXT: movl $10, %eax636; X64-NEXT: subl %edi, %eax637; X64-NEXT: retq638 %t0 = sub i32 %arg, 8639 %t1 = sub i32 2, %t0640 ret i32 %t1641}642 643define i32 @sub_const_const_sub_extrause(i32 %arg) {644; X86-LABEL: sub_const_const_sub_extrause:645; X86: # %bb.0:646; X86-NEXT: pushl %esi647; X86-NEXT: .cfi_def_cfa_offset 8648; X86-NEXT: .cfi_offset %esi, -8649; X86-NEXT: movl {{[0-9]+}}(%esp), %esi650; X86-NEXT: leal -8(%esi), %eax651; X86-NEXT: pushl %eax652; X86-NEXT: .cfi_adjust_cfa_offset 4653; X86-NEXT: calll use@PLT654; X86-NEXT: addl $4, %esp655; X86-NEXT: .cfi_adjust_cfa_offset -4656; X86-NEXT: movl $10, %eax657; X86-NEXT: subl %esi, %eax658; X86-NEXT: popl %esi659; X86-NEXT: .cfi_def_cfa_offset 4660; X86-NEXT: retl661;662; X64-LABEL: sub_const_const_sub_extrause:663; X64: # %bb.0:664; X64-NEXT: pushq %rbx665; X64-NEXT: .cfi_def_cfa_offset 16666; X64-NEXT: .cfi_offset %rbx, -16667; X64-NEXT: movl %edi, %ebx668; X64-NEXT: leal -8(%rbx), %edi669; X64-NEXT: callq use@PLT670; X64-NEXT: movl $10, %eax671; X64-NEXT: subl %ebx, %eax672; X64-NEXT: popq %rbx673; X64-NEXT: .cfi_def_cfa_offset 8674; X64-NEXT: retq675 %t0 = sub i32 %arg, 8676 call void @use(i32 %t0)677 %t1 = sub i32 2, %t0678 ret i32 %t1679}680 681define <4 x i32> @vec_sub_const_const_sub(<4 x i32> %arg) {682; X86-LABEL: vec_sub_const_const_sub:683; X86: # %bb.0:684; X86-NEXT: movdqa {{.*#+}} xmm1 = [10,10,10,10]685; X86-NEXT: psubd %xmm0, %xmm1686; X86-NEXT: movdqa %xmm1, %xmm0687; X86-NEXT: retl688;689; X64-LABEL: vec_sub_const_const_sub:690; X64: # %bb.0:691; X64-NEXT: movdqa {{.*#+}} xmm1 = [10,10,10,10]692; X64-NEXT: psubd %xmm0, %xmm1693; X64-NEXT: movdqa %xmm1, %xmm0694; X64-NEXT: retq695 %t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>696 %t1 = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %t0697 ret <4 x i32> %t1698}699 700define <4 x i32> @vec_sub_const_const_sub_extrause(<4 x i32> %arg) {701; X86-LABEL: vec_sub_const_const_sub_extrause:702; X86: # %bb.0:703; X86-NEXT: subl $16, %esp704; X86-NEXT: .cfi_def_cfa_offset 20705; X86-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0706; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill707; X86-NEXT: calll vec_use@PLT708; X86-NEXT: movdqa {{.*#+}} xmm0 = [2,2,2,2]709; X86-NEXT: movdqu (%esp), %xmm1 # 16-byte Reload710; X86-NEXT: psubd %xmm1, %xmm0711; X86-NEXT: addl $16, %esp712; X86-NEXT: .cfi_def_cfa_offset 4713; X86-NEXT: retl714;715; X64-LABEL: vec_sub_const_const_sub_extrause:716; X64: # %bb.0:717; X64-NEXT: subq $24, %rsp718; X64-NEXT: .cfi_def_cfa_offset 32719; X64-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0720; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill721; X64-NEXT: callq vec_use@PLT722; X64-NEXT: movdqa {{.*#+}} xmm0 = [2,2,2,2]723; X64-NEXT: psubd (%rsp), %xmm0 # 16-byte Folded Reload724; X64-NEXT: addq $24, %rsp725; X64-NEXT: .cfi_def_cfa_offset 8726; X64-NEXT: retq727 %t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>728 call void @vec_use(<4 x i32> %t0)729 %t1 = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %t0730 ret <4 x i32> %t1731}732 733define <4 x i32> @vec_sub_const_const_sub_nonsplat(<4 x i32> %arg) {734; X86-LABEL: vec_sub_const_const_sub_nonsplat:735; X86: # %bb.0:736; X86-NEXT: movdqa {{.*#+}} xmm1 = [23,u,u,10]737; X86-NEXT: psubd %xmm0, %xmm1738; X86-NEXT: movdqa %xmm1, %xmm0739; X86-NEXT: retl740;741; X64-LABEL: vec_sub_const_const_sub_nonsplat:742; X64: # %bb.0:743; X64-NEXT: movdqa {{.*#+}} xmm1 = [23,u,u,10]744; X64-NEXT: psubd %xmm0, %xmm1745; X64-NEXT: movdqa %xmm1, %xmm0746; X64-NEXT: retq747 %t0 = sub <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>748 %t1 = sub <4 x i32> <i32 2, i32 3, i32 undef, i32 2>, %t0749 ret <4 x i32> %t1750}751 752; (c1-x)+c2753 754define i32 @const_sub_add_const(i32 %arg) {755; X86-LABEL: const_sub_add_const:756; X86: # %bb.0:757; X86-NEXT: movl $10, %eax758; X86-NEXT: subl {{[0-9]+}}(%esp), %eax759; X86-NEXT: retl760;761; X64-LABEL: const_sub_add_const:762; X64: # %bb.0:763; X64-NEXT: movl $10, %eax764; X64-NEXT: subl %edi, %eax765; X64-NEXT: retq766 %t0 = sub i32 8, %arg767 %t1 = add i32 %t0, 2768 ret i32 %t1769}770 771define i32 @const_sub_add_const_extrause(i32 %arg) {772; X86-LABEL: const_sub_add_const_extrause:773; X86: # %bb.0:774; X86-NEXT: pushl %esi775; X86-NEXT: .cfi_def_cfa_offset 8776; X86-NEXT: .cfi_offset %esi, -8777; X86-NEXT: movl {{[0-9]+}}(%esp), %esi778; X86-NEXT: movl $8, %eax779; X86-NEXT: subl %esi, %eax780; X86-NEXT: pushl %eax781; X86-NEXT: .cfi_adjust_cfa_offset 4782; X86-NEXT: calll use@PLT783; X86-NEXT: addl $4, %esp784; X86-NEXT: .cfi_adjust_cfa_offset -4785; X86-NEXT: movl $10, %eax786; X86-NEXT: subl %esi, %eax787; X86-NEXT: popl %esi788; X86-NEXT: .cfi_def_cfa_offset 4789; X86-NEXT: retl790;791; X64-LABEL: const_sub_add_const_extrause:792; X64: # %bb.0:793; X64-NEXT: pushq %rbx794; X64-NEXT: .cfi_def_cfa_offset 16795; X64-NEXT: .cfi_offset %rbx, -16796; X64-NEXT: movl %edi, %ebx797; X64-NEXT: movl $8, %edi798; X64-NEXT: subl %ebx, %edi799; X64-NEXT: callq use@PLT800; X64-NEXT: movl $10, %eax801; X64-NEXT: subl %ebx, %eax802; X64-NEXT: popq %rbx803; X64-NEXT: .cfi_def_cfa_offset 8804; X64-NEXT: retq805 %t0 = sub i32 8, %arg806 call void @use(i32 %t0)807 %t1 = add i32 %t0, 2808 ret i32 %t1809}810 811define <4 x i32> @vec_const_sub_add_const(<4 x i32> %arg) {812; X86-LABEL: vec_const_sub_add_const:813; X86: # %bb.0:814; X86-NEXT: movdqa {{.*#+}} xmm1 = [10,10,10,10]815; X86-NEXT: psubd %xmm0, %xmm1816; X86-NEXT: movdqa %xmm1, %xmm0817; X86-NEXT: retl818;819; X64-LABEL: vec_const_sub_add_const:820; X64: # %bb.0:821; X64-NEXT: movdqa {{.*#+}} xmm1 = [10,10,10,10]822; X64-NEXT: psubd %xmm0, %xmm1823; X64-NEXT: movdqa %xmm1, %xmm0824; X64-NEXT: retq825 %t0 = sub <4 x i32> <i32 8, i32 8, i32 8, i32 8>, %arg826 %t1 = add <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>827 ret <4 x i32> %t1828}829 830define <4 x i32> @vec_const_sub_add_const_extrause(<4 x i32> %arg) {831; X86-LABEL: vec_const_sub_add_const_extrause:832; X86: # %bb.0:833; X86-NEXT: subl $16, %esp834; X86-NEXT: .cfi_def_cfa_offset 20835; X86-NEXT: movdqa %xmm0, %xmm1836; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill837; X86-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]838; X86-NEXT: psubd %xmm1, %xmm0839; X86-NEXT: calll vec_use@PLT840; X86-NEXT: movdqa {{.*#+}} xmm0 = [10,10,10,10]841; X86-NEXT: movdqu (%esp), %xmm1 # 16-byte Reload842; X86-NEXT: psubd %xmm1, %xmm0843; X86-NEXT: addl $16, %esp844; X86-NEXT: .cfi_def_cfa_offset 4845; X86-NEXT: retl846;847; X64-LABEL: vec_const_sub_add_const_extrause:848; X64: # %bb.0:849; X64-NEXT: subq $24, %rsp850; X64-NEXT: .cfi_def_cfa_offset 32851; X64-NEXT: movdqa %xmm0, %xmm1852; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill853; X64-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]854; X64-NEXT: psubd %xmm1, %xmm0855; X64-NEXT: callq vec_use@PLT856; X64-NEXT: movdqa {{.*#+}} xmm0 = [10,10,10,10]857; X64-NEXT: psubd (%rsp), %xmm0 # 16-byte Folded Reload858; X64-NEXT: addq $24, %rsp859; X64-NEXT: .cfi_def_cfa_offset 8860; X64-NEXT: retq861 %t0 = sub <4 x i32> <i32 8, i32 8, i32 8, i32 8>, %arg862 call void @vec_use(<4 x i32> %t0)863 %t1 = add <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>864 ret <4 x i32> %t1865}866 867define <4 x i32> @vec_const_sub_add_const_nonsplat(<4 x i32> %arg) {868; X86-LABEL: vec_const_sub_add_const_nonsplat:869; X86: # %bb.0:870; X86-NEXT: movdqa {{.*#+}} xmm1 = [23,u,u,10]871; X86-NEXT: psubd %xmm0, %xmm1872; X86-NEXT: movdqa %xmm1, %xmm0873; X86-NEXT: retl874;875; X64-LABEL: vec_const_sub_add_const_nonsplat:876; X64: # %bb.0:877; X64-NEXT: movdqa {{.*#+}} xmm1 = [23,u,u,10]878; X64-NEXT: psubd %xmm0, %xmm1879; X64-NEXT: movdqa %xmm1, %xmm0880; X64-NEXT: retq881 %t0 = sub <4 x i32> <i32 21, i32 undef, i32 8, i32 8>, %arg882 %t1 = add <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>883 ret <4 x i32> %t1884}885 886; (c1-x)-c2887 888define i32 @const_sub_sub_const(i32 %arg) {889; X86-LABEL: const_sub_sub_const:890; X86: # %bb.0:891; X86-NEXT: movl $6, %eax892; X86-NEXT: subl {{[0-9]+}}(%esp), %eax893; X86-NEXT: retl894;895; X64-LABEL: const_sub_sub_const:896; X64: # %bb.0:897; X64-NEXT: movl $6, %eax898; X64-NEXT: subl %edi, %eax899; X64-NEXT: retq900 %t0 = sub i32 8, %arg901 %t1 = sub i32 %t0, 2902 ret i32 %t1903}904 905define i32 @const_sub_sub_const_extrause(i32 %arg) {906; X86-LABEL: const_sub_sub_const_extrause:907; X86: # %bb.0:908; X86-NEXT: pushl %esi909; X86-NEXT: .cfi_def_cfa_offset 8910; X86-NEXT: .cfi_offset %esi, -8911; X86-NEXT: movl {{[0-9]+}}(%esp), %esi912; X86-NEXT: movl $8, %eax913; X86-NEXT: subl %esi, %eax914; X86-NEXT: pushl %eax915; X86-NEXT: .cfi_adjust_cfa_offset 4916; X86-NEXT: calll use@PLT917; X86-NEXT: addl $4, %esp918; X86-NEXT: .cfi_adjust_cfa_offset -4919; X86-NEXT: movl $6, %eax920; X86-NEXT: subl %esi, %eax921; X86-NEXT: popl %esi922; X86-NEXT: .cfi_def_cfa_offset 4923; X86-NEXT: retl924;925; X64-LABEL: const_sub_sub_const_extrause:926; X64: # %bb.0:927; X64-NEXT: pushq %rbx928; X64-NEXT: .cfi_def_cfa_offset 16929; X64-NEXT: .cfi_offset %rbx, -16930; X64-NEXT: movl %edi, %ebx931; X64-NEXT: movl $8, %edi932; X64-NEXT: subl %ebx, %edi933; X64-NEXT: callq use@PLT934; X64-NEXT: movl $6, %eax935; X64-NEXT: subl %ebx, %eax936; X64-NEXT: popq %rbx937; X64-NEXT: .cfi_def_cfa_offset 8938; X64-NEXT: retq939 %t0 = sub i32 8, %arg940 call void @use(i32 %t0)941 %t1 = sub i32 %t0, 2942 ret i32 %t1943}944 945define <4 x i32> @vec_const_sub_sub_const(<4 x i32> %arg) {946; X86-LABEL: vec_const_sub_sub_const:947; X86: # %bb.0:948; X86-NEXT: movdqa {{.*#+}} xmm1 = [6,6,6,6]949; X86-NEXT: psubd %xmm0, %xmm1950; X86-NEXT: movdqa %xmm1, %xmm0951; X86-NEXT: retl952;953; X64-LABEL: vec_const_sub_sub_const:954; X64: # %bb.0:955; X64-NEXT: movdqa {{.*#+}} xmm1 = [6,6,6,6]956; X64-NEXT: psubd %xmm0, %xmm1957; X64-NEXT: movdqa %xmm1, %xmm0958; X64-NEXT: retq959 %t0 = sub <4 x i32> <i32 8, i32 8, i32 8, i32 8>, %arg960 %t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>961 ret <4 x i32> %t1962}963 964define <4 x i32> @vec_const_sub_sub_const_extrause(<4 x i32> %arg) {965; X86-LABEL: vec_const_sub_sub_const_extrause:966; X86: # %bb.0:967; X86-NEXT: subl $16, %esp968; X86-NEXT: .cfi_def_cfa_offset 20969; X86-NEXT: movdqa %xmm0, %xmm1970; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill971; X86-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]972; X86-NEXT: psubd %xmm1, %xmm0973; X86-NEXT: calll vec_use@PLT974; X86-NEXT: movdqa {{.*#+}} xmm0 = [6,6,6,6]975; X86-NEXT: movdqu (%esp), %xmm1 # 16-byte Reload976; X86-NEXT: psubd %xmm1, %xmm0977; X86-NEXT: addl $16, %esp978; X86-NEXT: .cfi_def_cfa_offset 4979; X86-NEXT: retl980;981; X64-LABEL: vec_const_sub_sub_const_extrause:982; X64: # %bb.0:983; X64-NEXT: subq $24, %rsp984; X64-NEXT: .cfi_def_cfa_offset 32985; X64-NEXT: movdqa %xmm0, %xmm1986; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill987; X64-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]988; X64-NEXT: psubd %xmm1, %xmm0989; X64-NEXT: callq vec_use@PLT990; X64-NEXT: movdqa {{.*#+}} xmm0 = [6,6,6,6]991; X64-NEXT: psubd (%rsp), %xmm0 # 16-byte Folded Reload992; X64-NEXT: addq $24, %rsp993; X64-NEXT: .cfi_def_cfa_offset 8994; X64-NEXT: retq995 %t0 = sub <4 x i32> <i32 8, i32 8, i32 8, i32 8>, %arg996 call void @vec_use(<4 x i32> %t0)997 %t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>998 ret <4 x i32> %t1999}1000 1001define <4 x i32> @vec_const_sub_sub_const_nonsplat(<4 x i32> %arg) {1002; X86-LABEL: vec_const_sub_sub_const_nonsplat:1003; X86: # %bb.0:1004; X86-NEXT: movdqa {{.*#+}} xmm1 = [19,u,u,6]1005; X86-NEXT: psubd %xmm0, %xmm11006; X86-NEXT: movdqa %xmm1, %xmm01007; X86-NEXT: retl1008;1009; X64-LABEL: vec_const_sub_sub_const_nonsplat:1010; X64: # %bb.0:1011; X64-NEXT: movdqa {{.*#+}} xmm1 = [19,u,u,6]1012; X64-NEXT: psubd %xmm0, %xmm11013; X64-NEXT: movdqa %xmm1, %xmm01014; X64-NEXT: retq1015 %t0 = sub <4 x i32> <i32 21, i32 undef, i32 8, i32 8>, %arg1016 %t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>1017 ret <4 x i32> %t11018}1019 1020; c2-(c1-x)1021 1022define i32 @const_sub_const_sub(i32 %arg) {1023; X86-LABEL: const_sub_const_sub:1024; X86: # %bb.0:1025; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1026; X86-NEXT: addl $-6, %eax1027; X86-NEXT: retl1028;1029; X64-LABEL: const_sub_const_sub:1030; X64: # %bb.0:1031; X64-NEXT: # kill: def $edi killed $edi def $rdi1032; X64-NEXT: leal -6(%rdi), %eax1033; X64-NEXT: retq1034 %t0 = sub i32 8, %arg1035 %t1 = sub i32 2, %t01036 ret i32 %t11037}1038 1039define i32 @const_sub_const_sub_extrause(i32 %arg) {1040; X86-LABEL: const_sub_const_sub_extrause:1041; X86: # %bb.0:1042; X86-NEXT: pushl %esi1043; X86-NEXT: .cfi_def_cfa_offset 81044; X86-NEXT: .cfi_offset %esi, -81045; X86-NEXT: movl $8, %esi1046; X86-NEXT: subl {{[0-9]+}}(%esp), %esi1047; X86-NEXT: pushl %esi1048; X86-NEXT: .cfi_adjust_cfa_offset 41049; X86-NEXT: calll use@PLT1050; X86-NEXT: addl $4, %esp1051; X86-NEXT: .cfi_adjust_cfa_offset -41052; X86-NEXT: movl $2, %eax1053; X86-NEXT: subl %esi, %eax1054; X86-NEXT: popl %esi1055; X86-NEXT: .cfi_def_cfa_offset 41056; X86-NEXT: retl1057;1058; X64-LABEL: const_sub_const_sub_extrause:1059; X64: # %bb.0:1060; X64-NEXT: pushq %rbx1061; X64-NEXT: .cfi_def_cfa_offset 161062; X64-NEXT: .cfi_offset %rbx, -161063; X64-NEXT: movl $8, %ebx1064; X64-NEXT: subl %edi, %ebx1065; X64-NEXT: movl %ebx, %edi1066; X64-NEXT: callq use@PLT1067; X64-NEXT: movl $2, %eax1068; X64-NEXT: subl %ebx, %eax1069; X64-NEXT: popq %rbx1070; X64-NEXT: .cfi_def_cfa_offset 81071; X64-NEXT: retq1072 %t0 = sub i32 8, %arg1073 call void @use(i32 %t0)1074 %t1 = sub i32 2, %t01075 ret i32 %t11076}1077 1078define <4 x i32> @vec_const_sub_const_sub(<4 x i32> %arg) {1079; X86-LABEL: vec_const_sub_const_sub:1080; X86: # %bb.0:1081; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01082; X86-NEXT: retl1083;1084; X64-LABEL: vec_const_sub_const_sub:1085; X64: # %bb.0:1086; X64-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01087; X64-NEXT: retq1088 %t0 = sub <4 x i32> <i32 8, i32 8, i32 8, i32 8>, %arg1089 %t1 = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %t01090 ret <4 x i32> %t11091}1092 1093define <4 x i32> @vec_const_sub_const_sub_extrause(<4 x i32> %arg) {1094; X86-LABEL: vec_const_sub_const_sub_extrause:1095; X86: # %bb.0:1096; X86-NEXT: subl $16, %esp1097; X86-NEXT: .cfi_def_cfa_offset 201098; X86-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8]1099; X86-NEXT: psubd %xmm0, %xmm11100; X86-NEXT: movdqu %xmm1, (%esp) # 16-byte Spill1101; X86-NEXT: movdqa %xmm1, %xmm01102; X86-NEXT: calll vec_use@PLT1103; X86-NEXT: movdqa {{.*#+}} xmm0 = [2,2,2,2]1104; X86-NEXT: movdqu (%esp), %xmm1 # 16-byte Reload1105; X86-NEXT: psubd %xmm1, %xmm01106; X86-NEXT: addl $16, %esp1107; X86-NEXT: .cfi_def_cfa_offset 41108; X86-NEXT: retl1109;1110; X64-LABEL: vec_const_sub_const_sub_extrause:1111; X64: # %bb.0:1112; X64-NEXT: subq $24, %rsp1113; X64-NEXT: .cfi_def_cfa_offset 321114; X64-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8]1115; X64-NEXT: psubd %xmm0, %xmm11116; X64-NEXT: movdqa %xmm1, (%rsp) # 16-byte Spill1117; X64-NEXT: movdqa %xmm1, %xmm01118; X64-NEXT: callq vec_use@PLT1119; X64-NEXT: movdqa {{.*#+}} xmm0 = [2,2,2,2]1120; X64-NEXT: psubd (%rsp), %xmm0 # 16-byte Folded Reload1121; X64-NEXT: addq $24, %rsp1122; X64-NEXT: .cfi_def_cfa_offset 81123; X64-NEXT: retq1124 %t0 = sub <4 x i32> <i32 8, i32 8, i32 8, i32 8>, %arg1125 call void @vec_use(<4 x i32> %t0)1126 %t1 = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %t01127 ret <4 x i32> %t11128}1129 1130define <4 x i32> @vec_const_sub_const_sub_nonsplat(<4 x i32> %arg) {1131; X86-LABEL: vec_const_sub_const_sub_nonsplat:1132; X86: # %bb.0:1133; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01134; X86-NEXT: retl1135;1136; X64-LABEL: vec_const_sub_const_sub_nonsplat:1137; X64: # %bb.0:1138; X64-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01139; X64-NEXT: retq1140 %t0 = sub <4 x i32> <i32 21, i32 undef, i32 8, i32 8>, %arg1141 %t1 = sub <4 x i32> <i32 2, i32 3, i32 undef, i32 2>, %t01142 ret <4 x i32> %t11143}1144 1145; (x|c1)+c2 where (x|c1) is addlike1146define i32 @add_const_disjoint_or_const(i32 %arg) {1147; X86-LABEL: add_const_disjoint_or_const:1148; X86: # %bb.0:1149; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1150; X86-NEXT: addl $10, %eax1151; X86-NEXT: retl1152;1153; X64-LABEL: add_const_disjoint_or_const:1154; X64: # %bb.0:1155; X64-NEXT: # kill: def $edi killed $edi def $rdi1156; X64-NEXT: leal 10(%rdi), %eax1157; X64-NEXT: retq1158 %t0 = or disjoint i32 %arg, 81159 %t1 = add i32 %t0, 21160 ret i32 %t11161}1162 1163; (x+c1)|c2 where the outer or is addlike1164define i32 @disjoint_or_const_add_const(i32 %arg) {1165; X86-LABEL: disjoint_or_const_add_const:1166; X86: # %bb.0:1167; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1168; X86-NEXT: addl $10, %eax1169; X86-NEXT: retl1170;1171; X64-LABEL: disjoint_or_const_add_const:1172; X64: # %bb.0:1173; X64-NEXT: # kill: def $edi killed $edi def $rdi1174; X64-NEXT: leal 10(%rdi), %eax1175; X64-NEXT: retq1176 %t0 = add i32 %arg, 81177 %t1 = or disjoint i32 %t0, 21178 ret i32 %t11179}1180