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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X863; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X644 5; Fold6; ptr - (ptr & C)7; To8; ptr & (~C)9;10; This needs to be a backend-level fold because only by now pointers11; are just registers; in middle-end IR this can only be done via @llvm.ptrmask()12; intrinsic which is not sufficiently widely-spread yet.13;14; https://bugs.llvm.org/show_bug.cgi?id=4444815 16; The basic positive tests17 18define i32 @t0_32(i32 %ptr) nounwind {19; X86-LABEL: t0_32:20; X86: # %bb.0:21; X86-NEXT: movl {{[0-9]+}}(%esp), %eax22; X86-NEXT: andl $-16, %eax23; X86-NEXT: retl24;25; X64-LABEL: t0_32:26; X64: # %bb.0:27; X64-NEXT: movl %edi, %eax28; X64-NEXT: andl $-16, %eax29; X64-NEXT: retq30 %bias = and i32 %ptr, 1531 %r = sub i32 %ptr, %bias32 ret i32 %r33}34define i64 @t1_64(i64 %ptr) nounwind {35; X86-LABEL: t1_64:36; X86: # %bb.0:37; X86-NEXT: movl {{[0-9]+}}(%esp), %eax38; X86-NEXT: movl {{[0-9]+}}(%esp), %edx39; X86-NEXT: andl $-16, %eax40; X86-NEXT: retl41;42; X64-LABEL: t1_64:43; X64: # %bb.0:44; X64-NEXT: movq %rdi, %rax45; X64-NEXT: andq $-16, %rax46; X64-NEXT: retq47 %bias = and i64 %ptr, 1548 %r = sub i64 %ptr, %bias49 ret i64 %r50}51 52define i32 @t2_powerof2(i32 %ptr) nounwind {53; X86-LABEL: t2_powerof2:54; X86: # %bb.0:55; X86-NEXT: movl {{[0-9]+}}(%esp), %eax56; X86-NEXT: andl $-17, %eax57; X86-NEXT: retl58;59; X64-LABEL: t2_powerof2:60; X64: # %bb.0:61; X64-NEXT: movl %edi, %eax62; X64-NEXT: andl $-17, %eax63; X64-NEXT: retq64 %bias = and i32 %ptr, 1665 %r = sub i32 %ptr, %bias66 ret i32 %r67}68define i32 @t3_random_constant(i32 %ptr) nounwind {69; X86-LABEL: t3_random_constant:70; X86: # %bb.0:71; X86-NEXT: movl {{[0-9]+}}(%esp), %eax72; X86-NEXT: andl $-43, %eax73; X86-NEXT: retl74;75; X64-LABEL: t3_random_constant:76; X64: # %bb.0:77; X64-NEXT: movl %edi, %eax78; X64-NEXT: andl $-43, %eax79; X64-NEXT: retq80 %bias = and i32 %ptr, 4281 %r = sub i32 %ptr, %bias82 ret i32 %r83}84 85; Extra use tests86 87define i32 @t4_extrause(i32 %ptr, ptr %bias_storage) nounwind {88; X86-LABEL: t4_extrause:89; X86: # %bb.0:90; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx91; X86-NEXT: movl {{[0-9]+}}(%esp), %eax92; X86-NEXT: movl %eax, %edx93; X86-NEXT: andl $15, %edx94; X86-NEXT: movl %edx, (%ecx)95; X86-NEXT: andl $-16, %eax96; X86-NEXT: retl97;98; X64-LABEL: t4_extrause:99; X64: # %bb.0:100; X64-NEXT: movl %edi, %eax101; X64-NEXT: movl %edi, %ecx102; X64-NEXT: andl $15, %ecx103; X64-NEXT: movl %ecx, (%rsi)104; X64-NEXT: andl $-16, %eax105; X64-NEXT: retq106 %bias = and i32 %ptr, 15107 store i32 %bias, ptr %bias_storage108 %r = sub i32 %ptr, %bias109 ret i32 %r110}111 112; Negative tests113 114define i32 @n5_different_ptrs(i32 %ptr0, i32 %ptr1) nounwind {115; X86-LABEL: n5_different_ptrs:116; X86: # %bb.0:117; X86-NEXT: movl {{[0-9]+}}(%esp), %eax118; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx119; X86-NEXT: andl $15, %ecx120; X86-NEXT: subl %ecx, %eax121; X86-NEXT: retl122;123; X64-LABEL: n5_different_ptrs:124; X64: # %bb.0:125; X64-NEXT: movl %edi, %eax126; X64-NEXT: andl $15, %esi127; X64-NEXT: subl %esi, %eax128; X64-NEXT: retq129 %bias = and i32 %ptr1, 15 ; not %ptr0130 %r = sub i32 %ptr0, %bias ; not %ptr1131 ret i32 %r132}133 134define i32 @n6_sub_is_not_commutative(i32 %ptr) nounwind {135; X86-LABEL: n6_sub_is_not_commutative:136; X86: # %bb.0:137; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx138; X86-NEXT: movl %ecx, %eax139; X86-NEXT: andl $15, %eax140; X86-NEXT: subl %ecx, %eax141; X86-NEXT: retl142;143; X64-LABEL: n6_sub_is_not_commutative:144; X64: # %bb.0:145; X64-NEXT: movl %edi, %eax146; X64-NEXT: andl $15, %eax147; X64-NEXT: subl %edi, %eax148; X64-NEXT: retq149 %bias = and i32 %ptr, 15150 %r = sub i32 %bias, %ptr ; wrong order151 ret i32 %r152}153