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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+avx512f, \3; RUN: -mattr=+amx-tf32 -verify-machineinstrs | FileCheck %s4 5define void @test_amx(i8* %pointer, i8* %base, i64 %stride) {6; CHECK-LABEL: test_amx:7; CHECK: # %bb.0:8; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm09; CHECK-NEXT: vmovups %zmm0, -{{[0-9]+}}(%rsp)10; CHECK-NEXT: movb $1, -{{[0-9]+}}(%rsp)11; CHECK-NEXT: movb $8, -{{[0-9]+}}(%rsp)12; CHECK-NEXT: movw $8, -{{[0-9]+}}(%rsp)13; CHECK-NEXT: movb $8, -{{[0-9]+}}(%rsp)14; CHECK-NEXT: movw $8, -{{[0-9]+}}(%rsp)15; CHECK-NEXT: movb $8, -{{[0-9]+}}(%rsp)16; CHECK-NEXT: movw $8, -{{[0-9]+}}(%rsp)17; CHECK-NEXT: ldtilecfg -{{[0-9]+}}(%rsp)18; CHECK-NEXT: movw $8, %ax19; CHECK-NEXT: tileloadd (%rsi,%rdx), %tmm020; CHECK-NEXT: tilezero %tmm121; CHECK-NEXT: tilezero %tmm222; CHECK-NEXT: tmmultf32ps %tmm1, %tmm0, %tmm223; CHECK-NEXT: tilestored %tmm2, (%rdi,%rdx)24; CHECK-NEXT: tilerelease25; CHECK-NEXT: vzeroupper26; CHECK-NEXT: retq27 28 %a = call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 8, i8* %base, i64 %stride)29 %b = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 8)30 %c = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 8)31 32 %c1 = call x86_amx @llvm.x86.tmmultf32ps.internal(i16 8, i16 8, i16 8, x86_amx %c, x86_amx %a, x86_amx %b)33 34 call void @llvm.x86.tilestored64.internal(i16 8, i16 8, i8* %pointer, i64 %stride, x86_amx %c1)35 ret void36}37 38declare x86_amx @llvm.x86.tilezero.internal(i16, i16)39declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, i8*, i64)40declare void @llvm.x86.tilestored64.internal(i16, i16, i8*, i64, x86_amx)41 42 43declare x86_amx @llvm.x86.tmmultf32ps.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)44