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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X644 5;6; PR48768 - 'and' clears the overflow flag, so we don't need a separate 'test'.7;8 9define i8 @and_i8_ri(i8 zeroext %0, i8 zeroext %1) {10; X86-LABEL: and_i8_ri:11; X86: # %bb.0:12; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax13; X86-NEXT: movl %eax, %ecx14; X86-NEXT: andb $-17, %cl15; X86-NEXT: je .LBB0_216; X86-NEXT: # %bb.1:17; X86-NEXT: movl %ecx, %eax18; X86-NEXT: .LBB0_2:19; X86-NEXT: retl20;21; X64-LABEL: and_i8_ri:22; X64: # %bb.0:23; X64-NEXT: movl %edi, %eax24; X64-NEXT: andb $-17, %al25; X64-NEXT: movzbl %al, %eax26; X64-NEXT: cmovel %edi, %eax27; X64-NEXT: # kill: def $al killed $al killed $eax28; X64-NEXT: retq29 %3 = and i8 %0, -1730 %4 = icmp eq i8 %3, 031 %5 = select i1 %4, i8 %0, i8 %332 ret i8 %533}34 35define i8 @and_i8_rr(i8 zeroext %0, i8 zeroext %1) {36; X86-LABEL: and_i8_rr:37; X86: # %bb.0:38; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax39; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx40; X86-NEXT: andb %al, %cl41; X86-NEXT: je .LBB1_242; X86-NEXT: # %bb.1:43; X86-NEXT: movl %ecx, %eax44; X86-NEXT: .LBB1_2:45; X86-NEXT: retl46;47; X64-LABEL: and_i8_rr:48; X64: # %bb.0:49; X64-NEXT: movl %esi, %eax50; X64-NEXT: andl %edi, %eax51; X64-NEXT: cmovel %edi, %eax52; X64-NEXT: # kill: def $al killed $al killed $eax53; X64-NEXT: retq54 %3 = and i8 %1, %055 %4 = icmp eq i8 %3, 056 %5 = select i1 %4, i8 %0, i8 %357 ret i8 %558}59 60define i16 @and_i16_ri(i16 zeroext %0, i16 zeroext %1) {61; X86-LABEL: and_i16_ri:62; X86: # %bb.0:63; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax64; X86-NEXT: movl %eax, %ecx65; X86-NEXT: andl $-17, %ecx66; X86-NEXT: je .LBB2_267; X86-NEXT: # %bb.1:68; X86-NEXT: movl %ecx, %eax69; X86-NEXT: .LBB2_2:70; X86-NEXT: # kill: def $ax killed $ax killed $eax71; X86-NEXT: retl72;73; X64-LABEL: and_i16_ri:74; X64: # %bb.0:75; X64-NEXT: movl %edi, %eax76; X64-NEXT: andl $-17, %eax77; X64-NEXT: cmovel %edi, %eax78; X64-NEXT: # kill: def $ax killed $ax killed $eax79; X64-NEXT: retq80 %3 = and i16 %0, -1781 %4 = icmp eq i16 %3, 082 %5 = select i1 %4, i16 %0, i16 %383 ret i16 %584}85 86define i16 @and_i16_rr(i16 zeroext %0, i16 zeroext %1) {87; X86-LABEL: and_i16_rr:88; X86: # %bb.0:89; X86-NEXT: movl {{[0-9]+}}(%esp), %eax90; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx91; X86-NEXT: andw %ax, %cx92; X86-NEXT: je .LBB3_293; X86-NEXT: # %bb.1:94; X86-NEXT: movl %ecx, %eax95; X86-NEXT: .LBB3_2:96; X86-NEXT: # kill: def $ax killed $ax killed $eax97; X86-NEXT: retl98;99; X64-LABEL: and_i16_rr:100; X64: # %bb.0:101; X64-NEXT: movl %esi, %eax102; X64-NEXT: andl %edi, %eax103; X64-NEXT: cmovel %edi, %eax104; X64-NEXT: # kill: def $ax killed $ax killed $eax105; X64-NEXT: retq106 %3 = and i16 %1, %0107 %4 = icmp eq i16 %3, 0108 %5 = select i1 %4, i16 %0, i16 %3109 ret i16 %5110}111 112define i32 @and_i32_ri(i32 %0, i32 %1) {113; X86-LABEL: and_i32_ri:114; X86: # %bb.0:115; X86-NEXT: movl {{[0-9]+}}(%esp), %eax116; X86-NEXT: movl %eax, %ecx117; X86-NEXT: andl $-17, %ecx118; X86-NEXT: jle .LBB4_2119; X86-NEXT: # %bb.1:120; X86-NEXT: movl %ecx, %eax121; X86-NEXT: .LBB4_2:122; X86-NEXT: retl123;124; X64-LABEL: and_i32_ri:125; X64: # %bb.0:126; X64-NEXT: movl %edi, %eax127; X64-NEXT: andl $-17, %eax128; X64-NEXT: cmovlel %edi, %eax129; X64-NEXT: retq130 %3 = and i32 %0, -17131 %4 = icmp slt i32 %3, 1132 %5 = select i1 %4, i32 %0, i32 %3133 ret i32 %5134}135 136define i32 @and_i32_rr(i32 %0, i32 %1) {137; X86-LABEL: and_i32_rr:138; X86: # %bb.0:139; X86-NEXT: movl {{[0-9]+}}(%esp), %eax140; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx141; X86-NEXT: andl %eax, %ecx142; X86-NEXT: jle .LBB5_2143; X86-NEXT: # %bb.1:144; X86-NEXT: movl %ecx, %eax145; X86-NEXT: .LBB5_2:146; X86-NEXT: retl147;148; X64-LABEL: and_i32_rr:149; X64: # %bb.0:150; X64-NEXT: movl %esi, %eax151; X64-NEXT: andl %edi, %eax152; X64-NEXT: cmovlel %edi, %eax153; X64-NEXT: retq154 %3 = and i32 %1, %0155 %4 = icmp slt i32 %3, 1156 %5 = select i1 %4, i32 %0, i32 %3157 ret i32 %5158}159 160define i64 @and_i64_ri(i64 %0, i64 %1) nounwind {161; X86-LABEL: and_i64_ri:162; X86: # %bb.0:163; X86-NEXT: pushl %esi164; X86-NEXT: movl {{[0-9]+}}(%esp), %eax165; X86-NEXT: movl {{[0-9]+}}(%esp), %edx166; X86-NEXT: movl %eax, %ecx167; X86-NEXT: andl $-17, %ecx168; X86-NEXT: cmpl $1, %ecx169; X86-NEXT: movl %edx, %esi170; X86-NEXT: sbbl $0, %esi171; X86-NEXT: jl .LBB6_2172; X86-NEXT: # %bb.1:173; X86-NEXT: movl %ecx, %eax174; X86-NEXT: .LBB6_2:175; X86-NEXT: popl %esi176; X86-NEXT: retl177;178; X64-LABEL: and_i64_ri:179; X64: # %bb.0:180; X64-NEXT: movq %rdi, %rax181; X64-NEXT: andq $-17, %rax182; X64-NEXT: cmovleq %rdi, %rax183; X64-NEXT: retq184 %3 = and i64 %0, -17185 %4 = icmp slt i64 %3, 1186 %5 = select i1 %4, i64 %0, i64 %3187 ret i64 %5188}189 190define i64 @and_i64_rr(i64 %0, i64 %1) nounwind {191; X86-LABEL: and_i64_rr:192; X86: # %bb.0:193; X86-NEXT: pushl %edi194; X86-NEXT: pushl %esi195; X86-NEXT: movl {{[0-9]+}}(%esp), %eax196; X86-NEXT: movl {{[0-9]+}}(%esp), %edx197; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx198; X86-NEXT: andl %edx, %ecx199; X86-NEXT: movl {{[0-9]+}}(%esp), %esi200; X86-NEXT: andl %eax, %esi201; X86-NEXT: cmpl $1, %esi202; X86-NEXT: movl %ecx, %edi203; X86-NEXT: sbbl $0, %edi204; X86-NEXT: jl .LBB7_2205; X86-NEXT: # %bb.1:206; X86-NEXT: movl %esi, %eax207; X86-NEXT: movl %ecx, %edx208; X86-NEXT: .LBB7_2:209; X86-NEXT: popl %esi210; X86-NEXT: popl %edi211; X86-NEXT: retl212;213; X64-LABEL: and_i64_rr:214; X64: # %bb.0:215; X64-NEXT: movq %rsi, %rax216; X64-NEXT: andq %rdi, %rax217; X64-NEXT: cmovleq %rdi, %rax218; X64-NEXT: retq219 %3 = and i64 %1, %0220 %4 = icmp slt i64 %3, 1221 %5 = select i1 %4, i64 %0, i64 %3222 ret i64 %5223}224