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1; RUN: llc < %s -mtriple=x86_64-apple-darwin -frame-pointer=all | FileCheck %s2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -frame-pointer=all | FileCheck --check-prefix=SSE %s3; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -frame-pointer=all | FileCheck --check-prefix=AVX %s4 5 6; Stackmap Header: no constants - 6 callsites7; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps8; CHECK-NEXT: __LLVM_StackMaps:9; Header10; CHECK-NEXT: .byte 311; CHECK-NEXT: .byte 012; CHECK-NEXT: .short 013; Num Functions14; CHECK-NEXT: .long 815; Num Constants16; CHECK-NEXT: .long 017; Num Callsites18; CHECK-NEXT: .long 819 20; Functions and stack size21; CHECK-NEXT: .quad _test22; CHECK-NEXT: .quad 823; CHECK-NEXT: .quad 124; CHECK-NEXT: .quad _property_access125; CHECK-NEXT: .quad 826; CHECK-NEXT: .quad 127; CHECK-NEXT: .quad _property_access228; CHECK-NEXT: .quad 2429; CHECK-NEXT: .quad 130; CHECK-NEXT: .quad _property_access331; CHECK-NEXT: .quad 2432; CHECK-NEXT: .quad 133; CHECK-NEXT: .quad _anyreg_test134; CHECK-NEXT: .quad 5635; CHECK-NEXT: .quad 136; CHECK-NEXT: .quad _anyreg_test237; CHECK-NEXT: .quad 838; CHECK-NEXT: .quad 139; CHECK-NEXT: .quad _patchpoint_spilldef40; CHECK-NEXT: .quad 5641; CHECK-NEXT: .quad 142; CHECK-NEXT: .quad _patchpoint_spillargs43; CHECK-NEXT: .quad 8844; CHECK-NEXT: .quad 145 46; No constants47 48; Callsites49; test50; CHECK-LABEL: .long L{{.*}}-_test51; CHECK-NEXT: .short 052; 3 locations53; CHECK-NEXT: .short 354; Loc 0: Register55; CHECK-NEXT: .byte 156; CHECK-NEXT: .byte 057; CHECK-NEXT: .short 458; CHECK-NEXT: .short {{[0-9]+}}59; CHECK-NEXT: .short 060; CHECK-NEXT: .long 061; Loc 1: Register62; CHECK-NEXT: .byte 163; CHECK-NEXT: .byte 064; CHECK-NEXT: .short 465; CHECK-NEXT: .short {{[0-9]+}}66; CHECK-NEXT: .short 067; CHECK-NEXT: .long 068; Loc 2: Constant 369; CHECK-NEXT: .byte 470; CHECK-NEXT: .byte 071; CHECK-NEXT: .short 872; CHECK-NEXT: .short 073; CHECK-NEXT: .short 074; CHECK-NEXT: .long 375define i64 @test() nounwind ssp uwtable {76entry:77 call anyregcc void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 0, i32 15, ptr null, i32 2, i32 1, i32 2, i64 3)78 ret i64 079}80 81; property access 1 - %obj is an anyreg call argument and should therefore be in a register82; CHECK-LABEL: .long L{{.*}}-_property_access183; CHECK-NEXT: .short 084; 2 locations85; CHECK-NEXT: .short 286; Loc 0: Register <-- this is the return register87; CHECK-NEXT: .byte 188; CHECK-NEXT: .byte 089; CHECK-NEXT: .short 890; CHECK-NEXT: .short {{[0-9]+}}91; CHECK-NEXT: .short 092; CHECK-NEXT: .long 093; Loc 1: Register94; CHECK-NEXT: .byte 195; CHECK-NEXT: .byte 096; CHECK-NEXT: .short 897; CHECK-NEXT: .short {{[0-9]+}}98; CHECK-NEXT: .short 099; CHECK-NEXT: .long 0100define i64 @property_access1(ptr %obj) nounwind ssp uwtable {101entry:102 %f = inttoptr i64 12297829382473034410 to ptr103 %ret = call anyregcc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 1, i32 15, ptr %f, i32 1, ptr %obj)104 ret i64 %ret105}106 107; property access 2 - %obj is an anyreg call argument and should therefore be in a register108; CHECK-LABEL: .long L{{.*}}-_property_access2109; CHECK-NEXT: .short 0110; 2 locations111; CHECK-NEXT: .short 2112; Loc 0: Register <-- this is the return register113; CHECK-NEXT: .byte 1114; CHECK-NEXT: .byte 0115; CHECK-NEXT: .short 8116; CHECK-NEXT: .short {{[0-9]+}}117; CHECK-NEXT: .short 0118; CHECK-NEXT: .long 0119; Loc 1: Register120; CHECK-NEXT: .byte 1121; CHECK-NEXT: .byte 0122; CHECK-NEXT: .short 8123; CHECK-NEXT: .short {{[0-9]+}}124; CHECK-NEXT: .short 0125; CHECK-NEXT: .long 0126define i64 @property_access2() nounwind ssp uwtable {127entry:128 %obj = alloca i64, align 8129 %f = inttoptr i64 12297829382473034410 to ptr130 %ret = call anyregcc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 2, i32 15, ptr %f, i32 1, ptr %obj)131 ret i64 %ret132}133 134; property access 3 - %obj is a frame index135; CHECK-LABEL: .long L{{.*}}-_property_access3136; CHECK-NEXT: .short 0137; 2 locations138; CHECK-NEXT: .short 2139; Loc 0: Register <-- this is the return register140; CHECK-NEXT: .byte 1141; CHECK-NEXT: .byte 0142; CHECK-NEXT: .short 8143; CHECK-NEXT: .short {{[0-9]+}}144; CHECK-NEXT: .short 0145; CHECK-NEXT: .long 0146; Loc 1: Direct RBP - ofs147; CHECK-NEXT: .byte 2148; CHECK-NEXT: .byte 0149; CHECK-NEXT: .short 8150; CHECK-NEXT: .short 6151; CHECK-NEXT: .short 0152; CHECK-NEXT: .long153define i64 @property_access3() nounwind ssp uwtable {154entry:155 %obj = alloca i64, align 8156 %f = inttoptr i64 12297829382473034410 to ptr157 %ret = call anyregcc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 3, i32 15, ptr %f, i32 0, ptr %obj)158 ret i64 %ret159}160 161; anyreg_test1162; CHECK-LABEL: .long L{{.*}}-_anyreg_test1163; CHECK-NEXT: .short 0164; 14 locations165; CHECK-NEXT: .short 14166; Loc 0: Register <-- this is the return register167; CHECK-NEXT: .byte 1168; CHECK-NEXT: .byte 0169; CHECK-NEXT: .short 8170; CHECK-NEXT: .short {{[0-9]+}}171; CHECK-NEXT: .short 0172; CHECK-NEXT: .long 0173; Loc 1: Register174; CHECK-NEXT: .byte 1175; CHECK-NEXT: .byte 0176; CHECK-NEXT: .short 8177; CHECK-NEXT: .short {{[0-9]+}}178; CHECK-NEXT: .short 0179; CHECK-NEXT: .long 0180; Loc 2: Register181; CHECK-NEXT: .byte 1182; CHECK-NEXT: .byte 0183; CHECK-NEXT: .short 8184; CHECK-NEXT: .short {{[0-9]+}}185; CHECK-NEXT: .short 0186; CHECK-NEXT: .long 0187; Loc 3: Register188; CHECK-NEXT: .byte 1189; CHECK-NEXT: .byte 0190; CHECK-NEXT: .short 8191; CHECK-NEXT: .short {{[0-9]+}}192; CHECK-NEXT: .short 0193; CHECK-NEXT: .long 0194; Loc 4: Register195; CHECK-NEXT: .byte 1196; CHECK-NEXT: .byte 0197; CHECK-NEXT: .short 8198; CHECK-NEXT: .short {{[0-9]+}}199; CHECK-NEXT: .short 0200; CHECK-NEXT: .long 0201; Loc 5: Register202; CHECK-NEXT: .byte 1203; CHECK-NEXT: .byte 0204; CHECK-NEXT: .short 8205; CHECK-NEXT: .short {{[0-9]+}}206; CHECK-NEXT: .short 0207; CHECK-NEXT: .long 0208; Loc 6: Register209; CHECK-NEXT: .byte 1210; CHECK-NEXT: .byte 0211; CHECK-NEXT: .short 8212; CHECK-NEXT: .short {{[0-9]+}}213; CHECK-NEXT: .short 0214; CHECK-NEXT: .long 0215; Loc 7: Register216; CHECK-NEXT: .byte 1217; CHECK-NEXT: .byte 0218; CHECK-NEXT: .short 8219; CHECK-NEXT: .short {{[0-9]+}}220; CHECK-NEXT: .short 0221; CHECK-NEXT: .long 0222; Loc 8: Register223; CHECK-NEXT: .byte 1224; CHECK-NEXT: .byte 0225; CHECK-NEXT: .short 8226; CHECK-NEXT: .short {{[0-9]+}}227; CHECK-NEXT: .short 0228; CHECK-NEXT: .long 0229; Loc 9: Register230; CHECK-NEXT: .byte 1231; CHECK-NEXT: .byte 0232; CHECK-NEXT: .short 8233; CHECK-NEXT: .short {{[0-9]+}}234; CHECK-NEXT: .short 0235; CHECK-NEXT: .long 0236; Loc 10: Register237; CHECK-NEXT: .byte 1238; CHECK-NEXT: .byte 0239; CHECK-NEXT: .short 8240; CHECK-NEXT: .short {{[0-9]+}}241; CHECK-NEXT: .short 0242; CHECK-NEXT: .long 0243; Loc 11: Register244; CHECK-NEXT: .byte 1245; CHECK-NEXT: .byte 0246; CHECK-NEXT: .short 8247; CHECK-NEXT: .short {{[0-9]+}}248; CHECK-NEXT: .short 0249; CHECK-NEXT: .long 0250; Loc 12: Register251; CHECK-NEXT: .byte 1252; CHECK-NEXT: .byte 0253; CHECK-NEXT: .short 8254; CHECK-NEXT: .short {{[0-9]+}}255; CHECK-NEXT: .short 0256; CHECK-NEXT: .long 0257; Loc 13: Register258; CHECK-NEXT: .byte 1259; CHECK-NEXT: .byte 0260; CHECK-NEXT: .short 8261; CHECK-NEXT: .short {{[0-9]+}}262; CHECK-NEXT: .short 0263; CHECK-NEXT: .long 0264define i64 @anyreg_test1(ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5, ptr %a6, ptr %a7, ptr %a8, ptr %a9, ptr %a10, ptr %a11, ptr %a12, ptr %a13) nounwind ssp uwtable {265entry:266 %f = inttoptr i64 12297829382473034410 to ptr267 %ret = call anyregcc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 4, i32 15, ptr %f, i32 13, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5, ptr %a6, ptr %a7, ptr %a8, ptr %a9, ptr %a10, ptr %a11, ptr %a12, ptr %a13)268 ret i64 %ret269}270 271; anyreg_test2272; CHECK-LABEL: .long L{{.*}}-_anyreg_test2273; CHECK-NEXT: .short 0274; 14 locations275; CHECK-NEXT: .short 14276; Loc 0: Register <-- this is the return register277; CHECK-NEXT: .byte 1278; CHECK-NEXT: .byte 0279; CHECK-NEXT: .short 8280; CHECK-NEXT: .short {{[0-9]+}}281; CHECK-NEXT: .short 0282; CHECK-NEXT: .long 0283; Loc 1: Register284; CHECK-NEXT: .byte 1285; CHECK-NEXT: .byte 0286; CHECK-NEXT: .short 8287; CHECK-NEXT: .short {{[0-9]+}}288; CHECK-NEXT: .short 0289; CHECK-NEXT: .long 0290; Loc 2: Register291; CHECK-NEXT: .byte 1292; CHECK-NEXT: .byte 0293; CHECK-NEXT: .short 8294; CHECK-NEXT: .short {{[0-9]+}}295; CHECK-NEXT: .short 0296; CHECK-NEXT: .long 0297; Loc 3: Register298; CHECK-NEXT: .byte 1299; CHECK-NEXT: .byte 0300; CHECK-NEXT: .short 8301; CHECK-NEXT: .short {{[0-9]+}}302; CHECK-NEXT: .short 0303; CHECK-NEXT: .long 0304; Loc 4: Register305; CHECK-NEXT: .byte 1306; CHECK-NEXT: .byte 0307; CHECK-NEXT: .short 8308; CHECK-NEXT: .short {{[0-9]+}}309; CHECK-NEXT: .short 0310; CHECK-NEXT: .long 0311; Loc 5: Register312; CHECK-NEXT: .byte 1313; CHECK-NEXT: .byte 0314; CHECK-NEXT: .short 8315; CHECK-NEXT: .short {{[0-9]+}}316; CHECK-NEXT: .short 0317; CHECK-NEXT: .long 0318; Loc 6: Register319; CHECK-NEXT: .byte 1320; CHECK-NEXT: .byte 0321; CHECK-NEXT: .short 8322; CHECK-NEXT: .short {{[0-9]+}}323; CHECK-NEXT: .short 0324; CHECK-NEXT: .long 0325; Loc 7: Register326; CHECK-NEXT: .byte 1327; CHECK-NEXT: .byte 0328; CHECK-NEXT: .short 8329; CHECK-NEXT: .short {{[0-9]+}}330; CHECK-NEXT: .short 0331; CHECK-NEXT: .long 0332; Loc 8: Register333; CHECK-NEXT: .byte 1334; CHECK-NEXT: .byte 0335; CHECK-NEXT: .short 8336; CHECK-NEXT: .short {{[0-9]+}}337; CHECK-NEXT: .short 0338; CHECK-NEXT: .long 0339; Loc 9: Argument, still on stack340; CHECK-NEXT: .byte 3341; CHECK-NEXT: .byte 0342; CHECK-NEXT: .short 8343; CHECK-NEXT: .short 6344; CHECK-NEXT: .short 0345; CHECK-NEXT: .long346; Loc 10: Argument, still on stack347; CHECK-NEXT: .byte 3348; CHECK-NEXT: .byte 0349; CHECK-NEXT: .short 8350; CHECK-NEXT: .short 6351; CHECK-NEXT: .short 0352; CHECK-NEXT: .long353; Loc 11: Argument, still on stack354; CHECK-NEXT: .byte 3355; CHECK-NEXT: .byte 0356; CHECK-NEXT: .short 8357; CHECK-NEXT: .short 6358; CHECK-NEXT: .short 0359; CHECK-NEXT: .long360; Loc 12: Argument, still on stack361; CHECK-NEXT: .byte 3362; CHECK-NEXT: .byte 0363; CHECK-NEXT: .short 8364; CHECK-NEXT: .short 6365; CHECK-NEXT: .short 0366; CHECK-NEXT: .long367; Loc 13: Argument, still on stack368; CHECK-NEXT: .byte 3369; CHECK-NEXT: .byte 0370; CHECK-NEXT: .short 8371; CHECK-NEXT: .short 6372; CHECK-NEXT: .short 0373; CHECK-NEXT: .long374define i64 @anyreg_test2(ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5, ptr %a6, ptr %a7, ptr %a8, ptr %a9, ptr %a10, ptr %a11, ptr %a12, ptr %a13) nounwind ssp uwtable {375entry:376 %f = inttoptr i64 12297829382473034410 to ptr377 %ret = call anyregcc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 15, ptr %f, i32 8, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5, ptr %a6, ptr %a7, ptr %a8, ptr %a9, ptr %a10, ptr %a11, ptr %a12, ptr %a13)378 ret i64 %ret379}380 381; Test spilling the return value of an anyregcc call.382;383; <rdar://problem/15432754> [JS] Assertion: "Folded a def to a non-store!"384;385; CHECK-LABEL: .long L{{.*}}-_patchpoint_spilldef386; CHECK-NEXT: .short 0387; CHECK-NEXT: .short 3388; Loc 0: Register (some register that will be spilled to the stack)389; CHECK-NEXT: .byte 1390; CHECK-NEXT: .byte 0391; CHECK-NEXT: .short 8392; CHECK-NEXT: .short {{[0-9]+}}393; CHECK-NEXT: .short 0394; CHECK-NEXT: .long 0395; Loc 1: Register RDI396; CHECK-NEXT: .byte 1397; CHECK-NEXT: .byte 0398; CHECK-NEXT: .short 8399; CHECK-NEXT: .short 5400; CHECK-NEXT: .short 0401; CHECK-NEXT: .long 0402; Loc 1: Register RSI403; CHECK-NEXT: .byte 1404; CHECK-NEXT: .byte 0405; CHECK-NEXT: .short 8406; CHECK-NEXT: .short 4407; CHECK-NEXT: .short 0408; CHECK-NEXT: .long 0409define i64 @patchpoint_spilldef(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {410entry:411 %result = tail call anyregcc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 12, i32 15, ptr inttoptr (i64 0 to ptr), i32 2, i64 %p1, i64 %p2)412 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind413 ret i64 %result414}415 416; Test spilling the arguments of an anyregcc call.417;418; <rdar://problem/15487687> [JS] AnyRegCC argument ends up being spilled419;420; CHECK-LABEL: .long L{{.*}}-_patchpoint_spillargs421; CHECK-NEXT: .short 0422; CHECK-NEXT: .short 5423; Loc 0: Return a register424; CHECK-NEXT: .byte 1425; CHECK-NEXT: .byte 0426; CHECK-NEXT: .short 8427; CHECK-NEXT: .short {{[0-9]+}}428; CHECK-NEXT: .short 0429; CHECK-NEXT: .long 0430; Loc 1: Arg0 in a Register431; CHECK-NEXT: .byte 1432; CHECK-NEXT: .byte 0433; CHECK-NEXT: .short 8434; CHECK-NEXT: .short {{[0-9]+}}435; CHECK-NEXT: .short 0436; CHECK-NEXT: .long 0437; Loc 2: Arg1 in a Register438; CHECK-NEXT: .byte 1439; CHECK-NEXT: .byte 0440; CHECK-NEXT: .short 8441; CHECK-NEXT: .short {{[0-9]+}}442; CHECK-NEXT: .short 0443; CHECK-NEXT: .long 0444; Loc 3: Arg2 spilled to RBP +445; CHECK-NEXT: .byte 3446; CHECK-NEXT: .byte 0447; CHECK-NEXT: .short 8448; CHECK-NEXT: .short 6449; CHECK-NEXT: .short 0450; CHECK-NEXT: .long451; Loc 4: Arg3 spilled to RBP +452; CHECK-NEXT: .byte 3453; CHECK-NEXT: .byte 0454; CHECK-NEXT: .short 8455; CHECK-NEXT: .short 6456; CHECK-NEXT: .short 0457; CHECK-NEXT: .long458define i64 @patchpoint_spillargs(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {459entry:460 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind461 %result = tail call anyregcc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 13, i32 15, ptr inttoptr (i64 0 to ptr), i32 2, i64 %p1, i64 %p2, i64 %p3, i64 %p4)462 ret i64 %result463}464 465; Make sure all regs are spilled466define anyregcc void @anyregcc1() {467entry:468;SSE-LABEL: anyregcc1469;SSE: pushq %rbp470;SSE: pushq %rax471;SSE: pushq %r15472;SSE: pushq %r14473;SSE: pushq %r13474;SSE: pushq %r12475;SSE: pushq %r11476;SSE: pushq %r10477;SSE: pushq %r9478;SSE: pushq %r8479;SSE: pushq %rdi480;SSE: pushq %rsi481;SSE: pushq %rdx482;SSE: pushq %rcx483;SSE: pushq %rbx484;SSE: movaps %xmm15485;SSE-NEXT: movaps %xmm14486;SSE-NEXT: movaps %xmm13487;SSE-NEXT: movaps %xmm12488;SSE-NEXT: movaps %xmm11489;SSE-NEXT: movaps %xmm10490;SSE-NEXT: movaps %xmm9491;SSE-NEXT: movaps %xmm8492;SSE-NEXT: movaps %xmm7493;SSE-NEXT: movaps %xmm6494;SSE-NEXT: movaps %xmm5495;SSE-NEXT: movaps %xmm4496;SSE-NEXT: movaps %xmm3497;SSE-NEXT: movaps %xmm2498;SSE-NEXT: movaps %xmm1499;SSE-NEXT: movaps %xmm0500;AVX-LABEL:anyregcc1501;AVX: pushq %rbp502;AVX: pushq %rax503;AVX: pushq %r15504;AVX: pushq %r14505;AVX: pushq %r13506;AVX: pushq %r12507;AVX: pushq %r11508;AVX: pushq %r10509;AVX: pushq %r9510;AVX: pushq %r8511;AVX: pushq %rdi512;AVX: pushq %rsi513;AVX: pushq %rdx514;AVX: pushq %rcx515;AVX: pushq %rbx516;AVX: vmovups %ymm15517;AVX-NEXT: vmovups %ymm14518;AVX-NEXT: vmovups %ymm13519;AVX-NEXT: vmovups %ymm12520;AVX-NEXT: vmovups %ymm11521;AVX-NEXT: vmovups %ymm10522;AVX-NEXT: vmovups %ymm9523;AVX-NEXT: vmovups %ymm8524;AVX-NEXT: vmovups %ymm7525;AVX-NEXT: vmovups %ymm6526;AVX-NEXT: vmovups %ymm5527;AVX-NEXT: vmovups %ymm4528;AVX-NEXT: vmovups %ymm3529;AVX-NEXT: vmovups %ymm2530;AVX-NEXT: vmovups %ymm1531;AVX-NEXT: vmovups %ymm0532 call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{rbp},~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15}"()533 ret void534}535 536; Make sure we don't spill any XMMs/YMMs537declare anyregcc void @foo()538define void @anyregcc2() {539entry:540;SSE-LABEL: anyregcc2541;SSE-NOT: movaps %xmm542;AVX-LABEL: anyregcc2543;AVX-NOT: vmovups %ymm544 %a0 = call <2 x double> asm sideeffect "", "={xmm0}"() nounwind545 %a1 = call <2 x double> asm sideeffect "", "={xmm1}"() nounwind546 %a2 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind547 %a3 = call <2 x double> asm sideeffect "", "={xmm3}"() nounwind548 %a4 = call <2 x double> asm sideeffect "", "={xmm4}"() nounwind549 %a5 = call <2 x double> asm sideeffect "", "={xmm5}"() nounwind550 %a6 = call <2 x double> asm sideeffect "", "={xmm6}"() nounwind551 %a7 = call <2 x double> asm sideeffect "", "={xmm7}"() nounwind552 %a8 = call <2 x double> asm sideeffect "", "={xmm8}"() nounwind553 %a9 = call <2 x double> asm sideeffect "", "={xmm9}"() nounwind554 %a10 = call <2 x double> asm sideeffect "", "={xmm10}"() nounwind555 %a11 = call <2 x double> asm sideeffect "", "={xmm11}"() nounwind556 %a12 = call <2 x double> asm sideeffect "", "={xmm12}"() nounwind557 %a13 = call <2 x double> asm sideeffect "", "={xmm13}"() nounwind558 %a14 = call <2 x double> asm sideeffect "", "={xmm14}"() nounwind559 %a15 = call <2 x double> asm sideeffect "", "={xmm15}"() nounwind560 call anyregcc void @foo()561 call void asm sideeffect "", "{xmm0},{xmm1},{xmm2},{xmm3},{xmm4},{xmm5},{xmm6},{xmm7},{xmm8},{xmm9},{xmm10},{xmm11},{xmm12},{xmm13},{xmm14},{xmm15}"(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, <2 x double> %a3, <2 x double> %a4, <2 x double> %a5, <2 x double> %a6, <2 x double> %a7, <2 x double> %a8, <2 x double> %a9, <2 x double> %a10, <2 x double> %a11, <2 x double> %a12, <2 x double> %a13, <2 x double> %a14, <2 x double> %a15)562 ret void563}564 565declare void @llvm.experimental.patchpoint.void(i64, i32, ptr, i32, ...)566declare i64 @llvm.experimental.patchpoint.i64(i64, i32, ptr, i32, ...)567