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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=x86_64 -run-pass x86-flags-copy-lowering -mattr=+ndd -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD %s3# RUN: llc -mtriple=x86_64 -run-pass x86-flags-copy-lowering -mattr=+ndd,+nf -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD-NF %s4# RUN: llc -mtriple=x86_64 -run-pass x86-flags-copy-lowering -mattr=+ndd,+nf -x86-enable-apx-for-relocation=true -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD-NF %s5 6# Lower various interesting copy patterns of EFLAGS without using LAHF/SAHF.7 8...9---10name: test_adc11body: |12 bb.0:13 liveins: $rdi, $rsi14 15 ; CHECK-LABEL: name: test_adc16 ; CHECK: liveins: $rdi, $rsi17 ; CHECK-NEXT: {{ $}}18 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi19 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi20 ; CHECK-NEXT: [[ADD64rr_ND:%[0-9]+]]:gr64 = ADD64rr_ND [[COPY]], [[COPY1]], implicit-def $eflags21 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags22 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags23 ; CHECK-NEXT: dead [[ADD8ri_ND:%[0-9]+]]:gr8 = ADD8ri_ND [[SETCCr]], 255, implicit-def $eflags24 ; CHECK-NEXT: [[ADC64ri32_ND:%[0-9]+]]:gr64 = ADC64ri32_ND [[ADD64rr_ND]], 42, implicit-def $eflags, implicit killed $eflags25 ; CHECK-NEXT: [[ADC64ri32_ND1:%[0-9]+]]:gr64 = ADC64ri32_ND [[ADC64ri32_ND]], 42, implicit-def $eflags, implicit $eflags26 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[ADC64ri32_ND1]]27 ; CHECK-NEXT: RET 028 %0:gr64 = COPY $rdi29 %1:gr64 = COPY $rsi30 %2:gr64 = ADD64rr_ND %0, %1, implicit-def $eflags31 %3:gr64 = COPY $eflags32 33 INLINEASM &nop, 1, 12, implicit-def dead $eflags34 35 $eflags = COPY %336 %4:gr64 = ADC64ri32_ND %2:gr64, 42, implicit-def $eflags, implicit $eflags37 %5:gr64 = ADC64ri32_ND %4:gr64, 42, implicit-def $eflags, implicit $eflags38 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %539 40 RET 041 42...43---44name: test_sbb45body: |46 bb.0:47 liveins: $rdi, $rsi48 49 ; CHECK-LABEL: name: test_sbb50 ; CHECK: liveins: $rdi, $rsi51 ; CHECK-NEXT: {{ $}}52 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi53 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi54 ; CHECK-NEXT: [[SUB64rr_ND:%[0-9]+]]:gr64 = SUB64rr_ND [[COPY]], [[COPY1]], implicit-def $eflags55 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags56 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags57 ; CHECK-NEXT: dead [[ADD8ri_ND:%[0-9]+]]:gr8 = ADD8ri_ND [[SETCCr]], 255, implicit-def $eflags58 ; CHECK-NEXT: [[SBB64ri32_ND:%[0-9]+]]:gr64 = SBB64ri32_ND [[SUB64rr_ND]], 42, implicit-def $eflags, implicit killed $eflags59 ; CHECK-NEXT: [[SBB64ri32_ND1:%[0-9]+]]:gr64 = SBB64ri32_ND [[SBB64ri32_ND]], 42, implicit-def dead $eflags, implicit killed $eflags60 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[SBB64ri32_ND1]]61 ; CHECK-NEXT: RET 062 %0:gr64 = COPY $rdi63 %1:gr64 = COPY $rsi64 %2:gr64 = SUB64rr_ND %0, %1, implicit-def $eflags65 %3:gr64 = COPY killed $eflags66 67 INLINEASM &nop, 1, 12, implicit-def dead $eflags68 69 $eflags = COPY %370 %4:gr64 = SBB64ri32_ND %2:gr64, 42, implicit-def $eflags, implicit killed $eflags71 %5:gr64 = SBB64ri32_ND %4:gr64, 42, implicit-def dead $eflags, implicit killed $eflags72 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %573 74 RET 075 76...77---78name: test_rcl79body: |80 bb.0:81 liveins: $rdi, $rsi82 83 ; CHECK-LABEL: name: test_rcl84 ; CHECK: liveins: $rdi, $rsi85 ; CHECK-NEXT: {{ $}}86 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi87 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi88 ; CHECK-NEXT: [[ADD64rr_ND:%[0-9]+]]:gr64 = ADD64rr_ND [[COPY]], [[COPY1]], implicit-def $eflags89 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags90 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags91 ; CHECK-NEXT: dead [[ADD8ri_ND:%[0-9]+]]:gr8 = ADD8ri_ND [[SETCCr]], 255, implicit-def $eflags92 ; CHECK-NEXT: [[RCL64r1_ND:%[0-9]+]]:gr64 = RCL64r1_ND [[ADD64rr_ND]], implicit-def $eflags, implicit killed $eflags93 ; CHECK-NEXT: [[RCL64r1_ND1:%[0-9]+]]:gr64 = RCL64r1_ND [[RCL64r1_ND]], implicit-def $eflags, implicit $eflags94 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[RCL64r1_ND1]]95 ; CHECK-NEXT: RET 096 %0:gr64 = COPY $rdi97 %1:gr64 = COPY $rsi98 %2:gr64 = ADD64rr_ND %0, %1, implicit-def $eflags99 %3:gr64 = COPY $eflags100 101 INLINEASM &nop, 1, 12, implicit-def dead $eflags102 103 $eflags = COPY %3104 %4:gr64 = RCL64r1_ND %2:gr64, implicit-def $eflags, implicit $eflags105 %5:gr64 = RCL64r1_ND %4:gr64, implicit-def $eflags, implicit $eflags106 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5107 108 RET 0109 110...111---112name: test_rcr113body: |114 bb.0:115 liveins: $rdi, $rsi116 117 ; CHECK-LABEL: name: test_rcr118 ; CHECK: liveins: $rdi, $rsi119 ; CHECK-NEXT: {{ $}}120 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi121 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi122 ; CHECK-NEXT: [[ADD64rr_ND:%[0-9]+]]:gr64 = ADD64rr_ND [[COPY]], [[COPY1]], implicit-def $eflags123 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags124 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags125 ; CHECK-NEXT: dead [[ADD8ri_ND:%[0-9]+]]:gr8 = ADD8ri_ND [[SETCCr]], 255, implicit-def $eflags126 ; CHECK-NEXT: [[RCR64r1_ND:%[0-9]+]]:gr64 = RCR64r1_ND [[ADD64rr_ND]], implicit-def $eflags, implicit killed $eflags127 ; CHECK-NEXT: [[RCR64r1_ND1:%[0-9]+]]:gr64 = RCR64r1_ND [[RCR64r1_ND]], implicit-def $eflags, implicit $eflags128 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[RCR64r1_ND1]]129 ; CHECK-NEXT: RET 0130 %0:gr64 = COPY $rdi131 %1:gr64 = COPY $rsi132 %2:gr64 = ADD64rr_ND %0, %1, implicit-def $eflags133 %3:gr64 = COPY $eflags134 135 INLINEASM &nop, 1, 12, implicit-def dead $eflags136 137 $eflags = COPY %3138 %4:gr64 = RCR64r1_ND %2:gr64, implicit-def $eflags, implicit $eflags139 %5:gr64 = RCR64r1_ND %4:gr64, implicit-def $eflags, implicit $eflags140 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5141 142 RET 0143 144...145---146name: test_cmov147body: |148 bb.0:149 liveins: $rdi, $rsi150 151 ; CHECK-LABEL: name: test_cmov152 ; CHECK: liveins: $rdi, $rsi153 ; CHECK-NEXT: {{ $}}154 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi155 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi156 ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags157 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags158 ; CHECK-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags159 ; CHECK-NEXT: [[SETCCr2:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags160 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags161 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags162 ; CHECK-NEXT: [[CMOV64rr_ND:%[0-9]+]]:gr64 = CMOV64rr_ND [[COPY]], [[COPY1]], 5, implicit killed $eflags163 ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags164 ; CHECK-NEXT: [[CMOV64rr_ND1:%[0-9]+]]:gr64 = CMOV64rr_ND [[COPY]], [[COPY1]], 5, implicit killed $eflags165 ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags166 ; CHECK-NEXT: [[CMOV64rr_ND2:%[0-9]+]]:gr64 = CMOV64rr_ND [[COPY]], [[COPY1]], 5, implicit killed $eflags167 ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags168 ; CHECK-NEXT: [[CMOV64rr_ND3:%[0-9]+]]:gr64 = CMOV64rr_ND [[COPY]], [[COPY1]], 4, implicit killed $eflags169 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr_ND]]170 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr_ND1]]171 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr_ND2]]172 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr_ND3]]173 ; CHECK-NEXT: RET 0174 %0:gr64 = COPY $rdi175 %1:gr64 = COPY $rsi176 CMP64rr %0, %1, implicit-def $eflags177 %2:gr64 = COPY $eflags178 179 INLINEASM &nop, 1, 12, implicit-def dead $eflags180 181 $eflags = COPY %2182 %3:gr64 = CMOV64rr_ND %0, %1, 7, implicit $eflags183 %4:gr64 = CMOV64rr_ND %0, %1, 2, implicit $eflags184 %5:gr64 = CMOV64rr_ND %0, %1, 4, implicit $eflags185 %6:gr64 = CMOV64rr_ND %0, %1, 5, implicit killed $eflags186 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %3187 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4188 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5189 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6190 191 RET 0192...193---194name: test_cfcmov195body: |196 bb.0:197 liveins: $rdi, $rsi198 199 ; CHECK-LABEL: name: test_cfcmov200 ; CHECK: liveins: $rdi, $rsi201 ; CHECK-NEXT: {{ $}}202 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi203 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi204 ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags205 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags206 ; CHECK-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags207 ; CHECK-NEXT: [[SETCCr2:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags208 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags209 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags210 ; CHECK-NEXT: [[CFCMOV64rr:%[0-9]+]]:gr64 = CFCMOV64rr [[COPY1]], 5, implicit killed $eflags211 ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags212 ; CHECK-NEXT: [[CFCMOV64rr1:%[0-9]+]]:gr64 = CFCMOV64rr [[COPY1]], 5, implicit killed $eflags213 ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags214 ; CHECK-NEXT: [[CFCMOV64rr_ND:%[0-9]+]]:gr64 = CFCMOV64rr_ND [[COPY]], [[COPY1]], 5, implicit killed $eflags215 ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags216 ; CHECK-NEXT: [[CFCMOV64rr_ND1:%[0-9]+]]:gr64 = CFCMOV64rr_ND [[COPY]], [[COPY1]], 4, implicit killed $eflags217 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CFCMOV64rr]]218 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CFCMOV64rr1]]219 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CFCMOV64rr_ND]]220 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CFCMOV64rr_ND1]]221 ; CHECK-NEXT: RET 0222 %0:gr64 = COPY $rdi223 %1:gr64 = COPY $rsi224 CMP64rr %0, %1, implicit-def $eflags225 %2:gr64 = COPY $eflags226 227 INLINEASM &nop, 1, 12, implicit-def dead $eflags228 229 $eflags = COPY %2230 %3:gr64 = CFCMOV64rr %1, 7, implicit $eflags231 %4:gr64 = CFCMOV64rr %1, 2, implicit $eflags232 %5:gr64 = CFCMOV64rr_ND %0, %1, 4, implicit $eflags233 %6:gr64 = CFCMOV64rr_ND %0, %1, 5, implicit killed $eflags234 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %3235 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4236 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5237 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6238 239 RET 0240...241---242name: test_ccmp243body: |244 bb.0:245 liveins: $edi246 247 ; NDD-LABEL: name: test_ccmp248 ; NDD: liveins: $edi249 ; NDD-NEXT: {{ $}}250 ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax251 ; NDD-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 1, implicit $eflags252 ; NDD-NEXT: [[ADD32rr:%[0-9]+]]:gr32 = ADD32rr $edi, $edi, implicit-def dead $eflags253 ; NDD-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags254 ; NDD-NEXT: CCMP32rr [[ADD32rr]], [[ADD32rr]], 0, 5, implicit-def $eflags, implicit killed $eflags255 ; NDD-NEXT: RET 0, $al256 ;257 ; NDD-NF-LABEL: name: test_ccmp258 ; NDD-NF: liveins: $edi259 ; NDD-NF-NEXT: {{ $}}260 ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax261 ; NDD-NF-NEXT: [[ADD32rr_NF:%[0-9]+]]:gr32 = ADD32rr_NF $edi, $edi262 ; NDD-NF-NEXT: CCMP32rr [[ADD32rr_NF]], [[ADD32rr_NF]], 0, 1, implicit-def $eflags, implicit $eflags263 ; NDD-NF-NEXT: RET 0, $al264 MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax265 %1:gr64 = COPY $eflags266 %2:gr32 = ADD32rr $edi, $edi, implicit-def dead $eflags267 $eflags = COPY %1268 CCMP32rr %2, %2, 0, 1, implicit-def $eflags, implicit $eflags269 RET 0, $al270 271...272---273name: test_ctest274body: |275 bb.0:276 liveins: $edi277 278 ; NDD-LABEL: name: test_ctest279 ; NDD: liveins: $edi280 ; NDD-NEXT: {{ $}}281 ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax282 ; NDD-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 1, implicit $eflags283 ; NDD-NEXT: [[ADD32rr:%[0-9]+]]:gr32 = ADD32rr $edi, $edi, implicit-def dead $eflags284 ; NDD-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags285 ; NDD-NEXT: CTEST32rr [[ADD32rr]], [[ADD32rr]], 0, 5, implicit-def $eflags, implicit killed $eflags286 ; NDD-NEXT: RET 0, $al287 ;288 ; NDD-NF-LABEL: name: test_ctest289 ; NDD-NF: liveins: $edi290 ; NDD-NF-NEXT: {{ $}}291 ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax292 ; NDD-NF-NEXT: [[ADD32rr_NF:%[0-9]+]]:gr32 = ADD32rr_NF $edi, $edi293 ; NDD-NF-NEXT: CTEST32rr [[ADD32rr_NF]], [[ADD32rr_NF]], 0, 1, implicit-def $eflags, implicit $eflags294 ; NDD-NF-NEXT: RET 0, $al295 MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax296 %1:gr64 = COPY $eflags297 %2:gr32 = ADD32rr $edi, $edi, implicit-def dead $eflags298 $eflags = COPY %1299 CTEST32rr %2, %2, 0, 1, implicit-def $eflags, implicit $eflags300 RET 0, $al301 302...303---304name: test_evitable_clobber305body: |306 bb.0:307 liveins: $edi308 309 ; NDD-LABEL: name: test_evitable_clobber310 ; NDD: liveins: $edi311 ; NDD-NEXT: {{ $}}312 ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax313 ; NDD-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags314 ; NDD-NEXT: [[ADD32rr_ND:%[0-9]+]]:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags315 ; NDD-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags316 ; NDD-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_ND]], 5, implicit killed $eflags317 ; NDD-NEXT: RET 0, $al318 ;319 ; NDD-NF-LABEL: name: test_evitable_clobber320 ; NDD-NF: liveins: $edi321 ; NDD-NF-NEXT: {{ $}}322 ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax323 ; NDD-NF-NEXT: [[ADD32rr_NF_ND:%[0-9]+]]:gr32 = ADD32rr_NF_ND $edi, $edi324 ; NDD-NF-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_NF_ND]], 7, implicit $eflags325 ; NDD-NF-NEXT: RET 0, $al326 MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax327 %1:gr64 = COPY $eflags328 %2:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags329 $eflags = COPY %1330 $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags331 RET 0, $al332 333...334---335name: test_inevitable_clobber336body: |337 bb.0:338 liveins: $edi339 340 ; CHECK-LABEL: name: test_inevitable_clobber341 ; CHECK: liveins: $edi342 ; CHECK-NEXT: {{ $}}343 ; CHECK-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax344 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags345 ; CHECK-NEXT: [[ADC32rr_ND:%[0-9]+]]:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags346 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags347 ; CHECK-NEXT: $eax = CMOV32rr_ND $edi, [[ADC32rr_ND]], 5, implicit killed $eflags348 ; CHECK-NEXT: RET 0, $al349 MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax350 %1:gr64 = COPY $eflags351 %2:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags352 $eflags = COPY %1353 $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags354 RET 0, $al355...356---357name: test_evitable_clobber_multiple_uses358body: |359 bb.0:360 liveins: $edi361 362 ; NDD-LABEL: name: test_evitable_clobber_multiple_uses363 ; NDD: liveins: $edi364 ; NDD-NEXT: {{ $}}365 ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax366 ; NDD-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags367 ; NDD-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 9, implicit $eflags368 ; NDD-NEXT: [[ADD32rr_ND:%[0-9]+]]:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags369 ; NDD-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags370 ; NDD-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_ND]], 5, implicit killed $eflags371 ; NDD-NEXT: [[ADD32rr_ND1:%[0-9]+]]:gr32 = ADD32rr_ND $edi, $eax, implicit-def dead $eflags372 ; NDD-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags373 ; NDD-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_ND1]], 5, implicit killed $eflags374 ; NDD-NEXT: RET 0, $al375 ;376 ; NDD-NF-LABEL: name: test_evitable_clobber_multiple_uses377 ; NDD-NF: liveins: $edi378 ; NDD-NF-NEXT: {{ $}}379 ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax380 ; NDD-NF-NEXT: [[ADD32rr_NF_ND:%[0-9]+]]:gr32 = ADD32rr_NF_ND $edi, $edi381 ; NDD-NF-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_NF_ND]], 7, implicit $eflags382 ; NDD-NF-NEXT: [[ADD32rr_NF_ND1:%[0-9]+]]:gr32 = ADD32rr_NF_ND $edi, $eax383 ; NDD-NF-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_NF_ND1]], 9, implicit $eflags384 ; NDD-NF-NEXT: RET 0, $al385 MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax386 %1:gr64 = COPY $eflags387 %2:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags388 $eflags = COPY %1389 $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags390 %3:gr32 = ADD32rr_ND $edi, $eax, implicit-def dead $eflags391 $eflags = COPY %1392 $eax = CMOV32rr_ND $edi, %3, 9, implicit $eflags393 RET 0, $al394 395...396---397name: test_mixed_clobber398body: |399 bb.0:400 liveins: $edi401 402 ; NDD-LABEL: name: test_mixed_clobber403 ; NDD: liveins: $edi404 ; NDD-NEXT: {{ $}}405 ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax406 ; NDD-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags407 ; NDD-NEXT: [[ADC32rr_ND:%[0-9]+]]:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags408 ; NDD-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags409 ; NDD-NEXT: $eax = CMOV32rr_ND $edi, [[ADC32rr_ND]], 5, implicit killed $eflags410 ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax411 ; NDD-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 1, implicit $eflags412 ; NDD-NEXT: [[ADD32rr_ND:%[0-9]+]]:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags413 ; NDD-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags414 ; NDD-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_ND]], 5, implicit killed $eflags415 ; NDD-NEXT: RET 0, $al416 ;417 ; NDD-NF-LABEL: name: test_mixed_clobber418 ; NDD-NF: liveins: $edi419 ; NDD-NF-NEXT: {{ $}}420 ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax421 ; NDD-NF-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags422 ; NDD-NF-NEXT: [[ADC32rr_ND:%[0-9]+]]:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags423 ; NDD-NF-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags424 ; NDD-NF-NEXT: $eax = CMOV32rr_ND $edi, [[ADC32rr_ND]], 5, implicit killed $eflags425 ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax426 ; NDD-NF-NEXT: [[ADD32rr_NF_ND:%[0-9]+]]:gr32 = ADD32rr_NF_ND $edi, $edi427 ; NDD-NF-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_NF_ND]], 1, implicit $eflags428 ; NDD-NF-NEXT: RET 0, $al429 MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax430 %1:gr64 = COPY $eflags431 %2:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags432 $eflags = COPY %1433 $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags434 MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax435 %3:gr64 = COPY $eflags436 %4:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags437 $eflags = COPY %3438 $eax = CMOV32rr_ND $edi, %4, 1, implicit $eflags439 RET 0, $al440...441---442name: test_evitable_clobber_crossbb443body: |444 ; NDD-LABEL: name: test_evitable_clobber_crossbb445 ; NDD: bb.0:446 ; NDD-NEXT: successors: %bb.1(0x80000000)447 ; NDD-NEXT: liveins: $edi448 ; NDD-NEXT: {{ $}}449 ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax450 ; NDD-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags451 ; NDD-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags452 ; NDD-NEXT: [[ADD32rr_ND:%[0-9]+]]:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags453 ; NDD-NEXT: JCC_1 %bb.1, 4, implicit $eflags454 ; NDD-NEXT: RET 0, $al455 ; NDD-NEXT: {{ $}}456 ; NDD-NEXT: bb.1:457 ; NDD-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags458 ; NDD-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_ND]], 5, implicit killed $eflags459 ; NDD-NEXT: dead [[ADD8ri_ND:%[0-9]+]]:gr8 = ADD8ri_ND [[SETCCr1]], 255, implicit-def $eflags460 ; NDD-NEXT: $eax = ADC32rr_ND $eax, $edi, implicit-def dead $eflags, implicit killed $eflags461 ; NDD-NEXT: RET 0, $al462 ;463 ; NDD-NF-LABEL: name: test_evitable_clobber_crossbb464 ; NDD-NF: bb.0:465 ; NDD-NF-NEXT: successors: %bb.1(0x80000000)466 ; NDD-NF-NEXT: liveins: $edi467 ; NDD-NF-NEXT: {{ $}}468 ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax469 ; NDD-NF-NEXT: [[ADD32rr_NF_ND:%[0-9]+]]:gr32 = ADD32rr_NF_ND $edi, $edi470 ; NDD-NF-NEXT: JCC_1 %bb.1, 4, implicit $eflags471 ; NDD-NF-NEXT: RET 0, $al472 ; NDD-NF-NEXT: {{ $}}473 ; NDD-NF-NEXT: bb.1:474 ; NDD-NF-NEXT: liveins: $eflags475 ; NDD-NF-NEXT: {{ $}}476 ; NDD-NF-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_NF_ND]], 7, implicit $eflags477 ; NDD-NF-NEXT: $eax = ADC32rr_ND $eax, $edi, implicit-def dead $eflags, implicit $eflags478 ; NDD-NF-NEXT: RET 0, $al479 bb.0:480 liveins: $edi481 482 MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax483 %1:gr64 = COPY $eflags484 %2:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags485 JCC_1 %bb.1, 4, implicit $eflags486 RET 0, $al487 488 bb.1:489 $eflags = COPY %1490 $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags491 $eax = ADC32rr_ND $eax, $edi, implicit-def dead $eflags, implicit $eflags492 RET 0, $al493...494---495name: test_inevitable_clobber_crossbb496body: |497 ; CHECK-LABEL: name: test_inevitable_clobber_crossbb498 ; CHECK: bb.0:499 ; CHECK-NEXT: successors: %bb.1(0x80000000)500 ; CHECK-NEXT: liveins: $edi501 ; CHECK-NEXT: {{ $}}502 ; CHECK-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax503 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags504 ; CHECK-NEXT: [[ADC32rr_ND:%[0-9]+]]:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags505 ; CHECK-NEXT: JCC_1 %bb.1, 4, implicit $eflags506 ; CHECK-NEXT: RET 0, $al507 ; CHECK-NEXT: {{ $}}508 ; CHECK-NEXT: bb.1:509 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags510 ; CHECK-NEXT: $eax = CMOV32rr_ND $edi, [[ADC32rr_ND]], 5, implicit killed $eflags511 ; CHECK-NEXT: RET 0, $al512 bb.0:513 liveins: $edi514 515 MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax516 %1:gr64 = COPY $eflags517 %2:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags518 JCC_1 %bb.1, 4, implicit $eflags519 RET 0, $al520 521 bb.1:522 $eflags = COPY %1523 $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags524 RET 0, $al525...526---527name: test_evitable_clobber_crossbb_complex528body: |529 ; NDD-LABEL: name: test_evitable_clobber_crossbb_complex530 ; NDD: bb.0:531 ; NDD-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)532 ; NDD-NEXT: liveins: $edi533 ; NDD-NEXT: {{ $}}534 ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax535 ; NDD-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags536 ; NDD-NEXT: [[SUB32rr_ND:%[0-9]+]]:gr32 = SUB32rr_ND $edi, $edi, implicit-def dead $eflags537 ; NDD-NEXT: JCC_1 %bb.2, 4, implicit $eflags538 ; NDD-NEXT: {{ $}}539 ; NDD-NEXT: bb.1:540 ; NDD-NEXT: successors: %bb.3(0x80000000)541 ; NDD-NEXT: {{ $}}542 ; NDD-NEXT: $eax = IMUL32rr_ND $eax, $edi, implicit-def dead $eflags543 ; NDD-NEXT: JMP_1 %bb.3544 ; NDD-NEXT: {{ $}}545 ; NDD-NEXT: bb.2:546 ; NDD-NEXT: successors: %bb.3(0x80000000)547 ; NDD-NEXT: {{ $}}548 ; NDD-NEXT: $eax = IMUL32rr $eax, $esi, implicit-def dead $eflags549 ; NDD-NEXT: JMP_1 %bb.3550 ; NDD-NEXT: {{ $}}551 ; NDD-NEXT: bb.3:552 ; NDD-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags553 ; NDD-NEXT: $eax = CMOV32rr_ND $edi, [[SUB32rr_ND]], 5, implicit killed $eflags554 ; NDD-NEXT: RET 0, $al555 ;556 ; NDD-NF-LABEL: name: test_evitable_clobber_crossbb_complex557 ; NDD-NF: bb.0:558 ; NDD-NF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)559 ; NDD-NF-NEXT: liveins: $edi560 ; NDD-NF-NEXT: {{ $}}561 ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax562 ; NDD-NF-NEXT: [[SUB32rr_NF_ND:%[0-9]+]]:gr32 = SUB32rr_NF_ND $edi, $edi563 ; NDD-NF-NEXT: JCC_1 %bb.2, 4, implicit $eflags564 ; NDD-NF-NEXT: {{ $}}565 ; NDD-NF-NEXT: bb.1:566 ; NDD-NF-NEXT: successors: %bb.3(0x80000000)567 ; NDD-NF-NEXT: liveins: $eflags568 ; NDD-NF-NEXT: {{ $}}569 ; NDD-NF-NEXT: $eax = IMUL32rr_NF_ND $eax, $edi570 ; NDD-NF-NEXT: JMP_1 %bb.3571 ; NDD-NF-NEXT: {{ $}}572 ; NDD-NF-NEXT: bb.2:573 ; NDD-NF-NEXT: successors: %bb.3(0x80000000)574 ; NDD-NF-NEXT: liveins: $eflags575 ; NDD-NF-NEXT: {{ $}}576 ; NDD-NF-NEXT: $eax = IMUL32rr_NF $eax, $esi577 ; NDD-NF-NEXT: JMP_1 %bb.3578 ; NDD-NF-NEXT: {{ $}}579 ; NDD-NF-NEXT: bb.3:580 ; NDD-NF-NEXT: liveins: $eflags581 ; NDD-NF-NEXT: {{ $}}582 ; NDD-NF-NEXT: $eax = CMOV32rr_ND $edi, [[SUB32rr_NF_ND]], 7, implicit $eflags583 ; NDD-NF-NEXT: RET 0, $al584 bb.0:585 liveins: $edi586 587 MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax588 %1:gr64 = COPY $eflags589 %2:gr32 = SUB32rr_ND $edi, $edi, implicit-def dead $eflags590 JCC_1 %bb.2, 4, implicit $eflags591 592 bb.1:593 $eax = IMUL32rr_ND $eax, $edi, implicit-def dead $eflags594 JMP_1 %bb.3595 596 bb.2:597 $eax = IMUL32rr $eax, $esi, implicit-def dead $eflags598 JMP_1 %bb.3599 600 bb.3:601 $eflags = COPY %1602 $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags603 RET 0, $al604...605---606name: test_inevitable_clobber_crossbb_complex607body: |608 ; CHECK-LABEL: name: test_inevitable_clobber_crossbb_complex609 ; CHECK: bb.0:610 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)611 ; CHECK-NEXT: liveins: $edi612 ; CHECK-NEXT: {{ $}}613 ; CHECK-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax614 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags615 ; CHECK-NEXT: [[SUB32rr_ND:%[0-9]+]]:gr32 = SUB32rr_ND $edi, $edi, implicit-def dead $eflags616 ; CHECK-NEXT: JCC_1 %bb.2, 4, implicit $eflags617 ; CHECK-NEXT: {{ $}}618 ; CHECK-NEXT: bb.1:619 ; CHECK-NEXT: successors: %bb.3(0x80000000)620 ; CHECK-NEXT: {{ $}}621 ; CHECK-NEXT: $eax = IMUL32rr_ND $eax, $edi, implicit-def dead $eflags622 ; CHECK-NEXT: JMP_1 %bb.3623 ; CHECK-NEXT: {{ $}}624 ; CHECK-NEXT: bb.2:625 ; CHECK-NEXT: successors: %bb.3(0x80000000)626 ; CHECK-NEXT: {{ $}}627 ; CHECK-NEXT: $eax = SBB32rr $eax, $esi, implicit-def dead $eflags, implicit $eflags628 ; CHECK-NEXT: JMP_1 %bb.3629 ; CHECK-NEXT: {{ $}}630 ; CHECK-NEXT: bb.3:631 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags632 ; CHECK-NEXT: $eax = CMOV32rr_ND $edi, [[SUB32rr_ND]], 5, implicit killed $eflags633 ; CHECK-NEXT: RET 0, $al634 bb.0:635 liveins: $edi636 637 MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax638 %1:gr64 = COPY $eflags639 %2:gr32 = SUB32rr_ND $edi, $edi, implicit-def dead $eflags640 JCC_1 %bb.2, 4, implicit $eflags641 642 bb.1:643 $eax = IMUL32rr_ND $eax, $edi, implicit-def dead $eflags644 JMP_1 %bb.3645 646 bb.2:647 $eax = SBB32rr $eax, $esi, implicit-def dead $eflags, implicit $eflags648 JMP_1 %bb.3649 650 bb.3:651 $eflags = COPY %1652 $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags653 RET 0, $al654...655