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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -mattr=+zu | FileCheck %s --check-prefixes=CHECK,ZU3; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefixes=CHECK,NOZU4 5; Test generation of 16b imulzu when -mattr=+zu is specified.6; The mulzu_* tests check for basic generation, which is limited to cases where a7; zero-extend of the result can be folded into imulzu.8; The remaining tests are modifications of selected test/CodeGen/X86/imul.ll tests with9; 16b multiplies, to check that common strength reductions in ISel are still performed10; when -mattr=+zu is in effect.11;12; FIXME: several cases from imul.ll covering DAG combines, in particular those using LEA,13; are not ported as X86's IsDesirableToPromoteOp has no way to accurately identify when14; promotion will permit a better sequence than an unpromoted imulzu.15; These cases should be added when they are implemented.16 17define i32 @mulzu_16_32(i16 %A) {18; ZU-LABEL: mulzu_16_32:19; ZU: # %bb.0:20; ZU-NEXT: imulzuw $1234, %di, %ax # imm = 0x4D221; ZU-NEXT: retq22;23; NOZU-LABEL: mulzu_16_32:24; NOZU: # %bb.0:25; NOZU-NEXT: imull $1234, %edi, %eax # imm = 0x4D226; NOZU-NEXT: movzwl %ax, %eax27; NOZU-NEXT: retq28 %mul = mul i16 %A, 123429 %r = zext i16 %mul to i3230 ret i32 %r31}32 33define i64 @mulzu_16_64(i16 %A) {34; ZU-LABEL: mulzu_16_64:35; ZU: # %bb.0:36; ZU-NEXT: imulzuw $1234, %di, %ax # imm = 0x4D237; ZU-NEXT: retq38;39; NOZU-LABEL: mulzu_16_64:40; NOZU: # %bb.0:41; NOZU-NEXT: imull $1234, %edi, %eax # imm = 0x4D242; NOZU-NEXT: movzwl %ax, %eax43; NOZU-NEXT: retq44 %mul = mul i16 %A, 123445 %r = zext i16 %mul to i6446 ret i64 %r47}48 49define i32 @mulzu_16_32_mem(ptr %P) {50; ZU-LABEL: mulzu_16_32_mem:51; ZU: # %bb.0:52; ZU-NEXT: imulzuw $1234, (%rdi), %ax # imm = 0x4D253; ZU-NEXT: retq54;55; NOZU-LABEL: mulzu_16_32_mem:56; NOZU: # %bb.0:57; NOZU-NEXT: movzwl (%rdi), %eax58; NOZU-NEXT: imull $1234, %eax, %eax # imm = 0x4D259; NOZU-NEXT: movzwl %ax, %eax60; NOZU-NEXT: retq61 %gep = getelementptr i16, ptr %P, i64 062 %A = load i16, ptr %gep63 %mul = mul i16 %A, 123464 %r = zext i16 %mul to i3265 ret i32 %r66}67 68define i64 @mulzu_16_64_mem(ptr %P) {69; ZU-LABEL: mulzu_16_64_mem:70; ZU: # %bb.0:71; ZU-NEXT: imulzuw $1234, (%rdi), %ax # imm = 0x4D272; ZU-NEXT: retq73;74; NOZU-LABEL: mulzu_16_64_mem:75; NOZU: # %bb.0:76; NOZU-NEXT: movzwl (%rdi), %eax77; NOZU-NEXT: imull $1234, %eax, %eax # imm = 0x4D278; NOZU-NEXT: movzwl %ax, %eax79; NOZU-NEXT: retq80 %gep = getelementptr i16, ptr %P, i64 081 %A = load i16, ptr %gep82 %mul = mul i16 %A, 123483 %r = zext i16 %mul to i6484 ret i64 %r85}86 87; The following mulzu cases check that imulzu is not88; generated in the absence of a single zext user. The ZU/NOZU89; cases should match.90 91define void @mulzu_16_store(i16 %A, ptr %R) {92; CHECK-LABEL: mulzu_16_store:93; CHECK: # %bb.0:94; CHECK-NEXT: imull $1234, %edi, %eax # imm = 0x4D295; CHECK-NEXT: movw %ax, (%rsi)96; CHECK-NEXT: retq97 %gep = getelementptr i16, ptr %R, i64 098 %mul = mul i16 %A, 123499 store i16 %mul, ptr %gep100 ret void101}102 103define i32 @mulzu_16_store_32(i16 %A, ptr %R) {104; CHECK-LABEL: mulzu_16_store_32:105; CHECK: # %bb.0:106; CHECK-NEXT: imull $1234, %edi, %eax # imm = 0x4D2107; CHECK-NEXT: movw %ax, (%rsi)108; CHECK-NEXT: movzwl %ax, %eax109; CHECK-NEXT: retq110 %gep = getelementptr i16, ptr %R, i64 0111 %mul = mul i16 %A, 1234112 store i16 %mul, ptr %gep113 %r = zext i16 %mul to i32114 ret i32 %r115}116 117define i64 @mulzu_16_store_64(i16 %A, ptr %R) {118; CHECK-LABEL: mulzu_16_store_64:119; CHECK: # %bb.0:120; CHECK-NEXT: imull $1234, %edi, %eax # imm = 0x4D2121; CHECK-NEXT: movw %ax, (%rsi)122; CHECK-NEXT: movzwl %ax, %eax123; CHECK-NEXT: retq124 %gep = getelementptr i16, ptr %R, i64 0125 %mul = mul i16 %A, 1234126 store i16 %mul, ptr %gep127 %r = zext i16 %mul to i64128 ret i64 %r129}130 131define i32 @mulzu_sext_16_32(i16 %A) {132; CHECK-LABEL: mulzu_sext_16_32:133; CHECK: # %bb.0:134; CHECK-NEXT: imull $1234, %edi, %eax # imm = 0x4D2135; CHECK-NEXT: cwtl136; CHECK-NEXT: retq137 %mul = mul i16 %A, 1234138 %r = sext i16 %mul to i32139 ret i32 %r140}141 142define i64 @mulzu_sext_16_64(i16 %A) {143; CHECK-LABEL: mulzu_sext_16_64:144; CHECK: # %bb.0:145; CHECK-NEXT: imull $1234, %edi, %eax # imm = 0x4D2146; CHECK-NEXT: movswq %ax, %rax147; CHECK-NEXT: retq148 %mul = mul i16 %A, 1234149 %r = sext i16 %mul to i64150 ret i64 %r151}152 153; Tests ported from test/CodeGen/X86/imul.ll follow from this point.154; The generated code, which strength-reduces multiplies by certain155; constants, should be unaffected by enabling zu.156 157define i16 @mul4_16(i16 %A) {158;159; CHECK-LABEL: mul4_16:160; CHECK: # %bb.0:161; CHECK-NEXT: # kill: def $edi killed $edi def $rdi162; CHECK-NEXT: leal (,%rdi,4), %eax163; CHECK-NEXT: # kill: def $ax killed $ax killed $eax164; CHECK-NEXT: retq165 %mul = mul i16 %A, 4166 ret i16 %mul167}168 169define i16 @mul4096_16(i16 %A) {170;171; CHECK-LABEL: mul4096_16:172; CHECK: # %bb.0:173; CHECK-NEXT: movl %edi, %eax174; CHECK-NEXT: shll $12, %eax175; CHECK-NEXT: # kill: def $ax killed $ax killed $eax176; CHECK-NEXT: retq177 %mul = mul i16 %A, 4096178 ret i16 %mul179}180 181define i16 @mulmin4096_16(i16 %A) {182;183; CHECK-LABEL: mulmin4096_16:184; CHECK: # %bb.0:185; CHECK-NEXT: movl %edi, %eax186; CHECK-NEXT: shll $12, %eax187; CHECK-NEXT: negl %eax188; CHECK-NEXT: # kill: def $ax killed $ax killed $eax189; CHECK-NEXT: retq190 %mul = mul i16 %A, -4096191 ret i16 %mul192}193 194define i16 @mul4_16_minsize(i16 %A) minsize {195;196; CHECK-LABEL: mul4_16_minsize:197; CHECK: # %bb.0:198; CHECK-NEXT: # kill: def $edi killed $edi def $rdi199; CHECK-NEXT: leal (,%rdi,4), %eax200; CHECK-NEXT: # kill: def $ax killed $ax killed $eax201; CHECK-NEXT: retq202 %mul = mul i16 %A, 4203 ret i16 %mul204}205 206define i16 @mul0_16(i16 %A) {207;208; CHECK-LABEL: mul0_16:209; CHECK: # %bb.0:210; CHECK-NEXT: xorl %eax, %eax211; CHECK-NEXT: retq212 %mul = mul i16 %A, 0213 ret i16 %mul214}215 216define i16 @mul4294967295_16(i16 %A) {217;218; CHECK-LABEL: mul4294967295_16:219; CHECK: # %bb.0:220; CHECK-NEXT: movl %edi, %eax221; CHECK-NEXT: negl %eax222; CHECK-NEXT: # kill: def $ax killed $ax killed $eax223; CHECK-NEXT: retq224 %mul = mul i16 %A, 4294967295225 ret i16 %mul226}227