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1# RUN: llc %s -o - -start-before=greedy -stop-after=virtregrewriter -mtriple x86_64 -mattr=+ndd | FileCheck %s2#3# This test is for stack spill folding -- the ADD32ri_ND near the end of the MIR4# below show be morphed into an ADD32mi by the register allocator, making it5# load-operate-store to %stack.2.6#7# CHECK: ADD32mi %stack.28--- |9 10 define fastcc void @add32ri_nd_2_add32mi(i1 %arg, i1 %arg1, i1 %arg2, ptr %arg3, ptr %arg4, i1 %arg5, i8 %arg6) #0 {11 bb:12 br label %bb713 14 bb7: ; preds = %bb21, %bb15 br label %bb816 17 bb8: ; preds = %bb21, %bb718 %lsr.iv = phi i32 [ %lsr.iv.next, %bb21 ], [ 0, %bb7 ]19 br label %bb1120 21 bb9: ; preds = %bb1422 %trunc = trunc i64 0 to i3223 br label %bb1024 25 bb10: ; preds = %bb14, %bb926 br label %bb1527 28 bb11: ; preds = %bb13, %bb829 store double 0.000000e+00, ptr %arg3, align 830 store i8 0, ptr %arg4, align 131 br i1 %arg, label %bb13, label %bb1232 33 bb12: ; preds = %bb1134 %call = tail call i32 (ptr, ptr, ...) null(ptr null, ptr null, i32 0, i32 0, i32 0, double 0.000000e+00, i32 0)35 br label %bb1336 37 bb13: ; preds = %bb12, %bb1138 br i1 %arg, label %bb14, label %bb1139 40 bb14: ; preds = %bb1341 br i1 %arg1, label %bb9, label %bb1042 43 bb15: ; preds = %bb15, %bb1044 %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb15 ], [ %lsr.iv, %bb10 ]45 store i8 %arg6, ptr null, align 146 %or = or i32 %lsr.iv1, 147 %lsr.iv.next2 = add i32 %lsr.iv1, 148 br i1 %arg5, label %bb21, label %bb1549 50 bb21: ; preds = %bb1551 %lsr.iv.next = add i32 %lsr.iv, 852 br i1 %arg2, label %bb8, label %bb753 }54 55 attributes #0 = { "target-features"="+ndd" }56 57...58---59name: add32ri_nd_2_add32mi60alignment: 1661exposesReturnsTwice: false62legalized: false63regBankSelected: false64selected: false65failedISel: false66tracksRegLiveness: true67hasWinCFI: false68callsEHReturn: false69callsUnwindInit: false70hasEHContTarget: false71hasEHScopes: false72hasEHFunclets: false73isOutlined: false74debugInstrRef: true75failsVerification: false76tracksDebugUserValues: false77registers:78 - { id: 0, class: gr32, preferred-register: '' }79 - { id: 1, class: gr32, preferred-register: '' }80 - { id: 2, class: gr32, preferred-register: '' }81 - { id: 3, class: gr32, preferred-register: '' }82 - { id: 4, class: gr32, preferred-register: '' }83 - { id: 5, class: gr32, preferred-register: '' }84 - { id: 6, class: gr32, preferred-register: '' }85 - { id: 7, class: gr64, preferred-register: '' }86 - { id: 8, class: gr64, preferred-register: '' }87 - { id: 9, class: gr32, preferred-register: '' }88 - { id: 10, class: gr8, preferred-register: '' }89 - { id: 11, class: gr8, preferred-register: '' }90 - { id: 12, class: gr8, preferred-register: '' }91 - { id: 13, class: gr8, preferred-register: '' }92 - { id: 14, class: gr8, preferred-register: '' }93 - { id: 15, class: gr32, preferred-register: '' }94 - { id: 16, class: gr32, preferred-register: '' }95 - { id: 17, class: gr64_with_sub_8bit, preferred-register: '' }96 - { id: 18, class: fr64, preferred-register: '' }97 - { id: 19, class: gr8, preferred-register: '' }98 - { id: 20, class: gr32, preferred-register: '' }99 - { id: 21, class: gr32, preferred-register: '' }100 - { id: 22, class: gr32, preferred-register: '' }101liveins:102 - { reg: '$edi', virtual-reg: '%4' }103 - { reg: '$esi', virtual-reg: '%5' }104 - { reg: '$edx', virtual-reg: '%6' }105 - { reg: '$rcx', virtual-reg: '%7' }106 - { reg: '$r8', virtual-reg: '%8' }107 - { reg: '$r9d', virtual-reg: '%9' }108frameInfo:109 isFrameAddressTaken: false110 isReturnAddressTaken: false111 hasStackMap: false112 hasPatchPoint: false113 stackSize: 0114 offsetAdjustment: 0115 maxAlignment: 8116 adjustsStack: true117 hasCalls: true118 stackProtector: ''119 functionContext: ''120 maxCallFrameSize: 4294967295121 cvBytesOfCalleeSavedRegisters: 0122 hasOpaqueSPAdjustment: false123 hasVAStart: false124 hasMustTailInVarArgFunc: false125 hasTailCall: false126 isCalleeSavedInfoValid: false127 localFrameSize: 0128 savePoint: []129 restorePoint: []130fixedStack:131 - { id: 0, type: default, offset: 0, size: 1, alignment: 16, stack-id: default,132 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,133 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }134stack: []135entry_values: []136callSites: []137debugValueSubstitutions: []138constants: []139machineFunctionInfo: {}140body: |141 bb.0.bb:142 successors: %bb.1(0x80000000)143 liveins: $edi, $esi, $edx, $rcx, $r8, $r9d144 145 %9:gr32 = COPY $r9d146 %8:gr64 = COPY $r8147 %7:gr64 = COPY $rcx148 %6:gr32 = COPY $edx149 %5:gr32 = COPY $esi150 %4:gr32 = COPY $edi151 %14:gr8 = MOV8rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load (s8) from %fixed-stack.0, align 16)152 undef %17.sub_32bit:gr64_with_sub_8bit = MOV32r0 implicit-def dead $eflags153 154 bb.1.bb7:155 successors: %bb.2(0x80000000)156 157 %21:gr32 = MOV32r0 implicit-def dead $eflags158 159 bb.2.bb8:160 successors: %bb.4(0x80000000)161 162 JMP_1 %bb.4163 164 bb.3.bb9:165 successors: %bb.8(0x80000000)166 167 %22:gr32 = COPY %21168 JMP_1 %bb.8169 170 bb.4.bb11:171 successors: %bb.6(0x40000000), %bb.5(0x40000000)172 173 MOV64mi32 %7, 1, $noreg, 0, $noreg, 0 :: (store (s64) into %ir.arg3)174 MOV8mi %8, 1, $noreg, 0, $noreg, 0 :: (store (s8) into %ir.arg4)175 TEST8ri %4.sub_8bit, 1, implicit-def $eflags176 JCC_1 %bb.6, 5, implicit $eflags177 JMP_1 %bb.5178 179 bb.5.bb12:180 successors: %bb.6(0x80000000)181 182 ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp183 $xmm0 = FsFLD0SD184 dead $edi = MOV32r0 implicit-def dead $eflags, implicit-def $rdi185 dead $esi = MOV32r0 implicit-def dead $eflags, implicit-def $rsi186 $edx = MOV32r0 implicit-def dead $eflags187 $ecx = MOV32r0 implicit-def dead $eflags188 $r8d = MOV32r0 implicit-def dead $eflags189 $r9d = MOV32r0 implicit-def dead $eflags190 $al = MOV8ri 1191 CALL64r %17, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit $edx, implicit $ecx, implicit $r8d, implicit killed $xmm0, implicit $r9d, implicit killed $al, implicit-def $rsp, implicit-def $ssp, implicit-def dead $eax192 ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp193 194 bb.6.bb13:195 successors: %bb.7(0x04000000), %bb.4(0x7c000000)196 197 TEST8ri %4.sub_8bit, 1, implicit-def $eflags198 JCC_1 %bb.4, 4, implicit $eflags199 JMP_1 %bb.7200 201 bb.7.bb14:202 successors: %bb.3(0x40000000), %bb.8(0x40000000)203 204 TEST8ri %5.sub_8bit, 1, implicit-def $eflags205 %22:gr32 = COPY %21206 JCC_1 %bb.3, 5, implicit $eflags207 208 bb.8.bb15:209 successors: %bb.9(0x04000000), %bb.8(0x7c000000)210 211 MOV8mr $noreg, 1, $noreg, 0, $noreg, %14 :: (store (s8) into `ptr null`)212 %22:gr32 = INC32r_ND %22, implicit-def dead $eflags213 TEST8ri %9.sub_8bit, 1, implicit-def $eflags214 JCC_1 %bb.8, 4, implicit $eflags215 JMP_1 %bb.9216 217 bb.9.bb21:218 successors: %bb.2(0x7c000000), %bb.1(0x04000000)219 220 %21:gr32 = ADD32ri_ND %21, 8, implicit-def dead $eflags221 TEST8ri %6.sub_8bit, 1, implicit-def $eflags222 JCC_1 %bb.2, 5, implicit $eflags223 JMP_1 %bb.1224 225...226