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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc %s -mtriple=x86_64-unknown -mattr=+ndd,+egpr -run-pass=break-false-deps -verify-machineinstrs -o - | FileCheck --check-prefixes=CHECK,RCDEFAULT %s3# RUN: llc %s -mtriple=x86_64-unknown -mattr=+ndd,+egpr -run-pass=break-false-deps -partial-reg-update-clearance=1 -verify-machineinstrs -o - | FileCheck --check-prefixes=CHECK,RC1 %s4#5# Check that BreakFalseDeps detects cases where an ND instruction would cause a partial register write6# if compressed to a legacy op. MIR has been modified to force different register assignments.7#8# For partial_write, the ADD16rr_ND is compressible, but will become a partial write after compression.9# Compression is inhibited if the eax definition is within the partial-reg-update-clearance threshold.10#11# For no_partial_write, the ADD16rr_ND is incompressible hence it cannot become a partial write.12# This case checks that an implicit-def of eax is not added by breakPartialRegDependency.13#14--- |15 define signext i16 @partial_write(ptr %p, i32 %a, i32 %b, i16 signext %x, i16 signext %y) #0 {16 entry:17 %add = add nsw i32 %b, %a18 store i32 %add, ptr %p, align 419 %add1 = trunc i32 %add to i1620 %add2 = add i16 %add1, %x21 ret i16 %add222 }23 24 define signext i16 @no_partial_write(ptr %p, i32 %a, i32 %b, i16 signext %x, i16 signext %y) #0 {25 entry:26 %add = add nsw i32 %b, %a27 store i32 %add, ptr %p, align 428 %add1 = trunc i32 %add to i1629 %add2 = add i16 %add1, %x30 ret i16 %add231 }32 attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx16,+cx8,+egpr,+fxsr,+mmx,+ndd,+sse,+sse2,+x87" "tune-cpu"="generic" }33...34---35name: partial_write36tracksRegLiveness: true37noVRegs: true38noPhis: true39isSSA: false40body: |41 bb.0.entry:42 liveins: $ecx, $edx, $esi, $rdi43 ; RCDEFAULT-LABEL: name: partial_write44 ; RCDEFAULT: liveins: $ecx, $edx, $esi, $rdi45 ; RCDEFAULT-NEXT: {{ $}}46 ; RCDEFAULT-NEXT: renamable $eax = nsw ADD32rr_ND killed renamable $edx, killed renamable $esi, implicit-def dead $eflags47 ; RCDEFAULT-NEXT: MOV32mr killed renamable $rdi, 1, $noreg, 0, $noreg, renamable $eax :: (store (s32) into %ir.p)48 ; RCDEFAULT-NEXT: renamable $ax = ADD16rr_ND renamable $ax, renamable $cx, implicit-def dead $eflags, implicit killed $ecx, implicit $eax, implicit-def $rax49 ; RCDEFAULT-NEXT: RET64 $ax50 ;51 ; RC1-LABEL: name: partial_write52 ; RC1: liveins: $ecx, $edx, $esi, $rdi53 ; RC1-NEXT: {{ $}}54 ; RC1-NEXT: renamable $eax = nsw ADD32rr_ND killed renamable $edx, killed renamable $esi, implicit-def dead $eflags55 ; RC1-NEXT: MOV32mr killed renamable $rdi, 1, $noreg, 0, $noreg, renamable $eax :: (store (s32) into %ir.p)56 ; RC1-NEXT: renamable $ax = ADD16rr_ND renamable $ax, renamable $cx, implicit-def dead $eflags, implicit killed $ecx, implicit $eax57 ; RC1-NEXT: RET64 $ax58 renamable $eax = nsw ADD32rr_ND killed renamable $edx, killed renamable $esi, implicit-def dead $eflags59 MOV32mr killed renamable $rdi, 1, $noreg, 0, $noreg, renamable $eax :: (store (s32) into %ir.p)60 renamable $ax = ADD16rr_ND renamable $ax, renamable $cx, implicit-def dead $eflags, implicit killed $ecx, implicit $eax61 RET64 $ax62...63---64name: no_partial_write65tracksRegLiveness: true66noVRegs: true67noPhis: true68isSSA: false69body: |70 bb.0.entry:71 liveins: $ecx, $edx, $esi, $rdi72 73 ; CHECK-LABEL: name: no_partial_write74 ; CHECK: liveins: $ecx, $edx, $esi, $rdi75 ; CHECK-NEXT: {{ $}}76 ; CHECK-NEXT: renamable $edx = nsw ADD32rr_ND killed renamable $edx, killed renamable $esi, implicit-def dead $eflags77 ; CHECK-NEXT: MOV32mr killed renamable $rdi, 1, $noreg, 0, $noreg, renamable $edx :: (store (s32) into %ir.p)78 ; CHECK-NEXT: renamable $ax = ADD16rr_ND renamable $dx, renamable $cx, implicit-def dead $eflags, implicit killed $ecx, implicit killed $edx79 ; CHECK-NEXT: RET64 $ax80 renamable $edx = nsw ADD32rr_ND killed renamable $edx, killed renamable $esi, implicit-def dead $eflags81 MOV32mr killed renamable $rdi, 1, $noreg, 0, $noreg, renamable $edx :: (store (s32) into %ir.p)82 renamable $ax = ADD16rr_ND renamable $dx, renamable $cx, implicit-def dead $eflags, implicit killed $ecx, implicit killed $edx83 RET64 $ax84...85