92 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64 -mattr=+zu | FileCheck %s3 4define i16 @i8(i8 %x) nounwind {5; CHECK-LABEL: i8:6; CHECK: # %bb.0:7; CHECK-NEXT: cmpb $3, %dil8; CHECK-NEXT: setzuae %al9; CHECK-NEXT: # kill: def $ax killed $ax killed $eax10; CHECK-NEXT: retq11 %t0 = icmp ugt i8 %x, 212 %zext = zext i1 %t0 to i1613 ret i16 %zext14}15 16define i16 @i16(i16 %x) nounwind {17; CHECK-LABEL: i16:18; CHECK: # %bb.0:19; CHECK-NEXT: cmpw $2, %di20; CHECK-NEXT: setzub %al21; CHECK-NEXT: # kill: def $ax killed $ax killed $eax22; CHECK-NEXT: retq23 %t0 = icmp ult i16 %x, 224 %if = select i1 %t0, i16 1, i16 025 ret i16 %if26}27 28define i32 @i32(i32 %x) nounwind {29; CHECK-LABEL: i32:30; CHECK: # %bb.0:31; CHECK-NEXT: cmpl $1, %edi32; CHECK-NEXT: setzue %al33; CHECK-NEXT: retq34 %t0 = icmp eq i32 %x, 135 %if = select i1 %t0, i32 1, i32 036 ret i32 %if37}38 39define i64 @i64(i64 %x) nounwind {40; CHECK-LABEL: i64:41; CHECK: # %bb.0:42; CHECK-NEXT: cmpq $1, %rdi43; CHECK-NEXT: setzune %al44; CHECK-NEXT: retq45 %t0 = icmp ne i64 %x, 146 %if = select i1 %t0, i64 1, i64 047 ret i64 %if48}49 50define i32 @flags_copy_lowering() nounwind {51; CHECK-LABEL: flags_copy_lowering:52; CHECK: # %bb.0: # %bb53; CHECK-NEXT: xorl %eax, %eax54; CHECK-NEXT: xorl %edx, %edx55; CHECK-NEXT: xorl %ecx, %ecx56; CHECK-NEXT: .p2align 457; CHECK-NEXT: .LBB4_1: # %bb158; CHECK-NEXT: # =>This Inner Loop Header: Depth=159; CHECK-NEXT: addl %edx, 060; CHECK-NEXT: setb %sil61; CHECK-NEXT: adcl $0, %ecx62; CHECK-NEXT: testb %sil, %sil63; CHECK-NEXT: je .LBB4_364; CHECK-NEXT: # %bb.2: # %bb165; CHECK-NEXT: # in Loop: Header=BB4_1 Depth=166; CHECK-NEXT: xorl %edx, %edx67; CHECK-NEXT: movb %sil, %dl68; CHECK-NEXT: testb %al, %al69; CHECK-NEXT: jne .LBB4_170; CHECK-NEXT: .LBB4_3: # %bb271; CHECK-NEXT: xorl %eax, %eax72; CHECK-NEXT: retq73bb:74 br label %bb175 76bb1:77 %phi = phi i32 [ 0, %bb ], [ %zext, %bb1 ]78 %phi2 = phi i32 [ 0, %bb ], [ %add3, %bb1 ]79 %load = load i32, ptr null, align 480 %add = add i32 %load, %phi81 store i32 %add, ptr null, align 482 %icmp = icmp ugt i32 %phi, %add83 %zext = zext i1 %icmp to i3284 %add3 = add i32 %phi2, %zext85 %icmp4 = icmp ult i32 %phi2, 086 %and = and i1 %icmp, false87 br i1 %and, label %bb1, label %bb288 89bb2:90 ret i32 091}92