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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2,cx16 | FileCheck %s --check-prefixes=X64-SSE3; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=avx,cx16 | FileCheck %s --check-prefixes=X64-AVX4; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=avx512f,cx16 | FileCheck %s --check-prefixes=X64-AVX5 6; Codegen of fp128 without cx16 is tested in atomic-nocx16.ll7 8define void @store_fp128(ptr %fptr, fp128 %v) {9; X64-SSE-LABEL: store_fp128:10; X64-SSE: # %bb.0:11; X64-SSE-NEXT: pushq %rbx12; X64-SSE-NEXT: .cfi_def_cfa_offset 1613; X64-SSE-NEXT: .cfi_offset %rbx, -1614; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)15; X64-SSE-NEXT: movq -{{[0-9]+}}(%rsp), %rbx16; X64-SSE-NEXT: movq -{{[0-9]+}}(%rsp), %rcx17; X64-SSE-NEXT: movq (%rdi), %rax18; X64-SSE-NEXT: movq 8(%rdi), %rdx19; X64-SSE-NEXT: .p2align 420; X64-SSE-NEXT: .LBB0_1: # %atomicrmw.start21; X64-SSE-NEXT: # =>This Inner Loop Header: Depth=122; X64-SSE-NEXT: lock cmpxchg16b (%rdi)23; X64-SSE-NEXT: jne .LBB0_124; X64-SSE-NEXT: # %bb.2: # %atomicrmw.end25; X64-SSE-NEXT: popq %rbx26; X64-SSE-NEXT: .cfi_def_cfa_offset 827; X64-SSE-NEXT: retq28;29; X64-AVX-LABEL: store_fp128:30; X64-AVX: # %bb.0:31; X64-AVX-NEXT: vmovaps %xmm0, (%rdi)32; X64-AVX-NEXT: retq33 store atomic fp128 %v, ptr %fptr unordered, align 1634 ret void35}36 37define fp128 @load_fp128(ptr %fptr) {38; X64-SSE-LABEL: load_fp128:39; X64-SSE: # %bb.0:40; X64-SSE-NEXT: pushq %rbx41; X64-SSE-NEXT: .cfi_def_cfa_offset 1642; X64-SSE-NEXT: .cfi_offset %rbx, -1643; X64-SSE-NEXT: xorl %eax, %eax44; X64-SSE-NEXT: xorl %edx, %edx45; X64-SSE-NEXT: xorl %ecx, %ecx46; X64-SSE-NEXT: xorl %ebx, %ebx47; X64-SSE-NEXT: lock cmpxchg16b (%rdi)48; X64-SSE-NEXT: movq %rdx, -{{[0-9]+}}(%rsp)49; X64-SSE-NEXT: movq %rax, -{{[0-9]+}}(%rsp)50; X64-SSE-NEXT: movaps -{{[0-9]+}}(%rsp), %xmm051; X64-SSE-NEXT: popq %rbx52; X64-SSE-NEXT: .cfi_def_cfa_offset 853; X64-SSE-NEXT: retq54;55; X64-AVX-LABEL: load_fp128:56; X64-AVX: # %bb.0:57; X64-AVX-NEXT: vmovaps (%rdi), %xmm058; X64-AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)59; X64-AVX-NEXT: vmovaps -{{[0-9]+}}(%rsp), %xmm060; X64-AVX-NEXT: retq61 %v = load atomic fp128, ptr %fptr unordered, align 1662 ret fp128 %v63}64 65define fp128 @exchange_fp128(ptr %fptr, fp128 %x) {66; X64-SSE-LABEL: exchange_fp128:67; X64-SSE: # %bb.0:68; X64-SSE-NEXT: pushq %rbx69; X64-SSE-NEXT: .cfi_def_cfa_offset 1670; X64-SSE-NEXT: .cfi_offset %rbx, -1671; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)72; X64-SSE-NEXT: movq -{{[0-9]+}}(%rsp), %rbx73; X64-SSE-NEXT: movq -{{[0-9]+}}(%rsp), %rcx74; X64-SSE-NEXT: movq (%rdi), %rax75; X64-SSE-NEXT: movq 8(%rdi), %rdx76; X64-SSE-NEXT: .p2align 477; X64-SSE-NEXT: .LBB2_1: # %atomicrmw.start78; X64-SSE-NEXT: # =>This Inner Loop Header: Depth=179; X64-SSE-NEXT: lock cmpxchg16b (%rdi)80; X64-SSE-NEXT: jne .LBB2_181; X64-SSE-NEXT: # %bb.2: # %atomicrmw.end82; X64-SSE-NEXT: movq %rax, -{{[0-9]+}}(%rsp)83; X64-SSE-NEXT: movq %rdx, -{{[0-9]+}}(%rsp)84; X64-SSE-NEXT: movaps -{{[0-9]+}}(%rsp), %xmm085; X64-SSE-NEXT: popq %rbx86; X64-SSE-NEXT: .cfi_def_cfa_offset 887; X64-SSE-NEXT: retq88;89; X64-AVX-LABEL: exchange_fp128:90; X64-AVX: # %bb.0:91; X64-AVX-NEXT: pushq %rbx92; X64-AVX-NEXT: .cfi_def_cfa_offset 1693; X64-AVX-NEXT: .cfi_offset %rbx, -1694; X64-AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)95; X64-AVX-NEXT: movq -{{[0-9]+}}(%rsp), %rbx96; X64-AVX-NEXT: movq -{{[0-9]+}}(%rsp), %rcx97; X64-AVX-NEXT: movq (%rdi), %rax98; X64-AVX-NEXT: movq 8(%rdi), %rdx99; X64-AVX-NEXT: .p2align 4100; X64-AVX-NEXT: .LBB2_1: # %atomicrmw.start101; X64-AVX-NEXT: # =>This Inner Loop Header: Depth=1102; X64-AVX-NEXT: lock cmpxchg16b (%rdi)103; X64-AVX-NEXT: jne .LBB2_1104; X64-AVX-NEXT: # %bb.2: # %atomicrmw.end105; X64-AVX-NEXT: movq %rax, -{{[0-9]+}}(%rsp)106; X64-AVX-NEXT: movq %rdx, -{{[0-9]+}}(%rsp)107; X64-AVX-NEXT: vmovaps -{{[0-9]+}}(%rsp), %xmm0108; X64-AVX-NEXT: popq %rbx109; X64-AVX-NEXT: .cfi_def_cfa_offset 8110; X64-AVX-NEXT: retq111 %v = atomicrmw xchg ptr %fptr, fp128 %x monotonic, align 16112 ret fp128 %v113}114 115