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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE44; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX15; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX26; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX5127 8;9; 128-bit vectors10;11 12define <16 x i8> @test_fixed_v16i8(<16 x i8> %a0, <16 x i8> %a1) nounwind {13; SSE-LABEL: test_fixed_v16i8:14; SSE: # %bb.0:15; SSE-NEXT: movdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]16; SSE-NEXT: pxor %xmm2, %xmm117; SSE-NEXT: pxor %xmm2, %xmm018; SSE-NEXT: pavgb %xmm1, %xmm019; SSE-NEXT: pxor %xmm2, %xmm020; SSE-NEXT: retq21;22; AVX1-LABEL: test_fixed_v16i8:23; AVX1: # %bb.0:24; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]25; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm126; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm027; AVX1-NEXT: vpavgb %xmm1, %xmm0, %xmm028; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm029; AVX1-NEXT: retq30;31; AVX2-LABEL: test_fixed_v16i8:32; AVX2: # %bb.0:33; AVX2-NEXT: vpbroadcastb {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]34; AVX2-NEXT: vpxor %xmm2, %xmm1, %xmm135; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm036; AVX2-NEXT: vpavgb %xmm1, %xmm0, %xmm037; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm038; AVX2-NEXT: retq39;40; AVX512-LABEL: test_fixed_v16i8:41; AVX512: # %bb.0:42; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]43; AVX512-NEXT: vpxor %xmm2, %xmm1, %xmm144; AVX512-NEXT: vpxor %xmm2, %xmm0, %xmm045; AVX512-NEXT: vpavgb %xmm1, %xmm0, %xmm046; AVX512-NEXT: vpxor %xmm2, %xmm0, %xmm047; AVX512-NEXT: retq48 %or = or <16 x i8> %a0, %a149 %xor = xor <16 x i8> %a0, %a150 %shift = ashr <16 x i8> %xor, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>51 %res = sub <16 x i8> %or, %shift52 ret <16 x i8> %res53}54 55define <16 x i8> @test_ext_v16i8(<16 x i8> %a0, <16 x i8> %a1) nounwind {56; SSE-LABEL: test_ext_v16i8:57; SSE: # %bb.0:58; SSE-NEXT: movdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]59; SSE-NEXT: pxor %xmm2, %xmm160; SSE-NEXT: pxor %xmm2, %xmm061; SSE-NEXT: pavgb %xmm1, %xmm062; SSE-NEXT: pxor %xmm2, %xmm063; SSE-NEXT: retq64;65; AVX1-LABEL: test_ext_v16i8:66; AVX1: # %bb.0:67; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]68; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm169; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm070; AVX1-NEXT: vpavgb %xmm1, %xmm0, %xmm071; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm072; AVX1-NEXT: retq73;74; AVX2-LABEL: test_ext_v16i8:75; AVX2: # %bb.0:76; AVX2-NEXT: vpbroadcastb {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]77; AVX2-NEXT: vpxor %xmm2, %xmm1, %xmm178; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm079; AVX2-NEXT: vpavgb %xmm1, %xmm0, %xmm080; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm081; AVX2-NEXT: retq82;83; AVX512-LABEL: test_ext_v16i8:84; AVX512: # %bb.0:85; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]86; AVX512-NEXT: vpxor %xmm2, %xmm1, %xmm187; AVX512-NEXT: vpxor %xmm2, %xmm0, %xmm088; AVX512-NEXT: vpavgb %xmm1, %xmm0, %xmm089; AVX512-NEXT: vpxor %xmm2, %xmm0, %xmm090; AVX512-NEXT: retq91 %x0 = sext <16 x i8> %a0 to <16 x i16>92 %x1 = sext <16 x i8> %a1 to <16 x i16>93 %sum = add <16 x i16> %x0, %x194 %inc = add <16 x i16> %sum, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>95 %shift = ashr <16 x i16> %inc, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>96 %res = trunc <16 x i16> %shift to <16 x i8>97 ret <16 x i8> %res98}99 100define <8 x i16> @test_fixed_v8i16(<8 x i16> %a0, <8 x i16> %a1) nounwind {101; SSE-LABEL: test_fixed_v8i16:102; SSE: # %bb.0:103; SSE-NEXT: movdqa %xmm0, %xmm2104; SSE-NEXT: por %xmm1, %xmm2105; SSE-NEXT: pxor %xmm1, %xmm0106; SSE-NEXT: psraw $1, %xmm0107; SSE-NEXT: psubw %xmm0, %xmm2108; SSE-NEXT: movdqa %xmm2, %xmm0109; SSE-NEXT: retq110;111; AVX-LABEL: test_fixed_v8i16:112; AVX: # %bb.0:113; AVX-NEXT: vpor %xmm1, %xmm0, %xmm2114; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0115; AVX-NEXT: vpsraw $1, %xmm0, %xmm0116; AVX-NEXT: vpsubw %xmm0, %xmm2, %xmm0117; AVX-NEXT: retq118 %or = or <8 x i16> %a0, %a1119 %xor = xor <8 x i16> %a1, %a0120 %shift = ashr <8 x i16> %xor, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>121 %res = sub <8 x i16> %or, %shift122 ret <8 x i16> %res123}124 125define <8 x i16> @test_ext_v8i16(<8 x i16> %a0, <8 x i16> %a1) nounwind {126; SSE-LABEL: test_ext_v8i16:127; SSE: # %bb.0:128; SSE-NEXT: movdqa %xmm0, %xmm2129; SSE-NEXT: por %xmm1, %xmm2130; SSE-NEXT: pxor %xmm1, %xmm0131; SSE-NEXT: psraw $1, %xmm0132; SSE-NEXT: psubw %xmm0, %xmm2133; SSE-NEXT: movdqa %xmm2, %xmm0134; SSE-NEXT: retq135;136; AVX-LABEL: test_ext_v8i16:137; AVX: # %bb.0:138; AVX-NEXT: vpor %xmm1, %xmm0, %xmm2139; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0140; AVX-NEXT: vpsraw $1, %xmm0, %xmm0141; AVX-NEXT: vpsubw %xmm0, %xmm2, %xmm0142; AVX-NEXT: retq143 %x0 = sext <8 x i16> %a0 to <8 x i32>144 %x1 = sext <8 x i16> %a1 to <8 x i32>145 %sum = add <8 x i32> %x0, %x1146 %inc = add <8 x i32> %sum, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>147 %shift = ashr <8 x i32> %inc, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>148 %res = trunc <8 x i32> %shift to <8 x i16>149 ret <8 x i16> %res150}151 152define <4 x i32> @test_fixed_v4i32(<4 x i32> %a0, <4 x i32> %a1) nounwind {153; SSE-LABEL: test_fixed_v4i32:154; SSE: # %bb.0:155; SSE-NEXT: movdqa %xmm0, %xmm2156; SSE-NEXT: por %xmm1, %xmm2157; SSE-NEXT: pxor %xmm1, %xmm0158; SSE-NEXT: psrad $1, %xmm0159; SSE-NEXT: psubd %xmm0, %xmm2160; SSE-NEXT: movdqa %xmm2, %xmm0161; SSE-NEXT: retq162;163; AVX-LABEL: test_fixed_v4i32:164; AVX: # %bb.0:165; AVX-NEXT: vpor %xmm1, %xmm0, %xmm2166; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0167; AVX-NEXT: vpsrad $1, %xmm0, %xmm0168; AVX-NEXT: vpsubd %xmm0, %xmm2, %xmm0169; AVX-NEXT: retq170 %or = or <4 x i32> %a0, %a1171 %xor = xor <4 x i32> %a1, %a0172 %shift = ashr <4 x i32> %xor, <i32 1, i32 1, i32 1, i32 1>173 %res = sub <4 x i32> %or, %shift174 ret <4 x i32> %res175}176 177define <4 x i32> @test_ext_v4i32(<4 x i32> %a0, <4 x i32> %a1) nounwind {178; SSE-LABEL: test_ext_v4i32:179; SSE: # %bb.0:180; SSE-NEXT: movdqa %xmm0, %xmm2181; SSE-NEXT: por %xmm1, %xmm2182; SSE-NEXT: pxor %xmm1, %xmm0183; SSE-NEXT: psrad $1, %xmm0184; SSE-NEXT: psubd %xmm0, %xmm2185; SSE-NEXT: movdqa %xmm2, %xmm0186; SSE-NEXT: retq187;188; AVX-LABEL: test_ext_v4i32:189; AVX: # %bb.0:190; AVX-NEXT: vpor %xmm1, %xmm0, %xmm2191; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0192; AVX-NEXT: vpsrad $1, %xmm0, %xmm0193; AVX-NEXT: vpsubd %xmm0, %xmm2, %xmm0194; AVX-NEXT: retq195 %x0 = sext <4 x i32> %a0 to <4 x i64>196 %x1 = sext <4 x i32> %a1 to <4 x i64>197 %sum = add <4 x i64> %x0, %x1198 %inc = add <4 x i64> %sum, <i64 1, i64 1, i64 1, i64 1>199 %shift = ashr <4 x i64> %inc, <i64 1, i64 1, i64 1, i64 1>200 %res = trunc <4 x i64> %shift to <4 x i32>201 ret <4 x i32> %res202}203 204define <2 x i64> @test_fixed_v2i64(<2 x i64> %a0, <2 x i64> %a1) nounwind {205; SSE2-LABEL: test_fixed_v2i64:206; SSE2: # %bb.0:207; SSE2-NEXT: movdqa %xmm0, %xmm2208; SSE2-NEXT: pxor %xmm1, %xmm2209; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,3,2,3]210; SSE2-NEXT: psrad $1, %xmm3211; SSE2-NEXT: psrlq $1, %xmm2212; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]213; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]214; SSE2-NEXT: por %xmm1, %xmm0215; SSE2-NEXT: psubq %xmm2, %xmm0216; SSE2-NEXT: retq217;218; SSE4-LABEL: test_fixed_v2i64:219; SSE4: # %bb.0:220; SSE4-NEXT: movdqa %xmm0, %xmm2221; SSE4-NEXT: pxor %xmm1, %xmm2222; SSE4-NEXT: movdqa %xmm2, %xmm3223; SSE4-NEXT: psrad $1, %xmm3224; SSE4-NEXT: psrlq $1, %xmm2225; SSE4-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]226; SSE4-NEXT: por %xmm1, %xmm0227; SSE4-NEXT: psubq %xmm2, %xmm0228; SSE4-NEXT: retq229;230; AVX1-LABEL: test_fixed_v2i64:231; AVX1: # %bb.0:232; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm2233; AVX1-NEXT: vpsrad $1, %xmm2, %xmm3234; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm2235; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]236; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0237; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm0238; AVX1-NEXT: retq239;240; AVX2-LABEL: test_fixed_v2i64:241; AVX2: # %bb.0:242; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm2243; AVX2-NEXT: vpsrad $1, %xmm2, %xmm3244; AVX2-NEXT: vpsrlq $1, %xmm2, %xmm2245; AVX2-NEXT: vpblendd {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3]246; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0247; AVX2-NEXT: vpsubq %xmm2, %xmm0, %xmm0248; AVX2-NEXT: retq249;250; AVX512-LABEL: test_fixed_v2i64:251; AVX512: # %bb.0:252; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm2253; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0254; AVX512-NEXT: vpsraq $1, %xmm0, %xmm0255; AVX512-NEXT: vpsubq %xmm0, %xmm2, %xmm0256; AVX512-NEXT: retq257 %or = or <2 x i64> %a0, %a1258 %xor = xor <2 x i64> %a1, %a0259 %shift = ashr <2 x i64> %xor, <i64 1, i64 1>260 %res = sub <2 x i64> %or, %shift261 ret <2 x i64> %res262}263 264define <2 x i64> @test_ext_v2i64(<2 x i64> %a0, <2 x i64> %a1) nounwind {265; SSE2-LABEL: test_ext_v2i64:266; SSE2: # %bb.0:267; SSE2-NEXT: movdqa %xmm0, %xmm2268; SSE2-NEXT: pxor %xmm1, %xmm2269; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,3,2,3]270; SSE2-NEXT: psrad $1, %xmm3271; SSE2-NEXT: psrlq $1, %xmm2272; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]273; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]274; SSE2-NEXT: por %xmm1, %xmm0275; SSE2-NEXT: psubq %xmm2, %xmm0276; SSE2-NEXT: retq277;278; SSE4-LABEL: test_ext_v2i64:279; SSE4: # %bb.0:280; SSE4-NEXT: movdqa %xmm0, %xmm2281; SSE4-NEXT: pxor %xmm1, %xmm2282; SSE4-NEXT: movdqa %xmm2, %xmm3283; SSE4-NEXT: psrad $1, %xmm3284; SSE4-NEXT: psrlq $1, %xmm2285; SSE4-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]286; SSE4-NEXT: por %xmm1, %xmm0287; SSE4-NEXT: psubq %xmm2, %xmm0288; SSE4-NEXT: retq289;290; AVX1-LABEL: test_ext_v2i64:291; AVX1: # %bb.0:292; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm2293; AVX1-NEXT: vpsrad $1, %xmm2, %xmm3294; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm2295; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]296; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0297; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm0298; AVX1-NEXT: retq299;300; AVX2-LABEL: test_ext_v2i64:301; AVX2: # %bb.0:302; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm2303; AVX2-NEXT: vpsrad $1, %xmm2, %xmm3304; AVX2-NEXT: vpsrlq $1, %xmm2, %xmm2305; AVX2-NEXT: vpblendd {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3]306; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0307; AVX2-NEXT: vpsubq %xmm2, %xmm0, %xmm0308; AVX2-NEXT: retq309;310; AVX512-LABEL: test_ext_v2i64:311; AVX512: # %bb.0:312; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm2313; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0314; AVX512-NEXT: vpsraq $1, %xmm0, %xmm0315; AVX512-NEXT: vpsubq %xmm0, %xmm2, %xmm0316; AVX512-NEXT: retq317 %x0 = sext <2 x i64> %a0 to <2 x i128>318 %x1 = sext <2 x i64> %a1 to <2 x i128>319 %sum = add <2 x i128> %x0, %x1320 %inc = add <2 x i128> %sum, <i128 1, i128 1>321 %shift = ashr <2 x i128> %inc, <i128 1, i128 1>322 %res = trunc <2 x i128> %shift to <2 x i64>323 ret <2 x i64> %res324}325 326;327; 256-bit vectors328;329 330define <32 x i8> @test_fixed_v32i8(<32 x i8> %a0, <32 x i8> %a1) nounwind {331; SSE-LABEL: test_fixed_v32i8:332; SSE: # %bb.0:333; SSE-NEXT: movdqa {{.*#+}} xmm4 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]334; SSE-NEXT: pxor %xmm4, %xmm2335; SSE-NEXT: pxor %xmm4, %xmm0336; SSE-NEXT: pavgb %xmm2, %xmm0337; SSE-NEXT: pxor %xmm4, %xmm0338; SSE-NEXT: pxor %xmm4, %xmm3339; SSE-NEXT: pxor %xmm4, %xmm1340; SSE-NEXT: pavgb %xmm3, %xmm1341; SSE-NEXT: pxor %xmm4, %xmm1342; SSE-NEXT: retq343;344; AVX1-LABEL: test_fixed_v32i8:345; AVX1: # %bb.0:346; AVX1-NEXT: vbroadcastss {{.*#+}} ymm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]347; AVX1-NEXT: vxorps %ymm2, %ymm1, %ymm1348; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3349; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0350; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4351; AVX1-NEXT: vpavgb %xmm3, %xmm4, %xmm3352; AVX1-NEXT: vpavgb %xmm1, %xmm0, %xmm0353; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0354; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0355; AVX1-NEXT: retq356;357; AVX2-LABEL: test_fixed_v32i8:358; AVX2: # %bb.0:359; AVX2-NEXT: vpbroadcastb {{.*#+}} ymm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]360; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm1361; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0362; AVX2-NEXT: vpavgb %ymm1, %ymm0, %ymm0363; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0364; AVX2-NEXT: retq365;366; AVX512-LABEL: test_fixed_v32i8:367; AVX512: # %bb.0:368; AVX512-NEXT: vpbroadcastd {{.*#+}} ymm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]369; AVX512-NEXT: vpxor %ymm2, %ymm1, %ymm1370; AVX512-NEXT: vpxor %ymm2, %ymm0, %ymm0371; AVX512-NEXT: vpavgb %ymm1, %ymm0, %ymm0372; AVX512-NEXT: vpxor %ymm2, %ymm0, %ymm0373; AVX512-NEXT: retq374 %or = or <32 x i8> %a0, %a1375 %xor = xor <32 x i8> %a0, %a1376 %shift = ashr <32 x i8> %xor, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>377 %res = sub <32 x i8> %or, %shift378 ret <32 x i8> %res379}380 381define <32 x i8> @test_ext_v32i8(<32 x i8> %a0, <32 x i8> %a1) nounwind {382; SSE-LABEL: test_ext_v32i8:383; SSE: # %bb.0:384; SSE-NEXT: movdqa {{.*#+}} xmm4 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]385; SSE-NEXT: pxor %xmm4, %xmm2386; SSE-NEXT: pxor %xmm4, %xmm0387; SSE-NEXT: pavgb %xmm2, %xmm0388; SSE-NEXT: pxor %xmm4, %xmm0389; SSE-NEXT: pxor %xmm4, %xmm3390; SSE-NEXT: pxor %xmm4, %xmm1391; SSE-NEXT: pavgb %xmm3, %xmm1392; SSE-NEXT: pxor %xmm4, %xmm1393; SSE-NEXT: retq394;395; AVX1-LABEL: test_ext_v32i8:396; AVX1: # %bb.0:397; AVX1-NEXT: vbroadcastss {{.*#+}} ymm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]398; AVX1-NEXT: vxorps %ymm2, %ymm1, %ymm1399; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3400; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0401; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4402; AVX1-NEXT: vpavgb %xmm3, %xmm4, %xmm3403; AVX1-NEXT: vpavgb %xmm1, %xmm0, %xmm0404; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0405; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0406; AVX1-NEXT: retq407;408; AVX2-LABEL: test_ext_v32i8:409; AVX2: # %bb.0:410; AVX2-NEXT: vpbroadcastb {{.*#+}} ymm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]411; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm1412; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0413; AVX2-NEXT: vpavgb %ymm1, %ymm0, %ymm0414; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0415; AVX2-NEXT: retq416;417; AVX512-LABEL: test_ext_v32i8:418; AVX512: # %bb.0:419; AVX512-NEXT: vpbroadcastd {{.*#+}} ymm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]420; AVX512-NEXT: vpxor %ymm2, %ymm1, %ymm1421; AVX512-NEXT: vpxor %ymm2, %ymm0, %ymm0422; AVX512-NEXT: vpavgb %ymm1, %ymm0, %ymm0423; AVX512-NEXT: vpxor %ymm2, %ymm0, %ymm0424; AVX512-NEXT: retq425 %x0 = sext <32 x i8> %a0 to <32 x i16>426 %x1 = sext <32 x i8> %a1 to <32 x i16>427 %sum = add <32 x i16> %x0, %x1428 %inc = add <32 x i16> %sum, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>429 %shift = ashr <32 x i16> %inc, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>430 %res = trunc <32 x i16> %shift to <32 x i8>431 ret <32 x i8> %res432}433 434define <16 x i16> @test_fixed_v16i16(<16 x i16> %a0, <16 x i16> %a1) nounwind {435; SSE-LABEL: test_fixed_v16i16:436; SSE: # %bb.0:437; SSE-NEXT: movdqa %xmm0, %xmm4438; SSE-NEXT: por %xmm2, %xmm4439; SSE-NEXT: pxor %xmm2, %xmm0440; SSE-NEXT: psraw $1, %xmm0441; SSE-NEXT: psubw %xmm0, %xmm4442; SSE-NEXT: movdqa %xmm1, %xmm2443; SSE-NEXT: por %xmm3, %xmm2444; SSE-NEXT: pxor %xmm3, %xmm1445; SSE-NEXT: psraw $1, %xmm1446; SSE-NEXT: psubw %xmm1, %xmm2447; SSE-NEXT: movdqa %xmm4, %xmm0448; SSE-NEXT: movdqa %xmm2, %xmm1449; SSE-NEXT: retq450;451; AVX1-LABEL: test_fixed_v16i16:452; AVX1: # %bb.0:453; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm2454; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3455; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0456; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1457; AVX1-NEXT: vpsraw $1, %xmm1, %xmm1458; AVX1-NEXT: vpsubw %xmm1, %xmm3, %xmm1459; AVX1-NEXT: vpsraw $1, %xmm0, %xmm0460; AVX1-NEXT: vpsubw %xmm0, %xmm2, %xmm0461; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0462; AVX1-NEXT: retq463;464; AVX2-LABEL: test_fixed_v16i16:465; AVX2: # %bb.0:466; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm2467; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0468; AVX2-NEXT: vpsraw $1, %ymm0, %ymm0469; AVX2-NEXT: vpsubw %ymm0, %ymm2, %ymm0470; AVX2-NEXT: retq471;472; AVX512-LABEL: test_fixed_v16i16:473; AVX512: # %bb.0:474; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm2475; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0476; AVX512-NEXT: vpsraw $1, %ymm0, %ymm0477; AVX512-NEXT: vpsubw %ymm0, %ymm2, %ymm0478; AVX512-NEXT: retq479 %or = or <16 x i16> %a0, %a1480 %xor = xor <16 x i16> %a1, %a0481 %shift = ashr <16 x i16> %xor, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>482 %res = sub <16 x i16> %or, %shift483 ret <16 x i16> %res484}485 486define <16 x i16> @test_ext_v16i16(<16 x i16> %a0, <16 x i16> %a1) nounwind {487; SSE-LABEL: test_ext_v16i16:488; SSE: # %bb.0:489; SSE-NEXT: movdqa %xmm0, %xmm4490; SSE-NEXT: por %xmm2, %xmm4491; SSE-NEXT: pxor %xmm2, %xmm0492; SSE-NEXT: psraw $1, %xmm0493; SSE-NEXT: psubw %xmm0, %xmm4494; SSE-NEXT: movdqa %xmm1, %xmm2495; SSE-NEXT: por %xmm3, %xmm2496; SSE-NEXT: pxor %xmm3, %xmm1497; SSE-NEXT: psraw $1, %xmm1498; SSE-NEXT: psubw %xmm1, %xmm2499; SSE-NEXT: movdqa %xmm4, %xmm0500; SSE-NEXT: movdqa %xmm2, %xmm1501; SSE-NEXT: retq502;503; AVX1-LABEL: test_ext_v16i16:504; AVX1: # %bb.0:505; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm2506; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3507; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0508; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1509; AVX1-NEXT: vpsraw $1, %xmm1, %xmm1510; AVX1-NEXT: vpsubw %xmm1, %xmm3, %xmm1511; AVX1-NEXT: vpsraw $1, %xmm0, %xmm0512; AVX1-NEXT: vpsubw %xmm0, %xmm2, %xmm0513; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0514; AVX1-NEXT: retq515;516; AVX2-LABEL: test_ext_v16i16:517; AVX2: # %bb.0:518; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm2519; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0520; AVX2-NEXT: vpsraw $1, %ymm0, %ymm0521; AVX2-NEXT: vpsubw %ymm0, %ymm2, %ymm0522; AVX2-NEXT: retq523;524; AVX512-LABEL: test_ext_v16i16:525; AVX512: # %bb.0:526; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm2527; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0528; AVX512-NEXT: vpsraw $1, %ymm0, %ymm0529; AVX512-NEXT: vpsubw %ymm0, %ymm2, %ymm0530; AVX512-NEXT: retq531 %x0 = sext <16 x i16> %a0 to <16 x i32>532 %x1 = sext <16 x i16> %a1 to <16 x i32>533 %sum = add <16 x i32> %x0, %x1534 %inc = add <16 x i32> %sum, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>535 %shift = ashr <16 x i32> %inc, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>536 %res = trunc <16 x i32> %shift to <16 x i16>537 ret <16 x i16> %res538}539 540define <8 x i32> @test_fixed_v8i32(<8 x i32> %a0, <8 x i32> %a1) nounwind {541; SSE-LABEL: test_fixed_v8i32:542; SSE: # %bb.0:543; SSE-NEXT: movdqa %xmm0, %xmm4544; SSE-NEXT: por %xmm2, %xmm4545; SSE-NEXT: pxor %xmm2, %xmm0546; SSE-NEXT: psrad $1, %xmm0547; SSE-NEXT: psubd %xmm0, %xmm4548; SSE-NEXT: movdqa %xmm1, %xmm2549; SSE-NEXT: por %xmm3, %xmm2550; SSE-NEXT: pxor %xmm3, %xmm1551; SSE-NEXT: psrad $1, %xmm1552; SSE-NEXT: psubd %xmm1, %xmm2553; SSE-NEXT: movdqa %xmm4, %xmm0554; SSE-NEXT: movdqa %xmm2, %xmm1555; SSE-NEXT: retq556;557; AVX1-LABEL: test_fixed_v8i32:558; AVX1: # %bb.0:559; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm2560; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3561; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0562; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1563; AVX1-NEXT: vpsrad $1, %xmm1, %xmm1564; AVX1-NEXT: vpsubd %xmm1, %xmm3, %xmm1565; AVX1-NEXT: vpsrad $1, %xmm0, %xmm0566; AVX1-NEXT: vpsubd %xmm0, %xmm2, %xmm0567; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0568; AVX1-NEXT: retq569;570; AVX2-LABEL: test_fixed_v8i32:571; AVX2: # %bb.0:572; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm2573; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0574; AVX2-NEXT: vpsrad $1, %ymm0, %ymm0575; AVX2-NEXT: vpsubd %ymm0, %ymm2, %ymm0576; AVX2-NEXT: retq577;578; AVX512-LABEL: test_fixed_v8i32:579; AVX512: # %bb.0:580; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm2581; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0582; AVX512-NEXT: vpsrad $1, %ymm0, %ymm0583; AVX512-NEXT: vpsubd %ymm0, %ymm2, %ymm0584; AVX512-NEXT: retq585 %or = or <8 x i32> %a0, %a1586 %xor = xor <8 x i32> %a1, %a0587 %shift = ashr <8 x i32> %xor, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>588 %res = sub <8 x i32> %or, %shift589 ret <8 x i32> %res590}591 592define <8 x i32> @test_ext_v8i32(<8 x i32> %a0, <8 x i32> %a1) nounwind {593; SSE-LABEL: test_ext_v8i32:594; SSE: # %bb.0:595; SSE-NEXT: movdqa %xmm0, %xmm4596; SSE-NEXT: por %xmm2, %xmm4597; SSE-NEXT: pxor %xmm2, %xmm0598; SSE-NEXT: psrad $1, %xmm0599; SSE-NEXT: psubd %xmm0, %xmm4600; SSE-NEXT: movdqa %xmm1, %xmm2601; SSE-NEXT: por %xmm3, %xmm2602; SSE-NEXT: pxor %xmm3, %xmm1603; SSE-NEXT: psrad $1, %xmm1604; SSE-NEXT: psubd %xmm1, %xmm2605; SSE-NEXT: movdqa %xmm4, %xmm0606; SSE-NEXT: movdqa %xmm2, %xmm1607; SSE-NEXT: retq608;609; AVX1-LABEL: test_ext_v8i32:610; AVX1: # %bb.0:611; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm2612; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3613; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0614; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1615; AVX1-NEXT: vpsrad $1, %xmm1, %xmm1616; AVX1-NEXT: vpsubd %xmm1, %xmm3, %xmm1617; AVX1-NEXT: vpsrad $1, %xmm0, %xmm0618; AVX1-NEXT: vpsubd %xmm0, %xmm2, %xmm0619; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0620; AVX1-NEXT: retq621;622; AVX2-LABEL: test_ext_v8i32:623; AVX2: # %bb.0:624; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm2625; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0626; AVX2-NEXT: vpsrad $1, %ymm0, %ymm0627; AVX2-NEXT: vpsubd %ymm0, %ymm2, %ymm0628; AVX2-NEXT: retq629;630; AVX512-LABEL: test_ext_v8i32:631; AVX512: # %bb.0:632; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm2633; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0634; AVX512-NEXT: vpsrad $1, %ymm0, %ymm0635; AVX512-NEXT: vpsubd %ymm0, %ymm2, %ymm0636; AVX512-NEXT: retq637 %x0 = sext <8 x i32> %a0 to <8 x i64>638 %x1 = sext <8 x i32> %a1 to <8 x i64>639 %sum = add <8 x i64> %x0, %x1640 %inc = add <8 x i64> %sum, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>641 %shift = ashr <8 x i64> %inc, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>642 %res = trunc <8 x i64> %shift to <8 x i32>643 ret <8 x i32> %res644}645 646define <4 x i64> @test_fixed_v4i64(<4 x i64> %a0, <4 x i64> %a1) nounwind {647; SSE2-LABEL: test_fixed_v4i64:648; SSE2: # %bb.0:649; SSE2-NEXT: movdqa %xmm0, %xmm4650; SSE2-NEXT: pxor %xmm2, %xmm4651; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,3,2,3]652; SSE2-NEXT: psrad $1, %xmm5653; SSE2-NEXT: psrlq $1, %xmm4654; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]655; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]656; SSE2-NEXT: por %xmm2, %xmm0657; SSE2-NEXT: psubq %xmm4, %xmm0658; SSE2-NEXT: movdqa %xmm1, %xmm2659; SSE2-NEXT: pxor %xmm3, %xmm2660; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,3,2,3]661; SSE2-NEXT: psrad $1, %xmm4662; SSE2-NEXT: psrlq $1, %xmm2663; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]664; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]665; SSE2-NEXT: por %xmm3, %xmm1666; SSE2-NEXT: psubq %xmm2, %xmm1667; SSE2-NEXT: retq668;669; SSE4-LABEL: test_fixed_v4i64:670; SSE4: # %bb.0:671; SSE4-NEXT: movdqa %xmm0, %xmm4672; SSE4-NEXT: pxor %xmm2, %xmm4673; SSE4-NEXT: movdqa %xmm4, %xmm5674; SSE4-NEXT: psrad $1, %xmm5675; SSE4-NEXT: psrlq $1, %xmm4676; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]677; SSE4-NEXT: por %xmm2, %xmm0678; SSE4-NEXT: psubq %xmm4, %xmm0679; SSE4-NEXT: movdqa %xmm1, %xmm2680; SSE4-NEXT: pxor %xmm3, %xmm2681; SSE4-NEXT: movdqa %xmm2, %xmm4682; SSE4-NEXT: psrad $1, %xmm4683; SSE4-NEXT: psrlq $1, %xmm2684; SSE4-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm4[2,3],xmm2[4,5],xmm4[6,7]685; SSE4-NEXT: por %xmm3, %xmm1686; SSE4-NEXT: psubq %xmm2, %xmm1687; SSE4-NEXT: retq688;689; AVX1-LABEL: test_fixed_v4i64:690; AVX1: # %bb.0:691; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm2692; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3693; AVX1-NEXT: vpsrad $1, %xmm3, %xmm4694; AVX1-NEXT: vpsrlq $1, %xmm3, %xmm3695; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm4[2,3],xmm3[4,5],xmm4[6,7]696; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0697; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1698; AVX1-NEXT: vpsubq %xmm3, %xmm1, %xmm1699; AVX1-NEXT: vpsrad $1, %xmm2, %xmm3700; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm2701; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]702; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm0703; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0704; AVX1-NEXT: retq705;706; AVX2-LABEL: test_fixed_v4i64:707; AVX2: # %bb.0:708; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm2709; AVX2-NEXT: vpsrad $1, %ymm2, %ymm3710; AVX2-NEXT: vpsrlq $1, %ymm2, %ymm2711; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0],ymm3[1],ymm2[2],ymm3[3],ymm2[4],ymm3[5],ymm2[6],ymm3[7]712; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0713; AVX2-NEXT: vpsubq %ymm2, %ymm0, %ymm0714; AVX2-NEXT: retq715;716; AVX512-LABEL: test_fixed_v4i64:717; AVX512: # %bb.0:718; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm2719; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0720; AVX512-NEXT: vpsraq $1, %ymm0, %ymm0721; AVX512-NEXT: vpsubq %ymm0, %ymm2, %ymm0722; AVX512-NEXT: retq723 %or = or <4 x i64> %a0, %a1724 %xor = xor <4 x i64> %a1, %a0725 %shift = ashr <4 x i64> %xor, <i64 1, i64 1, i64 1, i64 1>726 %res = sub <4 x i64> %or, %shift727 ret <4 x i64> %res728}729 730define <4 x i64> @test_ext_v4i64(<4 x i64> %a0, <4 x i64> %a1) nounwind {731; SSE2-LABEL: test_ext_v4i64:732; SSE2: # %bb.0:733; SSE2-NEXT: movdqa %xmm0, %xmm4734; SSE2-NEXT: pxor %xmm2, %xmm4735; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,3,2,3]736; SSE2-NEXT: psrad $1, %xmm5737; SSE2-NEXT: psrlq $1, %xmm4738; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]739; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]740; SSE2-NEXT: por %xmm2, %xmm0741; SSE2-NEXT: psubq %xmm4, %xmm0742; SSE2-NEXT: movdqa %xmm1, %xmm2743; SSE2-NEXT: pxor %xmm3, %xmm2744; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,3,2,3]745; SSE2-NEXT: psrad $1, %xmm4746; SSE2-NEXT: psrlq $1, %xmm2747; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]748; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]749; SSE2-NEXT: por %xmm3, %xmm1750; SSE2-NEXT: psubq %xmm2, %xmm1751; SSE2-NEXT: retq752;753; SSE4-LABEL: test_ext_v4i64:754; SSE4: # %bb.0:755; SSE4-NEXT: movdqa %xmm0, %xmm4756; SSE4-NEXT: pxor %xmm2, %xmm4757; SSE4-NEXT: movdqa %xmm4, %xmm5758; SSE4-NEXT: psrad $1, %xmm5759; SSE4-NEXT: psrlq $1, %xmm4760; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]761; SSE4-NEXT: por %xmm2, %xmm0762; SSE4-NEXT: psubq %xmm4, %xmm0763; SSE4-NEXT: movdqa %xmm1, %xmm2764; SSE4-NEXT: pxor %xmm3, %xmm2765; SSE4-NEXT: movdqa %xmm2, %xmm4766; SSE4-NEXT: psrad $1, %xmm4767; SSE4-NEXT: psrlq $1, %xmm2768; SSE4-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm4[2,3],xmm2[4,5],xmm4[6,7]769; SSE4-NEXT: por %xmm3, %xmm1770; SSE4-NEXT: psubq %xmm2, %xmm1771; SSE4-NEXT: retq772;773; AVX1-LABEL: test_ext_v4i64:774; AVX1: # %bb.0:775; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm2776; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3777; AVX1-NEXT: vpsrad $1, %xmm3, %xmm4778; AVX1-NEXT: vpsrlq $1, %xmm3, %xmm3779; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm4[2,3],xmm3[4,5],xmm4[6,7]780; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0781; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1782; AVX1-NEXT: vpsubq %xmm3, %xmm1, %xmm1783; AVX1-NEXT: vpsrad $1, %xmm2, %xmm3784; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm2785; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]786; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm0787; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0788; AVX1-NEXT: retq789;790; AVX2-LABEL: test_ext_v4i64:791; AVX2: # %bb.0:792; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm2793; AVX2-NEXT: vpsrad $1, %ymm2, %ymm3794; AVX2-NEXT: vpsrlq $1, %ymm2, %ymm2795; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0],ymm3[1],ymm2[2],ymm3[3],ymm2[4],ymm3[5],ymm2[6],ymm3[7]796; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0797; AVX2-NEXT: vpsubq %ymm2, %ymm0, %ymm0798; AVX2-NEXT: retq799;800; AVX512-LABEL: test_ext_v4i64:801; AVX512: # %bb.0:802; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm2803; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0804; AVX512-NEXT: vpsraq $1, %ymm0, %ymm0805; AVX512-NEXT: vpsubq %ymm0, %ymm2, %ymm0806; AVX512-NEXT: retq807 %x0 = sext <4 x i64> %a0 to <4 x i128>808 %x1 = sext <4 x i64> %a1 to <4 x i128>809 %sum = add <4 x i128> %x0, %x1810 %inc = add <4 x i128> %sum, <i128 1, i128 1, i128 1, i128 1>811 %shift = ashr <4 x i128> %inc, <i128 1, i128 1, i128 1, i128 1>812 %res = trunc <4 x i128> %shift to <4 x i64>813 ret <4 x i64> %res814}815 816;817; 512-bit vectors818;819 820define <64 x i8> @test_fixed_v64i8(<64 x i8> %a0, <64 x i8> %a1) nounwind {821; SSE-LABEL: test_fixed_v64i8:822; SSE: # %bb.0:823; SSE-NEXT: movdqa {{.*#+}} xmm8 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]824; SSE-NEXT: pxor %xmm8, %xmm4825; SSE-NEXT: pxor %xmm8, %xmm0826; SSE-NEXT: pavgb %xmm4, %xmm0827; SSE-NEXT: pxor %xmm8, %xmm0828; SSE-NEXT: pxor %xmm8, %xmm5829; SSE-NEXT: pxor %xmm8, %xmm1830; SSE-NEXT: pavgb %xmm5, %xmm1831; SSE-NEXT: pxor %xmm8, %xmm1832; SSE-NEXT: pxor %xmm8, %xmm6833; SSE-NEXT: pxor %xmm8, %xmm2834; SSE-NEXT: pavgb %xmm6, %xmm2835; SSE-NEXT: pxor %xmm8, %xmm2836; SSE-NEXT: pxor %xmm8, %xmm7837; SSE-NEXT: pxor %xmm8, %xmm3838; SSE-NEXT: pavgb %xmm7, %xmm3839; SSE-NEXT: pxor %xmm8, %xmm3840; SSE-NEXT: retq841;842; AVX1-LABEL: test_fixed_v64i8:843; AVX1: # %bb.0:844; AVX1-NEXT: vbroadcastss {{.*#+}} ymm4 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]845; AVX1-NEXT: vxorps %ymm4, %ymm2, %ymm2846; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm5847; AVX1-NEXT: vxorps %ymm4, %ymm0, %ymm0848; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm6849; AVX1-NEXT: vpavgb %xmm5, %xmm6, %xmm5850; AVX1-NEXT: vpavgb %xmm2, %xmm0, %xmm0851; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm0, %ymm0852; AVX1-NEXT: vxorps %ymm4, %ymm0, %ymm0853; AVX1-NEXT: vxorps %ymm4, %ymm3, %ymm2854; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3855; AVX1-NEXT: vxorps %ymm4, %ymm1, %ymm1856; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5857; AVX1-NEXT: vpavgb %xmm3, %xmm5, %xmm3858; AVX1-NEXT: vpavgb %xmm2, %xmm1, %xmm1859; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1860; AVX1-NEXT: vxorps %ymm4, %ymm1, %ymm1861; AVX1-NEXT: retq862;863; AVX2-LABEL: test_fixed_v64i8:864; AVX2: # %bb.0:865; AVX2-NEXT: vpbroadcastb {{.*#+}} ymm4 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]866; AVX2-NEXT: vpxor %ymm4, %ymm2, %ymm2867; AVX2-NEXT: vpxor %ymm4, %ymm0, %ymm0868; AVX2-NEXT: vpavgb %ymm2, %ymm0, %ymm0869; AVX2-NEXT: vpxor %ymm4, %ymm0, %ymm0870; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm2871; AVX2-NEXT: vpxor %ymm4, %ymm1, %ymm1872; AVX2-NEXT: vpavgb %ymm2, %ymm1, %ymm1873; AVX2-NEXT: vpxor %ymm4, %ymm1, %ymm1874; AVX2-NEXT: retq875;876; AVX512-LABEL: test_fixed_v64i8:877; AVX512: # %bb.0:878; AVX512-NEXT: vpbroadcastd {{.*#+}} zmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]879; AVX512-NEXT: vpxorq %zmm2, %zmm1, %zmm1880; AVX512-NEXT: vpxorq %zmm2, %zmm0, %zmm0881; AVX512-NEXT: vpavgb %zmm1, %zmm0, %zmm0882; AVX512-NEXT: vpxorq %zmm2, %zmm0, %zmm0883; AVX512-NEXT: retq884 %or = or <64 x i8> %a0, %a1885 %xor = xor <64 x i8> %a0, %a1886 %shift = ashr <64 x i8> %xor, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>887 %res = sub <64 x i8> %or, %shift888 ret <64 x i8> %res889}890 891define <64 x i8> @test_ext_v64i8(<64 x i8> %a0, <64 x i8> %a1) nounwind {892; SSE-LABEL: test_ext_v64i8:893; SSE: # %bb.0:894; SSE-NEXT: movdqa {{.*#+}} xmm8 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]895; SSE-NEXT: pxor %xmm8, %xmm4896; SSE-NEXT: pxor %xmm8, %xmm0897; SSE-NEXT: pavgb %xmm4, %xmm0898; SSE-NEXT: pxor %xmm8, %xmm0899; SSE-NEXT: pxor %xmm8, %xmm5900; SSE-NEXT: pxor %xmm8, %xmm1901; SSE-NEXT: pavgb %xmm5, %xmm1902; SSE-NEXT: pxor %xmm8, %xmm1903; SSE-NEXT: pxor %xmm8, %xmm6904; SSE-NEXT: pxor %xmm8, %xmm2905; SSE-NEXT: pavgb %xmm6, %xmm2906; SSE-NEXT: pxor %xmm8, %xmm2907; SSE-NEXT: pxor %xmm8, %xmm7908; SSE-NEXT: pxor %xmm8, %xmm3909; SSE-NEXT: pavgb %xmm7, %xmm3910; SSE-NEXT: pxor %xmm8, %xmm3911; SSE-NEXT: retq912;913; AVX1-LABEL: test_ext_v64i8:914; AVX1: # %bb.0:915; AVX1-NEXT: vbroadcastss {{.*#+}} ymm4 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]916; AVX1-NEXT: vxorps %ymm4, %ymm2, %ymm2917; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm5918; AVX1-NEXT: vxorps %ymm4, %ymm0, %ymm0919; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm6920; AVX1-NEXT: vpavgb %xmm5, %xmm6, %xmm5921; AVX1-NEXT: vpavgb %xmm2, %xmm0, %xmm0922; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm0, %ymm0923; AVX1-NEXT: vxorps %ymm4, %ymm0, %ymm0924; AVX1-NEXT: vxorps %ymm4, %ymm3, %ymm2925; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3926; AVX1-NEXT: vxorps %ymm4, %ymm1, %ymm1927; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5928; AVX1-NEXT: vpavgb %xmm3, %xmm5, %xmm3929; AVX1-NEXT: vpavgb %xmm2, %xmm1, %xmm1930; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1931; AVX1-NEXT: vxorps %ymm4, %ymm1, %ymm1932; AVX1-NEXT: retq933;934; AVX2-LABEL: test_ext_v64i8:935; AVX2: # %bb.0:936; AVX2-NEXT: vpbroadcastb {{.*#+}} ymm4 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]937; AVX2-NEXT: vpxor %ymm4, %ymm2, %ymm2938; AVX2-NEXT: vpxor %ymm4, %ymm0, %ymm0939; AVX2-NEXT: vpavgb %ymm2, %ymm0, %ymm0940; AVX2-NEXT: vpxor %ymm4, %ymm0, %ymm0941; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm2942; AVX2-NEXT: vpxor %ymm4, %ymm1, %ymm1943; AVX2-NEXT: vpavgb %ymm2, %ymm1, %ymm1944; AVX2-NEXT: vpxor %ymm4, %ymm1, %ymm1945; AVX2-NEXT: retq946;947; AVX512-LABEL: test_ext_v64i8:948; AVX512: # %bb.0:949; AVX512-NEXT: vpbroadcastd {{.*#+}} zmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]950; AVX512-NEXT: vpxorq %zmm2, %zmm1, %zmm1951; AVX512-NEXT: vpxorq %zmm2, %zmm0, %zmm0952; AVX512-NEXT: vpavgb %zmm1, %zmm0, %zmm0953; AVX512-NEXT: vpxorq %zmm2, %zmm0, %zmm0954; AVX512-NEXT: retq955 %x0 = sext <64 x i8> %a0 to <64 x i16>956 %x1 = sext <64 x i8> %a1 to <64 x i16>957 %sum = add <64 x i16> %x0, %x1958 %inc = add <64 x i16> %sum, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>959 %shift = ashr <64 x i16> %inc, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>960 %res = trunc <64 x i16> %shift to <64 x i8>961 ret <64 x i8> %res962}963 964define <32 x i16> @test_fixed_v32i16(<32 x i16> %a0, <32 x i16> %a1) nounwind {965; SSE-LABEL: test_fixed_v32i16:966; SSE: # %bb.0:967; SSE-NEXT: movdqa %xmm0, %xmm8968; SSE-NEXT: por %xmm4, %xmm8969; SSE-NEXT: pxor %xmm4, %xmm0970; SSE-NEXT: psraw $1, %xmm0971; SSE-NEXT: psubw %xmm0, %xmm8972; SSE-NEXT: movdqa %xmm1, %xmm4973; SSE-NEXT: por %xmm5, %xmm4974; SSE-NEXT: pxor %xmm5, %xmm1975; SSE-NEXT: psraw $1, %xmm1976; SSE-NEXT: psubw %xmm1, %xmm4977; SSE-NEXT: movdqa %xmm2, %xmm5978; SSE-NEXT: por %xmm6, %xmm5979; SSE-NEXT: pxor %xmm6, %xmm2980; SSE-NEXT: psraw $1, %xmm2981; SSE-NEXT: psubw %xmm2, %xmm5982; SSE-NEXT: movdqa %xmm3, %xmm6983; SSE-NEXT: por %xmm7, %xmm6984; SSE-NEXT: pxor %xmm7, %xmm3985; SSE-NEXT: psraw $1, %xmm3986; SSE-NEXT: psubw %xmm3, %xmm6987; SSE-NEXT: movdqa %xmm8, %xmm0988; SSE-NEXT: movdqa %xmm4, %xmm1989; SSE-NEXT: movdqa %xmm5, %xmm2990; SSE-NEXT: movdqa %xmm6, %xmm3991; SSE-NEXT: retq992;993; AVX1-LABEL: test_fixed_v32i16:994; AVX1: # %bb.0:995; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm4996; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm5997; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0998; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2999; AVX1-NEXT: vpsraw $1, %xmm2, %xmm21000; AVX1-NEXT: vpsubw %xmm2, %xmm5, %xmm21001; AVX1-NEXT: vpsraw $1, %xmm0, %xmm01002; AVX1-NEXT: vpsubw %xmm0, %xmm4, %xmm01003; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01004; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm21005; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41006; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm11007; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31008; AVX1-NEXT: vpsraw $1, %xmm3, %xmm31009; AVX1-NEXT: vpsubw %xmm3, %xmm4, %xmm31010; AVX1-NEXT: vpsraw $1, %xmm1, %xmm11011; AVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm11012; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11013; AVX1-NEXT: retq1014;1015; AVX2-LABEL: test_fixed_v32i16:1016; AVX2: # %bb.0:1017; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm41018; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm01019; AVX2-NEXT: vpsraw $1, %ymm0, %ymm01020; AVX2-NEXT: vpsubw %ymm0, %ymm4, %ymm01021; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm21022; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm11023; AVX2-NEXT: vpsraw $1, %ymm1, %ymm11024; AVX2-NEXT: vpsubw %ymm1, %ymm2, %ymm11025; AVX2-NEXT: retq1026;1027; AVX512-LABEL: test_fixed_v32i16:1028; AVX512: # %bb.0:1029; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm21030; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm01031; AVX512-NEXT: vpsraw $1, %zmm0, %zmm01032; AVX512-NEXT: vpsubw %zmm0, %zmm2, %zmm01033; AVX512-NEXT: retq1034 %or = or <32 x i16> %a0, %a11035 %xor = xor <32 x i16> %a1, %a01036 %shift = ashr <32 x i16> %xor, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>1037 %res = sub <32 x i16> %or, %shift1038 ret <32 x i16> %res1039}1040 1041define <32 x i16> @test_ext_v32i16(<32 x i16> %a0, <32 x i16> %a1) nounwind {1042; SSE-LABEL: test_ext_v32i16:1043; SSE: # %bb.0:1044; SSE-NEXT: movdqa %xmm0, %xmm81045; SSE-NEXT: por %xmm4, %xmm81046; SSE-NEXT: pxor %xmm4, %xmm01047; SSE-NEXT: psraw $1, %xmm01048; SSE-NEXT: psubw %xmm0, %xmm81049; SSE-NEXT: movdqa %xmm1, %xmm41050; SSE-NEXT: por %xmm5, %xmm41051; SSE-NEXT: pxor %xmm5, %xmm11052; SSE-NEXT: psraw $1, %xmm11053; SSE-NEXT: psubw %xmm1, %xmm41054; SSE-NEXT: movdqa %xmm2, %xmm51055; SSE-NEXT: por %xmm6, %xmm51056; SSE-NEXT: pxor %xmm6, %xmm21057; SSE-NEXT: psraw $1, %xmm21058; SSE-NEXT: psubw %xmm2, %xmm51059; SSE-NEXT: movdqa %xmm3, %xmm61060; SSE-NEXT: por %xmm7, %xmm61061; SSE-NEXT: pxor %xmm7, %xmm31062; SSE-NEXT: psraw $1, %xmm31063; SSE-NEXT: psubw %xmm3, %xmm61064; SSE-NEXT: movdqa %xmm8, %xmm01065; SSE-NEXT: movdqa %xmm4, %xmm11066; SSE-NEXT: movdqa %xmm5, %xmm21067; SSE-NEXT: movdqa %xmm6, %xmm31068; SSE-NEXT: retq1069;1070; AVX1-LABEL: test_ext_v32i16:1071; AVX1: # %bb.0:1072; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm41073; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm51074; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm01075; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21076; AVX1-NEXT: vpsraw $1, %xmm2, %xmm21077; AVX1-NEXT: vpsubw %xmm2, %xmm5, %xmm21078; AVX1-NEXT: vpsraw $1, %xmm0, %xmm01079; AVX1-NEXT: vpsubw %xmm0, %xmm4, %xmm01080; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01081; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm21082; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41083; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm11084; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31085; AVX1-NEXT: vpsraw $1, %xmm3, %xmm31086; AVX1-NEXT: vpsubw %xmm3, %xmm4, %xmm31087; AVX1-NEXT: vpsraw $1, %xmm1, %xmm11088; AVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm11089; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11090; AVX1-NEXT: retq1091;1092; AVX2-LABEL: test_ext_v32i16:1093; AVX2: # %bb.0:1094; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm41095; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm01096; AVX2-NEXT: vpsraw $1, %ymm0, %ymm01097; AVX2-NEXT: vpsubw %ymm0, %ymm4, %ymm01098; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm21099; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm11100; AVX2-NEXT: vpsraw $1, %ymm1, %ymm11101; AVX2-NEXT: vpsubw %ymm1, %ymm2, %ymm11102; AVX2-NEXT: retq1103;1104; AVX512-LABEL: test_ext_v32i16:1105; AVX512: # %bb.0:1106; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm21107; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm01108; AVX512-NEXT: vpsraw $1, %zmm0, %zmm01109; AVX512-NEXT: vpsubw %zmm0, %zmm2, %zmm01110; AVX512-NEXT: retq1111 %x0 = sext <32 x i16> %a0 to <32 x i32>1112 %x1 = sext <32 x i16> %a1 to <32 x i32>1113 %sum = add <32 x i32> %x0, %x11114 %inc = add <32 x i32> %sum, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>1115 %shift = ashr <32 x i32> %inc, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>1116 %res = trunc <32 x i32> %shift to <32 x i16>1117 ret <32 x i16> %res1118}1119 1120define <16 x i32> @test_fixed_v16i32(<16 x i32> %a0, <16 x i32> %a1) nounwind {1121; SSE-LABEL: test_fixed_v16i32:1122; SSE: # %bb.0:1123; SSE-NEXT: movdqa %xmm0, %xmm81124; SSE-NEXT: por %xmm4, %xmm81125; SSE-NEXT: pxor %xmm4, %xmm01126; SSE-NEXT: psrad $1, %xmm01127; SSE-NEXT: psubd %xmm0, %xmm81128; SSE-NEXT: movdqa %xmm1, %xmm41129; SSE-NEXT: por %xmm5, %xmm41130; SSE-NEXT: pxor %xmm5, %xmm11131; SSE-NEXT: psrad $1, %xmm11132; SSE-NEXT: psubd %xmm1, %xmm41133; SSE-NEXT: movdqa %xmm2, %xmm51134; SSE-NEXT: por %xmm6, %xmm51135; SSE-NEXT: pxor %xmm6, %xmm21136; SSE-NEXT: psrad $1, %xmm21137; SSE-NEXT: psubd %xmm2, %xmm51138; SSE-NEXT: movdqa %xmm3, %xmm61139; SSE-NEXT: por %xmm7, %xmm61140; SSE-NEXT: pxor %xmm7, %xmm31141; SSE-NEXT: psrad $1, %xmm31142; SSE-NEXT: psubd %xmm3, %xmm61143; SSE-NEXT: movdqa %xmm8, %xmm01144; SSE-NEXT: movdqa %xmm4, %xmm11145; SSE-NEXT: movdqa %xmm5, %xmm21146; SSE-NEXT: movdqa %xmm6, %xmm31147; SSE-NEXT: retq1148;1149; AVX1-LABEL: test_fixed_v16i32:1150; AVX1: # %bb.0:1151; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm41152; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm51153; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm01154; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21155; AVX1-NEXT: vpsrad $1, %xmm2, %xmm21156; AVX1-NEXT: vpsubd %xmm2, %xmm5, %xmm21157; AVX1-NEXT: vpsrad $1, %xmm0, %xmm01158; AVX1-NEXT: vpsubd %xmm0, %xmm4, %xmm01159; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01160; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm21161; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41162; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm11163; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31164; AVX1-NEXT: vpsrad $1, %xmm3, %xmm31165; AVX1-NEXT: vpsubd %xmm3, %xmm4, %xmm31166; AVX1-NEXT: vpsrad $1, %xmm1, %xmm11167; AVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm11168; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11169; AVX1-NEXT: retq1170;1171; AVX2-LABEL: test_fixed_v16i32:1172; AVX2: # %bb.0:1173; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm41174; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm01175; AVX2-NEXT: vpsrad $1, %ymm0, %ymm01176; AVX2-NEXT: vpsubd %ymm0, %ymm4, %ymm01177; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm21178; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm11179; AVX2-NEXT: vpsrad $1, %ymm1, %ymm11180; AVX2-NEXT: vpsubd %ymm1, %ymm2, %ymm11181; AVX2-NEXT: retq1182;1183; AVX512-LABEL: test_fixed_v16i32:1184; AVX512: # %bb.0:1185; AVX512-NEXT: vpord %zmm1, %zmm0, %zmm21186; AVX512-NEXT: vpxord %zmm1, %zmm0, %zmm01187; AVX512-NEXT: vpsrad $1, %zmm0, %zmm01188; AVX512-NEXT: vpsubd %zmm0, %zmm2, %zmm01189; AVX512-NEXT: retq1190 %or = or <16 x i32> %a0, %a11191 %xor = xor <16 x i32> %a1, %a01192 %shift = ashr <16 x i32> %xor, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>1193 %res = sub <16 x i32> %or, %shift1194 ret <16 x i32> %res1195}1196 1197define <16 x i32> @test_ext_v16i32(<16 x i32> %a0, <16 x i32> %a1) nounwind {1198; SSE-LABEL: test_ext_v16i32:1199; SSE: # %bb.0:1200; SSE-NEXT: movdqa %xmm0, %xmm81201; SSE-NEXT: por %xmm4, %xmm81202; SSE-NEXT: pxor %xmm4, %xmm01203; SSE-NEXT: psrad $1, %xmm01204; SSE-NEXT: psubd %xmm0, %xmm81205; SSE-NEXT: movdqa %xmm1, %xmm41206; SSE-NEXT: por %xmm5, %xmm41207; SSE-NEXT: pxor %xmm5, %xmm11208; SSE-NEXT: psrad $1, %xmm11209; SSE-NEXT: psubd %xmm1, %xmm41210; SSE-NEXT: movdqa %xmm2, %xmm51211; SSE-NEXT: por %xmm6, %xmm51212; SSE-NEXT: pxor %xmm6, %xmm21213; SSE-NEXT: psrad $1, %xmm21214; SSE-NEXT: psubd %xmm2, %xmm51215; SSE-NEXT: movdqa %xmm3, %xmm61216; SSE-NEXT: por %xmm7, %xmm61217; SSE-NEXT: pxor %xmm7, %xmm31218; SSE-NEXT: psrad $1, %xmm31219; SSE-NEXT: psubd %xmm3, %xmm61220; SSE-NEXT: movdqa %xmm8, %xmm01221; SSE-NEXT: movdqa %xmm4, %xmm11222; SSE-NEXT: movdqa %xmm5, %xmm21223; SSE-NEXT: movdqa %xmm6, %xmm31224; SSE-NEXT: retq1225;1226; AVX1-LABEL: test_ext_v16i32:1227; AVX1: # %bb.0:1228; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm41229; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm51230; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm01231; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21232; AVX1-NEXT: vpsrad $1, %xmm2, %xmm21233; AVX1-NEXT: vpsubd %xmm2, %xmm5, %xmm21234; AVX1-NEXT: vpsrad $1, %xmm0, %xmm01235; AVX1-NEXT: vpsubd %xmm0, %xmm4, %xmm01236; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01237; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm21238; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41239; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm11240; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31241; AVX1-NEXT: vpsrad $1, %xmm3, %xmm31242; AVX1-NEXT: vpsubd %xmm3, %xmm4, %xmm31243; AVX1-NEXT: vpsrad $1, %xmm1, %xmm11244; AVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm11245; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11246; AVX1-NEXT: retq1247;1248; AVX2-LABEL: test_ext_v16i32:1249; AVX2: # %bb.0:1250; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm41251; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm01252; AVX2-NEXT: vpsrad $1, %ymm0, %ymm01253; AVX2-NEXT: vpsubd %ymm0, %ymm4, %ymm01254; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm21255; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm11256; AVX2-NEXT: vpsrad $1, %ymm1, %ymm11257; AVX2-NEXT: vpsubd %ymm1, %ymm2, %ymm11258; AVX2-NEXT: retq1259;1260; AVX512-LABEL: test_ext_v16i32:1261; AVX512: # %bb.0:1262; AVX512-NEXT: vpord %zmm1, %zmm0, %zmm21263; AVX512-NEXT: vpxord %zmm1, %zmm0, %zmm01264; AVX512-NEXT: vpsrad $1, %zmm0, %zmm01265; AVX512-NEXT: vpsubd %zmm0, %zmm2, %zmm01266; AVX512-NEXT: retq1267 %x0 = sext <16 x i32> %a0 to <16 x i64>1268 %x1 = sext <16 x i32> %a1 to <16 x i64>1269 %sum = add <16 x i64> %x0, %x11270 %inc = add <16 x i64> %sum, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>1271 %shift = ashr <16 x i64> %inc, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>1272 %res = trunc <16 x i64> %shift to <16 x i32>1273 ret <16 x i32> %res1274}1275 1276define <8 x i64> @test_fixed_v8i64(<8 x i64> %a0, <8 x i64> %a1) nounwind {1277; SSE2-LABEL: test_fixed_v8i64:1278; SSE2: # %bb.0:1279; SSE2-NEXT: movdqa %xmm0, %xmm81280; SSE2-NEXT: pxor %xmm4, %xmm81281; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm8[1,3,2,3]1282; SSE2-NEXT: psrad $1, %xmm91283; SSE2-NEXT: psrlq $1, %xmm81284; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]1285; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm9[0],xmm8[1],xmm9[1]1286; SSE2-NEXT: por %xmm4, %xmm01287; SSE2-NEXT: psubq %xmm8, %xmm01288; SSE2-NEXT: movdqa %xmm1, %xmm41289; SSE2-NEXT: pxor %xmm5, %xmm41290; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm4[1,3,2,3]1291; SSE2-NEXT: psrad $1, %xmm81292; SSE2-NEXT: psrlq $1, %xmm41293; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]1294; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm8[0],xmm4[1],xmm8[1]1295; SSE2-NEXT: por %xmm5, %xmm11296; SSE2-NEXT: psubq %xmm4, %xmm11297; SSE2-NEXT: movdqa %xmm2, %xmm41298; SSE2-NEXT: pxor %xmm6, %xmm41299; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,3,2,3]1300; SSE2-NEXT: psrad $1, %xmm51301; SSE2-NEXT: psrlq $1, %xmm41302; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]1303; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]1304; SSE2-NEXT: por %xmm6, %xmm21305; SSE2-NEXT: psubq %xmm4, %xmm21306; SSE2-NEXT: movdqa %xmm3, %xmm41307; SSE2-NEXT: pxor %xmm7, %xmm41308; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,3,2,3]1309; SSE2-NEXT: psrad $1, %xmm51310; SSE2-NEXT: psrlq $1, %xmm41311; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]1312; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]1313; SSE2-NEXT: por %xmm7, %xmm31314; SSE2-NEXT: psubq %xmm4, %xmm31315; SSE2-NEXT: retq1316;1317; SSE4-LABEL: test_fixed_v8i64:1318; SSE4: # %bb.0:1319; SSE4-NEXT: movdqa %xmm0, %xmm81320; SSE4-NEXT: pxor %xmm4, %xmm81321; SSE4-NEXT: movdqa %xmm8, %xmm91322; SSE4-NEXT: psrad $1, %xmm91323; SSE4-NEXT: psrlq $1, %xmm81324; SSE4-NEXT: pblendw {{.*#+}} xmm8 = xmm8[0,1],xmm9[2,3],xmm8[4,5],xmm9[6,7]1325; SSE4-NEXT: por %xmm4, %xmm01326; SSE4-NEXT: psubq %xmm8, %xmm01327; SSE4-NEXT: movdqa %xmm1, %xmm41328; SSE4-NEXT: pxor %xmm5, %xmm41329; SSE4-NEXT: movdqa %xmm4, %xmm81330; SSE4-NEXT: psrad $1, %xmm81331; SSE4-NEXT: psrlq $1, %xmm41332; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm8[2,3],xmm4[4,5],xmm8[6,7]1333; SSE4-NEXT: por %xmm5, %xmm11334; SSE4-NEXT: psubq %xmm4, %xmm11335; SSE4-NEXT: movdqa %xmm2, %xmm41336; SSE4-NEXT: pxor %xmm6, %xmm41337; SSE4-NEXT: movdqa %xmm4, %xmm51338; SSE4-NEXT: psrad $1, %xmm51339; SSE4-NEXT: psrlq $1, %xmm41340; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1341; SSE4-NEXT: por %xmm6, %xmm21342; SSE4-NEXT: psubq %xmm4, %xmm21343; SSE4-NEXT: movdqa %xmm3, %xmm41344; SSE4-NEXT: pxor %xmm7, %xmm41345; SSE4-NEXT: movdqa %xmm4, %xmm51346; SSE4-NEXT: psrad $1, %xmm51347; SSE4-NEXT: psrlq $1, %xmm41348; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1349; SSE4-NEXT: por %xmm7, %xmm31350; SSE4-NEXT: psubq %xmm4, %xmm31351; SSE4-NEXT: retq1352;1353; AVX1-LABEL: test_fixed_v8i64:1354; AVX1: # %bb.0:1355; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm41356; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm51357; AVX1-NEXT: vpsrad $1, %xmm5, %xmm61358; AVX1-NEXT: vpsrlq $1, %xmm5, %xmm51359; AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1],xmm6[2,3],xmm5[4,5],xmm6[6,7]1360; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm01361; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21362; AVX1-NEXT: vpsubq %xmm5, %xmm2, %xmm21363; AVX1-NEXT: vpsrad $1, %xmm4, %xmm51364; AVX1-NEXT: vpsrlq $1, %xmm4, %xmm41365; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1366; AVX1-NEXT: vpsubq %xmm4, %xmm0, %xmm01367; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01368; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm21369; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41370; AVX1-NEXT: vpsrad $1, %xmm4, %xmm51371; AVX1-NEXT: vpsrlq $1, %xmm4, %xmm41372; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1373; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm11374; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31375; AVX1-NEXT: vpsubq %xmm4, %xmm3, %xmm31376; AVX1-NEXT: vpsrad $1, %xmm2, %xmm41377; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm21378; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm4[2,3],xmm2[4,5],xmm4[6,7]1379; AVX1-NEXT: vpsubq %xmm2, %xmm1, %xmm11380; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11381; AVX1-NEXT: retq1382;1383; AVX2-LABEL: test_fixed_v8i64:1384; AVX2: # %bb.0:1385; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm41386; AVX2-NEXT: vpsrad $1, %ymm4, %ymm51387; AVX2-NEXT: vpsrlq $1, %ymm4, %ymm41388; AVX2-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0],ymm5[1],ymm4[2],ymm5[3],ymm4[4],ymm5[5],ymm4[6],ymm5[7]1389; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm01390; AVX2-NEXT: vpsubq %ymm4, %ymm0, %ymm01391; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm21392; AVX2-NEXT: vpsrad $1, %ymm2, %ymm41393; AVX2-NEXT: vpsrlq $1, %ymm2, %ymm21394; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0],ymm4[1],ymm2[2],ymm4[3],ymm2[4],ymm4[5],ymm2[6],ymm4[7]1395; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm11396; AVX2-NEXT: vpsubq %ymm2, %ymm1, %ymm11397; AVX2-NEXT: retq1398;1399; AVX512-LABEL: test_fixed_v8i64:1400; AVX512: # %bb.0:1401; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm21402; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm01403; AVX512-NEXT: vpsraq $1, %zmm0, %zmm01404; AVX512-NEXT: vpsubq %zmm0, %zmm2, %zmm01405; AVX512-NEXT: retq1406 %or = or <8 x i64> %a0, %a11407 %xor = xor <8 x i64> %a1, %a01408 %shift = ashr <8 x i64> %xor, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>1409 %res = sub <8 x i64> %or, %shift1410 ret <8 x i64> %res1411}1412 1413define <8 x i64> @test_ext_v8i64(<8 x i64> %a0, <8 x i64> %a1) nounwind {1414; SSE2-LABEL: test_ext_v8i64:1415; SSE2: # %bb.0:1416; SSE2-NEXT: movdqa %xmm0, %xmm81417; SSE2-NEXT: pxor %xmm4, %xmm81418; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm8[1,3,2,3]1419; SSE2-NEXT: psrad $1, %xmm91420; SSE2-NEXT: psrlq $1, %xmm81421; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]1422; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm9[0],xmm8[1],xmm9[1]1423; SSE2-NEXT: por %xmm4, %xmm01424; SSE2-NEXT: psubq %xmm8, %xmm01425; SSE2-NEXT: movdqa %xmm1, %xmm41426; SSE2-NEXT: pxor %xmm5, %xmm41427; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm4[1,3,2,3]1428; SSE2-NEXT: psrad $1, %xmm81429; SSE2-NEXT: psrlq $1, %xmm41430; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]1431; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm8[0],xmm4[1],xmm8[1]1432; SSE2-NEXT: por %xmm5, %xmm11433; SSE2-NEXT: psubq %xmm4, %xmm11434; SSE2-NEXT: movdqa %xmm2, %xmm41435; SSE2-NEXT: pxor %xmm6, %xmm41436; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,3,2,3]1437; SSE2-NEXT: psrad $1, %xmm51438; SSE2-NEXT: psrlq $1, %xmm41439; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]1440; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]1441; SSE2-NEXT: por %xmm6, %xmm21442; SSE2-NEXT: psubq %xmm4, %xmm21443; SSE2-NEXT: movdqa %xmm3, %xmm41444; SSE2-NEXT: pxor %xmm7, %xmm41445; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,3,2,3]1446; SSE2-NEXT: psrad $1, %xmm51447; SSE2-NEXT: psrlq $1, %xmm41448; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]1449; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]1450; SSE2-NEXT: por %xmm7, %xmm31451; SSE2-NEXT: psubq %xmm4, %xmm31452; SSE2-NEXT: retq1453;1454; SSE4-LABEL: test_ext_v8i64:1455; SSE4: # %bb.0:1456; SSE4-NEXT: movdqa %xmm0, %xmm81457; SSE4-NEXT: pxor %xmm4, %xmm81458; SSE4-NEXT: movdqa %xmm8, %xmm91459; SSE4-NEXT: psrad $1, %xmm91460; SSE4-NEXT: psrlq $1, %xmm81461; SSE4-NEXT: pblendw {{.*#+}} xmm8 = xmm8[0,1],xmm9[2,3],xmm8[4,5],xmm9[6,7]1462; SSE4-NEXT: por %xmm4, %xmm01463; SSE4-NEXT: psubq %xmm8, %xmm01464; SSE4-NEXT: movdqa %xmm1, %xmm41465; SSE4-NEXT: pxor %xmm5, %xmm41466; SSE4-NEXT: movdqa %xmm4, %xmm81467; SSE4-NEXT: psrad $1, %xmm81468; SSE4-NEXT: psrlq $1, %xmm41469; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm8[2,3],xmm4[4,5],xmm8[6,7]1470; SSE4-NEXT: por %xmm5, %xmm11471; SSE4-NEXT: psubq %xmm4, %xmm11472; SSE4-NEXT: movdqa %xmm2, %xmm41473; SSE4-NEXT: pxor %xmm6, %xmm41474; SSE4-NEXT: movdqa %xmm4, %xmm51475; SSE4-NEXT: psrad $1, %xmm51476; SSE4-NEXT: psrlq $1, %xmm41477; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1478; SSE4-NEXT: por %xmm6, %xmm21479; SSE4-NEXT: psubq %xmm4, %xmm21480; SSE4-NEXT: movdqa %xmm3, %xmm41481; SSE4-NEXT: pxor %xmm7, %xmm41482; SSE4-NEXT: movdqa %xmm4, %xmm51483; SSE4-NEXT: psrad $1, %xmm51484; SSE4-NEXT: psrlq $1, %xmm41485; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1486; SSE4-NEXT: por %xmm7, %xmm31487; SSE4-NEXT: psubq %xmm4, %xmm31488; SSE4-NEXT: retq1489;1490; AVX1-LABEL: test_ext_v8i64:1491; AVX1: # %bb.0:1492; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm41493; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm51494; AVX1-NEXT: vpsrad $1, %xmm5, %xmm61495; AVX1-NEXT: vpsrlq $1, %xmm5, %xmm51496; AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1],xmm6[2,3],xmm5[4,5],xmm6[6,7]1497; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm01498; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21499; AVX1-NEXT: vpsubq %xmm5, %xmm2, %xmm21500; AVX1-NEXT: vpsrad $1, %xmm4, %xmm51501; AVX1-NEXT: vpsrlq $1, %xmm4, %xmm41502; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1503; AVX1-NEXT: vpsubq %xmm4, %xmm0, %xmm01504; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01505; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm21506; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41507; AVX1-NEXT: vpsrad $1, %xmm4, %xmm51508; AVX1-NEXT: vpsrlq $1, %xmm4, %xmm41509; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1510; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm11511; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31512; AVX1-NEXT: vpsubq %xmm4, %xmm3, %xmm31513; AVX1-NEXT: vpsrad $1, %xmm2, %xmm41514; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm21515; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm4[2,3],xmm2[4,5],xmm4[6,7]1516; AVX1-NEXT: vpsubq %xmm2, %xmm1, %xmm11517; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11518; AVX1-NEXT: retq1519;1520; AVX2-LABEL: test_ext_v8i64:1521; AVX2: # %bb.0:1522; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm41523; AVX2-NEXT: vpsrad $1, %ymm4, %ymm51524; AVX2-NEXT: vpsrlq $1, %ymm4, %ymm41525; AVX2-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0],ymm5[1],ymm4[2],ymm5[3],ymm4[4],ymm5[5],ymm4[6],ymm5[7]1526; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm01527; AVX2-NEXT: vpsubq %ymm4, %ymm0, %ymm01528; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm21529; AVX2-NEXT: vpsrad $1, %ymm2, %ymm41530; AVX2-NEXT: vpsrlq $1, %ymm2, %ymm21531; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0],ymm4[1],ymm2[2],ymm4[3],ymm2[4],ymm4[5],ymm2[6],ymm4[7]1532; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm11533; AVX2-NEXT: vpsubq %ymm2, %ymm1, %ymm11534; AVX2-NEXT: retq1535;1536; AVX512-LABEL: test_ext_v8i64:1537; AVX512: # %bb.0:1538; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm21539; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm01540; AVX512-NEXT: vpsraq $1, %zmm0, %zmm01541; AVX512-NEXT: vpsubq %zmm0, %zmm2, %zmm01542; AVX512-NEXT: retq1543 %x0 = sext <8 x i64> %a0 to <8 x i128>1544 %x1 = sext <8 x i64> %a1 to <8 x i128>1545 %sum = add <8 x i128> %x0, %x11546 %inc = add <8 x i128> %sum, <i128 1, i128 1, i128 1, i128 1, i128 1, i128 1, i128 1, i128 1>1547 %shift = ashr <8 x i128> %inc, <i128 1, i128 1, i128 1, i128 1, i128 1, i128 1, i128 1, i128 1>1548 %res = trunc <8 x i128> %shift to <8 x i64>1549 ret <8 x i64> %res1550}1551 1552