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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE44; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX15; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX26; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX5127 8;9; 128-bit vectors10;11 12define <16 x i8> @test_fixed_v16i8(<16 x i8> %a0, <16 x i8> %a1) nounwind {13; SSE-LABEL: test_fixed_v16i8:14; SSE: # %bb.0:15; SSE-NEXT: movdqa %xmm0, %xmm216; SSE-NEXT: pand %xmm1, %xmm217; SSE-NEXT: pxor %xmm1, %xmm018; SSE-NEXT: psrlw $1, %xmm019; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm020; SSE-NEXT: movdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]21; SSE-NEXT: pxor %xmm1, %xmm022; SSE-NEXT: paddb %xmm2, %xmm023; SSE-NEXT: psubb %xmm1, %xmm024; SSE-NEXT: retq25;26; AVX1-LABEL: test_fixed_v16i8:27; AVX1: # %bb.0:28; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm229; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm030; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm031; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm032; AVX1-NEXT: vbroadcastss {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]33; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm034; AVX1-NEXT: vpaddb %xmm2, %xmm0, %xmm035; AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm036; AVX1-NEXT: retq37;38; AVX2-LABEL: test_fixed_v16i8:39; AVX2: # %bb.0:40; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm241; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm042; AVX2-NEXT: vpsrlw $1, %xmm0, %xmm043; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm044; AVX2-NEXT: vpbroadcastb {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]45; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm046; AVX2-NEXT: vpaddb %xmm2, %xmm0, %xmm047; AVX2-NEXT: vpsubb %xmm1, %xmm0, %xmm048; AVX2-NEXT: retq49;50; AVX512-LABEL: test_fixed_v16i8:51; AVX512: # %bb.0:52; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm253; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm054; AVX512-NEXT: vpsrlw $1, %xmm0, %xmm055; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]56; AVX512-NEXT: vpternlogd {{.*#+}} xmm0 = xmm1 ^ (xmm0 & m32bcst)57; AVX512-NEXT: vpaddb %xmm2, %xmm0, %xmm058; AVX512-NEXT: vpsubb %xmm1, %xmm0, %xmm059; AVX512-NEXT: retq60 %and = and <16 x i8> %a0, %a161 %xor = xor <16 x i8> %a0, %a162 %shift = ashr <16 x i8> %xor, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>63 %res = add <16 x i8> %and, %shift64 ret <16 x i8> %res65}66 67define <16 x i8> @test_ext_v16i8(<16 x i8> %a0, <16 x i8> %a1) nounwind {68; SSE-LABEL: test_ext_v16i8:69; SSE: # %bb.0:70; SSE-NEXT: movdqa %xmm0, %xmm271; SSE-NEXT: pand %xmm1, %xmm272; SSE-NEXT: pxor %xmm1, %xmm073; SSE-NEXT: psrlw $1, %xmm074; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm075; SSE-NEXT: movdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]76; SSE-NEXT: pxor %xmm1, %xmm077; SSE-NEXT: paddb %xmm2, %xmm078; SSE-NEXT: psubb %xmm1, %xmm079; SSE-NEXT: retq80;81; AVX1-LABEL: test_ext_v16i8:82; AVX1: # %bb.0:83; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm284; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm085; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm086; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm087; AVX1-NEXT: vbroadcastss {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]88; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm089; AVX1-NEXT: vpaddb %xmm2, %xmm0, %xmm090; AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm091; AVX1-NEXT: retq92;93; AVX2-LABEL: test_ext_v16i8:94; AVX2: # %bb.0:95; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm296; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm097; AVX2-NEXT: vpsrlw $1, %xmm0, %xmm098; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm099; AVX2-NEXT: vpbroadcastb {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]100; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0101; AVX2-NEXT: vpaddb %xmm2, %xmm0, %xmm0102; AVX2-NEXT: vpsubb %xmm1, %xmm0, %xmm0103; AVX2-NEXT: retq104;105; AVX512-LABEL: test_ext_v16i8:106; AVX512: # %bb.0:107; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm2108; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0109; AVX512-NEXT: vpsrlw $1, %xmm0, %xmm0110; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]111; AVX512-NEXT: vpternlogd {{.*#+}} xmm0 = xmm1 ^ (xmm0 & m32bcst)112; AVX512-NEXT: vpaddb %xmm2, %xmm0, %xmm0113; AVX512-NEXT: vpsubb %xmm1, %xmm0, %xmm0114; AVX512-NEXT: retq115 %x0 = sext <16 x i8> %a0 to <16 x i16>116 %x1 = sext <16 x i8> %a1 to <16 x i16>117 %sum = add <16 x i16> %x0, %x1118 %shift = ashr <16 x i16> %sum, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>119 %res = trunc <16 x i16> %shift to <16 x i8>120 ret <16 x i8> %res121}122 123define <8 x i16> @test_fixed_v8i16(<8 x i16> %a0, <8 x i16> %a1) nounwind {124; SSE-LABEL: test_fixed_v8i16:125; SSE: # %bb.0:126; SSE-NEXT: movdqa %xmm0, %xmm2127; SSE-NEXT: pand %xmm1, %xmm2128; SSE-NEXT: pxor %xmm1, %xmm0129; SSE-NEXT: psraw $1, %xmm0130; SSE-NEXT: paddw %xmm2, %xmm0131; SSE-NEXT: retq132;133; AVX-LABEL: test_fixed_v8i16:134; AVX: # %bb.0:135; AVX-NEXT: vpand %xmm1, %xmm0, %xmm2136; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0137; AVX-NEXT: vpsraw $1, %xmm0, %xmm0138; AVX-NEXT: vpaddw %xmm0, %xmm2, %xmm0139; AVX-NEXT: retq140 %and = and <8 x i16> %a0, %a1141 %xor = xor <8 x i16> %a1, %a0142 %shift = ashr <8 x i16> %xor, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>143 %res = add <8 x i16> %and, %shift144 ret <8 x i16> %res145}146 147define <8 x i16> @test_ext_v8i16(<8 x i16> %a0, <8 x i16> %a1) nounwind {148; SSE-LABEL: test_ext_v8i16:149; SSE: # %bb.0:150; SSE-NEXT: movdqa %xmm0, %xmm2151; SSE-NEXT: pand %xmm1, %xmm2152; SSE-NEXT: pxor %xmm1, %xmm0153; SSE-NEXT: psraw $1, %xmm0154; SSE-NEXT: paddw %xmm2, %xmm0155; SSE-NEXT: retq156;157; AVX-LABEL: test_ext_v8i16:158; AVX: # %bb.0:159; AVX-NEXT: vpand %xmm1, %xmm0, %xmm2160; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0161; AVX-NEXT: vpsraw $1, %xmm0, %xmm0162; AVX-NEXT: vpaddw %xmm0, %xmm2, %xmm0163; AVX-NEXT: retq164 %x0 = sext <8 x i16> %a0 to <8 x i32>165 %x1 = sext <8 x i16> %a1 to <8 x i32>166 %sum = add <8 x i32> %x0, %x1167 %shift = ashr <8 x i32> %sum, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>168 %res = trunc <8 x i32> %shift to <8 x i16>169 ret <8 x i16> %res170}171 172define <4 x i32> @test_fixed_v4i32(<4 x i32> %a0, <4 x i32> %a1) nounwind {173; SSE-LABEL: test_fixed_v4i32:174; SSE: # %bb.0:175; SSE-NEXT: movdqa %xmm0, %xmm2176; SSE-NEXT: pand %xmm1, %xmm2177; SSE-NEXT: pxor %xmm1, %xmm0178; SSE-NEXT: psrad $1, %xmm0179; SSE-NEXT: paddd %xmm2, %xmm0180; SSE-NEXT: retq181;182; AVX-LABEL: test_fixed_v4i32:183; AVX: # %bb.0:184; AVX-NEXT: vpand %xmm1, %xmm0, %xmm2185; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0186; AVX-NEXT: vpsrad $1, %xmm0, %xmm0187; AVX-NEXT: vpaddd %xmm0, %xmm2, %xmm0188; AVX-NEXT: retq189 %and = and <4 x i32> %a0, %a1190 %xor = xor <4 x i32> %a1, %a0191 %shift = ashr <4 x i32> %xor, <i32 1, i32 1, i32 1, i32 1>192 %res = add <4 x i32> %and, %shift193 ret <4 x i32> %res194}195 196define <4 x i32> @test_ext_v4i32(<4 x i32> %a0, <4 x i32> %a1) nounwind {197; SSE-LABEL: test_ext_v4i32:198; SSE: # %bb.0:199; SSE-NEXT: movdqa %xmm0, %xmm2200; SSE-NEXT: pand %xmm1, %xmm2201; SSE-NEXT: pxor %xmm1, %xmm0202; SSE-NEXT: psrad $1, %xmm0203; SSE-NEXT: paddd %xmm2, %xmm0204; SSE-NEXT: retq205;206; AVX-LABEL: test_ext_v4i32:207; AVX: # %bb.0:208; AVX-NEXT: vpand %xmm1, %xmm0, %xmm2209; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0210; AVX-NEXT: vpsrad $1, %xmm0, %xmm0211; AVX-NEXT: vpaddd %xmm0, %xmm2, %xmm0212; AVX-NEXT: retq213 %x0 = sext <4 x i32> %a0 to <4 x i64>214 %x1 = sext <4 x i32> %a1 to <4 x i64>215 %sum = add <4 x i64> %x0, %x1216 %shift = ashr <4 x i64> %sum, <i64 1, i64 1, i64 1, i64 1>217 %res = trunc <4 x i64> %shift to <4 x i32>218 ret <4 x i32> %res219}220 221define <2 x i64> @test_fixed_v2i64(<2 x i64> %a0, <2 x i64> %a1) nounwind {222; SSE2-LABEL: test_fixed_v2i64:223; SSE2: # %bb.0:224; SSE2-NEXT: movdqa %xmm0, %xmm2225; SSE2-NEXT: pxor %xmm1, %xmm2226; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,3,2,3]227; SSE2-NEXT: psrad $1, %xmm3228; SSE2-NEXT: psrlq $1, %xmm2229; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]230; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]231; SSE2-NEXT: pand %xmm1, %xmm0232; SSE2-NEXT: paddq %xmm2, %xmm0233; SSE2-NEXT: retq234;235; SSE4-LABEL: test_fixed_v2i64:236; SSE4: # %bb.0:237; SSE4-NEXT: movdqa %xmm0, %xmm2238; SSE4-NEXT: pxor %xmm1, %xmm2239; SSE4-NEXT: movdqa %xmm2, %xmm3240; SSE4-NEXT: psrad $1, %xmm3241; SSE4-NEXT: psrlq $1, %xmm2242; SSE4-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]243; SSE4-NEXT: pand %xmm1, %xmm0244; SSE4-NEXT: paddq %xmm2, %xmm0245; SSE4-NEXT: retq246;247; AVX1-LABEL: test_fixed_v2i64:248; AVX1: # %bb.0:249; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm2250; AVX1-NEXT: vpsrad $1, %xmm2, %xmm3251; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm2252; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]253; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0254; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm0255; AVX1-NEXT: retq256;257; AVX2-LABEL: test_fixed_v2i64:258; AVX2: # %bb.0:259; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm2260; AVX2-NEXT: vpsrad $1, %xmm2, %xmm3261; AVX2-NEXT: vpsrlq $1, %xmm2, %xmm2262; AVX2-NEXT: vpblendd {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3]263; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0264; AVX2-NEXT: vpaddq %xmm2, %xmm0, %xmm0265; AVX2-NEXT: retq266;267; AVX512-LABEL: test_fixed_v2i64:268; AVX512: # %bb.0:269; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm2270; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0271; AVX512-NEXT: vpsraq $1, %xmm0, %xmm0272; AVX512-NEXT: vpaddq %xmm0, %xmm2, %xmm0273; AVX512-NEXT: retq274 %and = and <2 x i64> %a0, %a1275 %xor = xor <2 x i64> %a1, %a0276 %shift = ashr <2 x i64> %xor, <i64 1, i64 1>277 %res = add <2 x i64> %and, %shift278 ret <2 x i64> %res279}280 281define <2 x i64> @test_ext_v2i64(<2 x i64> %a0, <2 x i64> %a1) nounwind {282; SSE2-LABEL: test_ext_v2i64:283; SSE2: # %bb.0:284; SSE2-NEXT: movdqa %xmm0, %xmm2285; SSE2-NEXT: pxor %xmm1, %xmm2286; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,3,2,3]287; SSE2-NEXT: psrad $1, %xmm3288; SSE2-NEXT: psrlq $1, %xmm2289; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]290; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]291; SSE2-NEXT: pand %xmm1, %xmm0292; SSE2-NEXT: paddq %xmm2, %xmm0293; SSE2-NEXT: retq294;295; SSE4-LABEL: test_ext_v2i64:296; SSE4: # %bb.0:297; SSE4-NEXT: movdqa %xmm0, %xmm2298; SSE4-NEXT: pxor %xmm1, %xmm2299; SSE4-NEXT: movdqa %xmm2, %xmm3300; SSE4-NEXT: psrad $1, %xmm3301; SSE4-NEXT: psrlq $1, %xmm2302; SSE4-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]303; SSE4-NEXT: pand %xmm1, %xmm0304; SSE4-NEXT: paddq %xmm2, %xmm0305; SSE4-NEXT: retq306;307; AVX1-LABEL: test_ext_v2i64:308; AVX1: # %bb.0:309; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm2310; AVX1-NEXT: vpsrad $1, %xmm2, %xmm3311; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm2312; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]313; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0314; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm0315; AVX1-NEXT: retq316;317; AVX2-LABEL: test_ext_v2i64:318; AVX2: # %bb.0:319; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm2320; AVX2-NEXT: vpsrad $1, %xmm2, %xmm3321; AVX2-NEXT: vpsrlq $1, %xmm2, %xmm2322; AVX2-NEXT: vpblendd {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3]323; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0324; AVX2-NEXT: vpaddq %xmm2, %xmm0, %xmm0325; AVX2-NEXT: retq326;327; AVX512-LABEL: test_ext_v2i64:328; AVX512: # %bb.0:329; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm2330; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0331; AVX512-NEXT: vpsraq $1, %xmm0, %xmm0332; AVX512-NEXT: vpaddq %xmm0, %xmm2, %xmm0333; AVX512-NEXT: retq334 %x0 = sext <2 x i64> %a0 to <2 x i128>335 %x1 = sext <2 x i64> %a1 to <2 x i128>336 %sum = add <2 x i128> %x0, %x1337 %shift = ashr <2 x i128> %sum, <i128 1, i128 1>338 %res = trunc <2 x i128> %shift to <2 x i64>339 ret <2 x i64> %res340}341 342;343; 256-bit vectors344;345 346define <32 x i8> @test_fixed_v32i8(<32 x i8> %a0, <32 x i8> %a1) nounwind {347; SSE-LABEL: test_fixed_v32i8:348; SSE: # %bb.0:349; SSE-NEXT: movdqa %xmm0, %xmm4350; SSE-NEXT: pand %xmm2, %xmm4351; SSE-NEXT: pxor %xmm2, %xmm0352; SSE-NEXT: psrlw $1, %xmm0353; SSE-NEXT: movdqa {{.*#+}} xmm2 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]354; SSE-NEXT: pand %xmm2, %xmm0355; SSE-NEXT: movdqa {{.*#+}} xmm5 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]356; SSE-NEXT: pxor %xmm5, %xmm0357; SSE-NEXT: paddb %xmm4, %xmm0358; SSE-NEXT: psubb %xmm5, %xmm0359; SSE-NEXT: movdqa %xmm1, %xmm4360; SSE-NEXT: pand %xmm3, %xmm4361; SSE-NEXT: pxor %xmm3, %xmm1362; SSE-NEXT: psrlw $1, %xmm1363; SSE-NEXT: pand %xmm2, %xmm1364; SSE-NEXT: pxor %xmm5, %xmm1365; SSE-NEXT: paddb %xmm4, %xmm1366; SSE-NEXT: psubb %xmm5, %xmm1367; SSE-NEXT: retq368;369; AVX1-LABEL: test_fixed_v32i8:370; AVX1: # %bb.0:371; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm2372; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3373; AVX1-NEXT: vpsrlw $1, %xmm3, %xmm3374; AVX1-NEXT: vbroadcastss {{.*#+}} xmm4 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]375; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3376; AVX1-NEXT: vbroadcastss {{.*#+}} xmm5 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]377; AVX1-NEXT: vpxor %xmm5, %xmm3, %xmm3378; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0379; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1380; AVX1-NEXT: vpaddb %xmm1, %xmm3, %xmm1381; AVX1-NEXT: vpsubb %xmm5, %xmm1, %xmm1382; AVX1-NEXT: vpsrlw $1, %xmm2, %xmm2383; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2384; AVX1-NEXT: vpxor %xmm5, %xmm2, %xmm2385; AVX1-NEXT: vpaddb %xmm0, %xmm2, %xmm0386; AVX1-NEXT: vpsubb %xmm5, %xmm0, %xmm0387; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0388; AVX1-NEXT: retq389;390; AVX2-LABEL: test_fixed_v32i8:391; AVX2: # %bb.0:392; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm2393; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0394; AVX2-NEXT: vpsrlw $1, %ymm0, %ymm0395; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0396; AVX2-NEXT: vpbroadcastb {{.*#+}} ymm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]397; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0398; AVX2-NEXT: vpaddb %ymm2, %ymm0, %ymm0399; AVX2-NEXT: vpsubb %ymm1, %ymm0, %ymm0400; AVX2-NEXT: retq401;402; AVX512-LABEL: test_fixed_v32i8:403; AVX512: # %bb.0:404; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm2405; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0406; AVX512-NEXT: vpsrlw $1, %ymm0, %ymm0407; AVX512-NEXT: vpbroadcastd {{.*#+}} ymm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]408; AVX512-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (ymm0 & m32bcst)409; AVX512-NEXT: vpaddb %ymm2, %ymm0, %ymm0410; AVX512-NEXT: vpsubb %ymm1, %ymm0, %ymm0411; AVX512-NEXT: retq412 %and = and <32 x i8> %a0, %a1413 %xor = xor <32 x i8> %a0, %a1414 %shift = ashr <32 x i8> %xor, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>415 %res = add <32 x i8> %and, %shift416 ret <32 x i8> %res417}418 419define <32 x i8> @test_ext_v32i8(<32 x i8> %a0, <32 x i8> %a1) nounwind {420; SSE-LABEL: test_ext_v32i8:421; SSE: # %bb.0:422; SSE-NEXT: movdqa %xmm0, %xmm4423; SSE-NEXT: pand %xmm2, %xmm4424; SSE-NEXT: pxor %xmm2, %xmm0425; SSE-NEXT: psrlw $1, %xmm0426; SSE-NEXT: movdqa {{.*#+}} xmm2 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]427; SSE-NEXT: pand %xmm2, %xmm0428; SSE-NEXT: movdqa {{.*#+}} xmm5 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]429; SSE-NEXT: pxor %xmm5, %xmm0430; SSE-NEXT: paddb %xmm4, %xmm0431; SSE-NEXT: psubb %xmm5, %xmm0432; SSE-NEXT: movdqa %xmm1, %xmm4433; SSE-NEXT: pand %xmm3, %xmm4434; SSE-NEXT: pxor %xmm3, %xmm1435; SSE-NEXT: psrlw $1, %xmm1436; SSE-NEXT: pand %xmm2, %xmm1437; SSE-NEXT: pxor %xmm5, %xmm1438; SSE-NEXT: paddb %xmm4, %xmm1439; SSE-NEXT: psubb %xmm5, %xmm1440; SSE-NEXT: retq441;442; AVX1-LABEL: test_ext_v32i8:443; AVX1: # %bb.0:444; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm2445; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3446; AVX1-NEXT: vpsrlw $1, %xmm3, %xmm3447; AVX1-NEXT: vbroadcastss {{.*#+}} xmm4 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]448; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3449; AVX1-NEXT: vbroadcastss {{.*#+}} xmm5 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]450; AVX1-NEXT: vpxor %xmm5, %xmm3, %xmm3451; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0452; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1453; AVX1-NEXT: vpaddb %xmm1, %xmm3, %xmm1454; AVX1-NEXT: vpsubb %xmm5, %xmm1, %xmm1455; AVX1-NEXT: vpsrlw $1, %xmm2, %xmm2456; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2457; AVX1-NEXT: vpxor %xmm5, %xmm2, %xmm2458; AVX1-NEXT: vpaddb %xmm0, %xmm2, %xmm0459; AVX1-NEXT: vpsubb %xmm5, %xmm0, %xmm0460; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0461; AVX1-NEXT: retq462;463; AVX2-LABEL: test_ext_v32i8:464; AVX2: # %bb.0:465; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm2466; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0467; AVX2-NEXT: vpsrlw $1, %ymm0, %ymm0468; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0469; AVX2-NEXT: vpbroadcastb {{.*#+}} ymm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]470; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0471; AVX2-NEXT: vpaddb %ymm2, %ymm0, %ymm0472; AVX2-NEXT: vpsubb %ymm1, %ymm0, %ymm0473; AVX2-NEXT: retq474;475; AVX512-LABEL: test_ext_v32i8:476; AVX512: # %bb.0:477; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm2478; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0479; AVX512-NEXT: vpsrlw $1, %ymm0, %ymm0480; AVX512-NEXT: vpbroadcastd {{.*#+}} ymm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]481; AVX512-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (ymm0 & m32bcst)482; AVX512-NEXT: vpaddb %ymm2, %ymm0, %ymm0483; AVX512-NEXT: vpsubb %ymm1, %ymm0, %ymm0484; AVX512-NEXT: retq485 %x0 = sext <32 x i8> %a0 to <32 x i16>486 %x1 = sext <32 x i8> %a1 to <32 x i16>487 %sum = add <32 x i16> %x0, %x1488 %shift = ashr <32 x i16> %sum, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>489 %res = trunc <32 x i16> %shift to <32 x i8>490 ret <32 x i8> %res491}492 493define <16 x i16> @test_fixed_v16i16(<16 x i16> %a0, <16 x i16> %a1) nounwind {494; SSE-LABEL: test_fixed_v16i16:495; SSE: # %bb.0:496; SSE-NEXT: movdqa %xmm0, %xmm4497; SSE-NEXT: pand %xmm2, %xmm4498; SSE-NEXT: pxor %xmm2, %xmm0499; SSE-NEXT: psraw $1, %xmm0500; SSE-NEXT: paddw %xmm4, %xmm0501; SSE-NEXT: movdqa %xmm1, %xmm2502; SSE-NEXT: pand %xmm3, %xmm2503; SSE-NEXT: pxor %xmm3, %xmm1504; SSE-NEXT: psraw $1, %xmm1505; SSE-NEXT: paddw %xmm2, %xmm1506; SSE-NEXT: retq507;508; AVX1-LABEL: test_fixed_v16i16:509; AVX1: # %bb.0:510; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm2511; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3512; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0513; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1514; AVX1-NEXT: vpsraw $1, %xmm1, %xmm1515; AVX1-NEXT: vpaddw %xmm1, %xmm3, %xmm1516; AVX1-NEXT: vpsraw $1, %xmm0, %xmm0517; AVX1-NEXT: vpaddw %xmm0, %xmm2, %xmm0518; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0519; AVX1-NEXT: retq520;521; AVX2-LABEL: test_fixed_v16i16:522; AVX2: # %bb.0:523; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm2524; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0525; AVX2-NEXT: vpsraw $1, %ymm0, %ymm0526; AVX2-NEXT: vpaddw %ymm0, %ymm2, %ymm0527; AVX2-NEXT: retq528;529; AVX512-LABEL: test_fixed_v16i16:530; AVX512: # %bb.0:531; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm2532; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0533; AVX512-NEXT: vpsraw $1, %ymm0, %ymm0534; AVX512-NEXT: vpaddw %ymm0, %ymm2, %ymm0535; AVX512-NEXT: retq536 %and = and <16 x i16> %a0, %a1537 %xor = xor <16 x i16> %a1, %a0538 %shift = ashr <16 x i16> %xor, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>539 %res = add <16 x i16> %and, %shift540 ret <16 x i16> %res541}542 543define <16 x i16> @test_ext_v16i16(<16 x i16> %a0, <16 x i16> %a1) nounwind {544; SSE-LABEL: test_ext_v16i16:545; SSE: # %bb.0:546; SSE-NEXT: movdqa %xmm0, %xmm4547; SSE-NEXT: pand %xmm2, %xmm4548; SSE-NEXT: pxor %xmm2, %xmm0549; SSE-NEXT: psraw $1, %xmm0550; SSE-NEXT: paddw %xmm4, %xmm0551; SSE-NEXT: movdqa %xmm1, %xmm2552; SSE-NEXT: pand %xmm3, %xmm2553; SSE-NEXT: pxor %xmm3, %xmm1554; SSE-NEXT: psraw $1, %xmm1555; SSE-NEXT: paddw %xmm2, %xmm1556; SSE-NEXT: retq557;558; AVX1-LABEL: test_ext_v16i16:559; AVX1: # %bb.0:560; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm2561; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3562; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0563; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1564; AVX1-NEXT: vpsraw $1, %xmm1, %xmm1565; AVX1-NEXT: vpaddw %xmm1, %xmm3, %xmm1566; AVX1-NEXT: vpsraw $1, %xmm0, %xmm0567; AVX1-NEXT: vpaddw %xmm0, %xmm2, %xmm0568; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0569; AVX1-NEXT: retq570;571; AVX2-LABEL: test_ext_v16i16:572; AVX2: # %bb.0:573; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm2574; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0575; AVX2-NEXT: vpsraw $1, %ymm0, %ymm0576; AVX2-NEXT: vpaddw %ymm0, %ymm2, %ymm0577; AVX2-NEXT: retq578;579; AVX512-LABEL: test_ext_v16i16:580; AVX512: # %bb.0:581; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm2582; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0583; AVX512-NEXT: vpsraw $1, %ymm0, %ymm0584; AVX512-NEXT: vpaddw %ymm0, %ymm2, %ymm0585; AVX512-NEXT: retq586 %x0 = sext <16 x i16> %a0 to <16 x i32>587 %x1 = sext <16 x i16> %a1 to <16 x i32>588 %sum = add <16 x i32> %x0, %x1589 %shift = ashr <16 x i32> %sum, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>590 %res = trunc <16 x i32> %shift to <16 x i16>591 ret <16 x i16> %res592}593 594define <8 x i32> @test_fixed_v8i32(<8 x i32> %a0, <8 x i32> %a1) nounwind {595; SSE-LABEL: test_fixed_v8i32:596; SSE: # %bb.0:597; SSE-NEXT: movdqa %xmm0, %xmm4598; SSE-NEXT: pand %xmm2, %xmm4599; SSE-NEXT: pxor %xmm2, %xmm0600; SSE-NEXT: psrad $1, %xmm0601; SSE-NEXT: paddd %xmm4, %xmm0602; SSE-NEXT: movdqa %xmm1, %xmm2603; SSE-NEXT: pand %xmm3, %xmm2604; SSE-NEXT: pxor %xmm3, %xmm1605; SSE-NEXT: psrad $1, %xmm1606; SSE-NEXT: paddd %xmm2, %xmm1607; SSE-NEXT: retq608;609; AVX1-LABEL: test_fixed_v8i32:610; AVX1: # %bb.0:611; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm2612; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3613; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0614; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1615; AVX1-NEXT: vpsrad $1, %xmm1, %xmm1616; AVX1-NEXT: vpaddd %xmm1, %xmm3, %xmm1617; AVX1-NEXT: vpsrad $1, %xmm0, %xmm0618; AVX1-NEXT: vpaddd %xmm0, %xmm2, %xmm0619; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0620; AVX1-NEXT: retq621;622; AVX2-LABEL: test_fixed_v8i32:623; AVX2: # %bb.0:624; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm2625; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0626; AVX2-NEXT: vpsrad $1, %ymm0, %ymm0627; AVX2-NEXT: vpaddd %ymm0, %ymm2, %ymm0628; AVX2-NEXT: retq629;630; AVX512-LABEL: test_fixed_v8i32:631; AVX512: # %bb.0:632; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm2633; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0634; AVX512-NEXT: vpsrad $1, %ymm0, %ymm0635; AVX512-NEXT: vpaddd %ymm0, %ymm2, %ymm0636; AVX512-NEXT: retq637 %and = and <8 x i32> %a0, %a1638 %xor = xor <8 x i32> %a1, %a0639 %shift = ashr <8 x i32> %xor, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>640 %res = add <8 x i32> %and, %shift641 ret <8 x i32> %res642}643 644define <8 x i32> @test_ext_v8i32(<8 x i32> %a0, <8 x i32> %a1) nounwind {645; SSE-LABEL: test_ext_v8i32:646; SSE: # %bb.0:647; SSE-NEXT: movdqa %xmm0, %xmm4648; SSE-NEXT: pand %xmm2, %xmm4649; SSE-NEXT: pxor %xmm2, %xmm0650; SSE-NEXT: psrad $1, %xmm0651; SSE-NEXT: paddd %xmm4, %xmm0652; SSE-NEXT: movdqa %xmm1, %xmm2653; SSE-NEXT: pand %xmm3, %xmm2654; SSE-NEXT: pxor %xmm3, %xmm1655; SSE-NEXT: psrad $1, %xmm1656; SSE-NEXT: paddd %xmm2, %xmm1657; SSE-NEXT: retq658;659; AVX1-LABEL: test_ext_v8i32:660; AVX1: # %bb.0:661; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm2662; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3663; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0664; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1665; AVX1-NEXT: vpsrad $1, %xmm1, %xmm1666; AVX1-NEXT: vpaddd %xmm1, %xmm3, %xmm1667; AVX1-NEXT: vpsrad $1, %xmm0, %xmm0668; AVX1-NEXT: vpaddd %xmm0, %xmm2, %xmm0669; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0670; AVX1-NEXT: retq671;672; AVX2-LABEL: test_ext_v8i32:673; AVX2: # %bb.0:674; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm2675; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0676; AVX2-NEXT: vpsrad $1, %ymm0, %ymm0677; AVX2-NEXT: vpaddd %ymm0, %ymm2, %ymm0678; AVX2-NEXT: retq679;680; AVX512-LABEL: test_ext_v8i32:681; AVX512: # %bb.0:682; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm2683; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0684; AVX512-NEXT: vpsrad $1, %ymm0, %ymm0685; AVX512-NEXT: vpaddd %ymm0, %ymm2, %ymm0686; AVX512-NEXT: retq687 %x0 = sext <8 x i32> %a0 to <8 x i64>688 %x1 = sext <8 x i32> %a1 to <8 x i64>689 %sum = add <8 x i64> %x0, %x1690 %shift = ashr <8 x i64> %sum, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>691 %res = trunc <8 x i64> %shift to <8 x i32>692 ret <8 x i32> %res693}694 695define <4 x i64> @test_fixed_v4i64(<4 x i64> %a0, <4 x i64> %a1) nounwind {696; SSE2-LABEL: test_fixed_v4i64:697; SSE2: # %bb.0:698; SSE2-NEXT: movdqa %xmm0, %xmm4699; SSE2-NEXT: pxor %xmm2, %xmm4700; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,3,2,3]701; SSE2-NEXT: psrad $1, %xmm5702; SSE2-NEXT: psrlq $1, %xmm4703; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]704; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]705; SSE2-NEXT: pand %xmm2, %xmm0706; SSE2-NEXT: paddq %xmm4, %xmm0707; SSE2-NEXT: movdqa %xmm1, %xmm2708; SSE2-NEXT: pxor %xmm3, %xmm2709; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,3,2,3]710; SSE2-NEXT: psrad $1, %xmm4711; SSE2-NEXT: psrlq $1, %xmm2712; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]713; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]714; SSE2-NEXT: pand %xmm3, %xmm1715; SSE2-NEXT: paddq %xmm2, %xmm1716; SSE2-NEXT: retq717;718; SSE4-LABEL: test_fixed_v4i64:719; SSE4: # %bb.0:720; SSE4-NEXT: movdqa %xmm0, %xmm4721; SSE4-NEXT: pxor %xmm2, %xmm4722; SSE4-NEXT: movdqa %xmm4, %xmm5723; SSE4-NEXT: psrad $1, %xmm5724; SSE4-NEXT: psrlq $1, %xmm4725; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]726; SSE4-NEXT: pand %xmm2, %xmm0727; SSE4-NEXT: paddq %xmm4, %xmm0728; SSE4-NEXT: movdqa %xmm1, %xmm2729; SSE4-NEXT: pxor %xmm3, %xmm2730; SSE4-NEXT: movdqa %xmm2, %xmm4731; SSE4-NEXT: psrad $1, %xmm4732; SSE4-NEXT: psrlq $1, %xmm2733; SSE4-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm4[2,3],xmm2[4,5],xmm4[6,7]734; SSE4-NEXT: pand %xmm3, %xmm1735; SSE4-NEXT: paddq %xmm2, %xmm1736; SSE4-NEXT: retq737;738; AVX1-LABEL: test_fixed_v4i64:739; AVX1: # %bb.0:740; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm2741; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3742; AVX1-NEXT: vpsrad $1, %xmm3, %xmm4743; AVX1-NEXT: vpsrlq $1, %xmm3, %xmm3744; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm4[2,3],xmm3[4,5],xmm4[6,7]745; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0746; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1747; AVX1-NEXT: vpaddq %xmm3, %xmm1, %xmm1748; AVX1-NEXT: vpsrad $1, %xmm2, %xmm3749; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm2750; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]751; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm0752; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0753; AVX1-NEXT: retq754;755; AVX2-LABEL: test_fixed_v4i64:756; AVX2: # %bb.0:757; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm2758; AVX2-NEXT: vpsrad $1, %ymm2, %ymm3759; AVX2-NEXT: vpsrlq $1, %ymm2, %ymm2760; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0],ymm3[1],ymm2[2],ymm3[3],ymm2[4],ymm3[5],ymm2[6],ymm3[7]761; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0762; AVX2-NEXT: vpaddq %ymm2, %ymm0, %ymm0763; AVX2-NEXT: retq764;765; AVX512-LABEL: test_fixed_v4i64:766; AVX512: # %bb.0:767; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm2768; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0769; AVX512-NEXT: vpsraq $1, %ymm0, %ymm0770; AVX512-NEXT: vpaddq %ymm0, %ymm2, %ymm0771; AVX512-NEXT: retq772 %and = and <4 x i64> %a0, %a1773 %xor = xor <4 x i64> %a1, %a0774 %shift = ashr <4 x i64> %xor, <i64 1, i64 1, i64 1, i64 1>775 %res = add <4 x i64> %and, %shift776 ret <4 x i64> %res777}778 779define <4 x i64> @test_ext_v4i64(<4 x i64> %a0, <4 x i64> %a1) nounwind {780; SSE2-LABEL: test_ext_v4i64:781; SSE2: # %bb.0:782; SSE2-NEXT: movdqa %xmm0, %xmm4783; SSE2-NEXT: pxor %xmm2, %xmm4784; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,3,2,3]785; SSE2-NEXT: psrad $1, %xmm5786; SSE2-NEXT: psrlq $1, %xmm4787; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]788; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]789; SSE2-NEXT: pand %xmm2, %xmm0790; SSE2-NEXT: paddq %xmm4, %xmm0791; SSE2-NEXT: movdqa %xmm1, %xmm2792; SSE2-NEXT: pxor %xmm3, %xmm2793; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,3,2,3]794; SSE2-NEXT: psrad $1, %xmm4795; SSE2-NEXT: psrlq $1, %xmm2796; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]797; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]798; SSE2-NEXT: pand %xmm3, %xmm1799; SSE2-NEXT: paddq %xmm2, %xmm1800; SSE2-NEXT: retq801;802; SSE4-LABEL: test_ext_v4i64:803; SSE4: # %bb.0:804; SSE4-NEXT: movdqa %xmm0, %xmm4805; SSE4-NEXT: pxor %xmm2, %xmm4806; SSE4-NEXT: movdqa %xmm4, %xmm5807; SSE4-NEXT: psrad $1, %xmm5808; SSE4-NEXT: psrlq $1, %xmm4809; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]810; SSE4-NEXT: pand %xmm2, %xmm0811; SSE4-NEXT: paddq %xmm4, %xmm0812; SSE4-NEXT: movdqa %xmm1, %xmm2813; SSE4-NEXT: pxor %xmm3, %xmm2814; SSE4-NEXT: movdqa %xmm2, %xmm4815; SSE4-NEXT: psrad $1, %xmm4816; SSE4-NEXT: psrlq $1, %xmm2817; SSE4-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm4[2,3],xmm2[4,5],xmm4[6,7]818; SSE4-NEXT: pand %xmm3, %xmm1819; SSE4-NEXT: paddq %xmm2, %xmm1820; SSE4-NEXT: retq821;822; AVX1-LABEL: test_ext_v4i64:823; AVX1: # %bb.0:824; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm2825; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3826; AVX1-NEXT: vpsrad $1, %xmm3, %xmm4827; AVX1-NEXT: vpsrlq $1, %xmm3, %xmm3828; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm4[2,3],xmm3[4,5],xmm4[6,7]829; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0830; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1831; AVX1-NEXT: vpaddq %xmm3, %xmm1, %xmm1832; AVX1-NEXT: vpsrad $1, %xmm2, %xmm3833; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm2834; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]835; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm0836; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0837; AVX1-NEXT: retq838;839; AVX2-LABEL: test_ext_v4i64:840; AVX2: # %bb.0:841; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm2842; AVX2-NEXT: vpsrad $1, %ymm2, %ymm3843; AVX2-NEXT: vpsrlq $1, %ymm2, %ymm2844; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0],ymm3[1],ymm2[2],ymm3[3],ymm2[4],ymm3[5],ymm2[6],ymm3[7]845; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0846; AVX2-NEXT: vpaddq %ymm2, %ymm0, %ymm0847; AVX2-NEXT: retq848;849; AVX512-LABEL: test_ext_v4i64:850; AVX512: # %bb.0:851; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm2852; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0853; AVX512-NEXT: vpsraq $1, %ymm0, %ymm0854; AVX512-NEXT: vpaddq %ymm0, %ymm2, %ymm0855; AVX512-NEXT: retq856 %x0 = sext <4 x i64> %a0 to <4 x i128>857 %x1 = sext <4 x i64> %a1 to <4 x i128>858 %sum = add <4 x i128> %x0, %x1859 %shift = ashr <4 x i128> %sum, <i128 1, i128 1, i128 1, i128 1>860 %res = trunc <4 x i128> %shift to <4 x i64>861 ret <4 x i64> %res862}863 864;865; 512-bit vectors866;867 868define <64 x i8> @test_fixed_v64i8(<64 x i8> %a0, <64 x i8> %a1) nounwind {869; SSE-LABEL: test_fixed_v64i8:870; SSE: # %bb.0:871; SSE-NEXT: movdqa %xmm0, %xmm9872; SSE-NEXT: pand %xmm4, %xmm9873; SSE-NEXT: pxor %xmm4, %xmm0874; SSE-NEXT: psrlw $1, %xmm0875; SSE-NEXT: movdqa {{.*#+}} xmm8 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]876; SSE-NEXT: pand %xmm8, %xmm0877; SSE-NEXT: movdqa {{.*#+}} xmm4 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]878; SSE-NEXT: pxor %xmm4, %xmm0879; SSE-NEXT: paddb %xmm9, %xmm0880; SSE-NEXT: psubb %xmm4, %xmm0881; SSE-NEXT: movdqa %xmm1, %xmm9882; SSE-NEXT: pand %xmm5, %xmm9883; SSE-NEXT: pxor %xmm5, %xmm1884; SSE-NEXT: psrlw $1, %xmm1885; SSE-NEXT: pand %xmm8, %xmm1886; SSE-NEXT: pxor %xmm4, %xmm1887; SSE-NEXT: paddb %xmm9, %xmm1888; SSE-NEXT: psubb %xmm4, %xmm1889; SSE-NEXT: movdqa %xmm2, %xmm5890; SSE-NEXT: pand %xmm6, %xmm5891; SSE-NEXT: pxor %xmm6, %xmm2892; SSE-NEXT: psrlw $1, %xmm2893; SSE-NEXT: pand %xmm8, %xmm2894; SSE-NEXT: pxor %xmm4, %xmm2895; SSE-NEXT: paddb %xmm5, %xmm2896; SSE-NEXT: psubb %xmm4, %xmm2897; SSE-NEXT: movdqa %xmm3, %xmm5898; SSE-NEXT: pand %xmm7, %xmm5899; SSE-NEXT: pxor %xmm7, %xmm3900; SSE-NEXT: psrlw $1, %xmm3901; SSE-NEXT: pand %xmm8, %xmm3902; SSE-NEXT: pxor %xmm4, %xmm3903; SSE-NEXT: paddb %xmm5, %xmm3904; SSE-NEXT: psubb %xmm4, %xmm3905; SSE-NEXT: retq906;907; AVX1-LABEL: test_fixed_v64i8:908; AVX1: # %bb.0:909; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm4910; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm5911; AVX1-NEXT: vpsrlw $1, %xmm5, %xmm5912; AVX1-NEXT: vbroadcastss {{.*#+}} xmm6 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]913; AVX1-NEXT: vpand %xmm6, %xmm5, %xmm5914; AVX1-NEXT: vbroadcastss {{.*#+}} xmm7 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]915; AVX1-NEXT: vpxor %xmm7, %xmm5, %xmm5916; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0917; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2918; AVX1-NEXT: vpaddb %xmm2, %xmm5, %xmm2919; AVX1-NEXT: vpsubb %xmm7, %xmm2, %xmm2920; AVX1-NEXT: vpsrlw $1, %xmm4, %xmm4921; AVX1-NEXT: vpand %xmm6, %xmm4, %xmm4922; AVX1-NEXT: vpxor %xmm7, %xmm4, %xmm4923; AVX1-NEXT: vpaddb %xmm0, %xmm4, %xmm0924; AVX1-NEXT: vpsubb %xmm7, %xmm0, %xmm0925; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0926; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm2927; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4928; AVX1-NEXT: vpsrlw $1, %xmm4, %xmm4929; AVX1-NEXT: vpand %xmm6, %xmm4, %xmm4930; AVX1-NEXT: vpxor %xmm7, %xmm4, %xmm4931; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm1932; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3933; AVX1-NEXT: vpaddb %xmm3, %xmm4, %xmm3934; AVX1-NEXT: vpsubb %xmm7, %xmm3, %xmm3935; AVX1-NEXT: vpsrlw $1, %xmm2, %xmm2936; AVX1-NEXT: vpand %xmm6, %xmm2, %xmm2937; AVX1-NEXT: vpxor %xmm7, %xmm2, %xmm2938; AVX1-NEXT: vpaddb %xmm1, %xmm2, %xmm1939; AVX1-NEXT: vpsubb %xmm7, %xmm1, %xmm1940; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1941; AVX1-NEXT: retq942;943; AVX2-LABEL: test_fixed_v64i8:944; AVX2: # %bb.0:945; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm4946; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0947; AVX2-NEXT: vpsrlw $1, %ymm0, %ymm0948; AVX2-NEXT: vpbroadcastb {{.*#+}} ymm2 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]949; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0950; AVX2-NEXT: vpbroadcastb {{.*#+}} ymm5 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]951; AVX2-NEXT: vpxor %ymm5, %ymm0, %ymm0952; AVX2-NEXT: vpaddb %ymm4, %ymm0, %ymm0953; AVX2-NEXT: vpsubb %ymm5, %ymm0, %ymm0954; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm4955; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1956; AVX2-NEXT: vpsrlw $1, %ymm1, %ymm1957; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1958; AVX2-NEXT: vpxor %ymm5, %ymm1, %ymm1959; AVX2-NEXT: vpaddb %ymm4, %ymm1, %ymm1960; AVX2-NEXT: vpsubb %ymm5, %ymm1, %ymm1961; AVX2-NEXT: retq962;963; AVX512-LABEL: test_fixed_v64i8:964; AVX512: # %bb.0:965; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm2966; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0967; AVX512-NEXT: vpsrlw $1, %zmm0, %zmm0968; AVX512-NEXT: vpbroadcastd {{.*#+}} zmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]969; AVX512-NEXT: vpternlogd {{.*#+}} zmm0 = zmm1 ^ (zmm0 & m32bcst)970; AVX512-NEXT: vpaddb %zmm2, %zmm0, %zmm0971; AVX512-NEXT: vpsubb %zmm1, %zmm0, %zmm0972; AVX512-NEXT: retq973 %and = and <64 x i8> %a0, %a1974 %xor = xor <64 x i8> %a0, %a1975 %shift = ashr <64 x i8> %xor, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>976 %res = add <64 x i8> %and, %shift977 ret <64 x i8> %res978}979 980define <64 x i8> @test_ext_v64i8(<64 x i8> %a0, <64 x i8> %a1) nounwind {981; SSE-LABEL: test_ext_v64i8:982; SSE: # %bb.0:983; SSE-NEXT: movdqa %xmm0, %xmm9984; SSE-NEXT: pand %xmm4, %xmm9985; SSE-NEXT: pxor %xmm4, %xmm0986; SSE-NEXT: psrlw $1, %xmm0987; SSE-NEXT: movdqa {{.*#+}} xmm8 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]988; SSE-NEXT: pand %xmm8, %xmm0989; SSE-NEXT: movdqa {{.*#+}} xmm4 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]990; SSE-NEXT: pxor %xmm4, %xmm0991; SSE-NEXT: paddb %xmm9, %xmm0992; SSE-NEXT: psubb %xmm4, %xmm0993; SSE-NEXT: movdqa %xmm1, %xmm9994; SSE-NEXT: pand %xmm5, %xmm9995; SSE-NEXT: pxor %xmm5, %xmm1996; SSE-NEXT: psrlw $1, %xmm1997; SSE-NEXT: pand %xmm8, %xmm1998; SSE-NEXT: pxor %xmm4, %xmm1999; SSE-NEXT: paddb %xmm9, %xmm11000; SSE-NEXT: psubb %xmm4, %xmm11001; SSE-NEXT: movdqa %xmm2, %xmm51002; SSE-NEXT: pand %xmm6, %xmm51003; SSE-NEXT: pxor %xmm6, %xmm21004; SSE-NEXT: psrlw $1, %xmm21005; SSE-NEXT: pand %xmm8, %xmm21006; SSE-NEXT: pxor %xmm4, %xmm21007; SSE-NEXT: paddb %xmm5, %xmm21008; SSE-NEXT: psubb %xmm4, %xmm21009; SSE-NEXT: movdqa %xmm3, %xmm51010; SSE-NEXT: pand %xmm7, %xmm51011; SSE-NEXT: pxor %xmm7, %xmm31012; SSE-NEXT: psrlw $1, %xmm31013; SSE-NEXT: pand %xmm8, %xmm31014; SSE-NEXT: pxor %xmm4, %xmm31015; SSE-NEXT: paddb %xmm5, %xmm31016; SSE-NEXT: psubb %xmm4, %xmm31017; SSE-NEXT: retq1018;1019; AVX1-LABEL: test_ext_v64i8:1020; AVX1: # %bb.0:1021; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm41022; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm51023; AVX1-NEXT: vpsrlw $1, %xmm5, %xmm51024; AVX1-NEXT: vbroadcastss {{.*#+}} xmm6 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]1025; AVX1-NEXT: vpand %xmm6, %xmm5, %xmm51026; AVX1-NEXT: vbroadcastss {{.*#+}} xmm7 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]1027; AVX1-NEXT: vpxor %xmm7, %xmm5, %xmm51028; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm01029; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21030; AVX1-NEXT: vpaddb %xmm2, %xmm5, %xmm21031; AVX1-NEXT: vpsubb %xmm7, %xmm2, %xmm21032; AVX1-NEXT: vpsrlw $1, %xmm4, %xmm41033; AVX1-NEXT: vpand %xmm6, %xmm4, %xmm41034; AVX1-NEXT: vpxor %xmm7, %xmm4, %xmm41035; AVX1-NEXT: vpaddb %xmm0, %xmm4, %xmm01036; AVX1-NEXT: vpsubb %xmm7, %xmm0, %xmm01037; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01038; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm21039; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41040; AVX1-NEXT: vpsrlw $1, %xmm4, %xmm41041; AVX1-NEXT: vpand %xmm6, %xmm4, %xmm41042; AVX1-NEXT: vpxor %xmm7, %xmm4, %xmm41043; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm11044; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31045; AVX1-NEXT: vpaddb %xmm3, %xmm4, %xmm31046; AVX1-NEXT: vpsubb %xmm7, %xmm3, %xmm31047; AVX1-NEXT: vpsrlw $1, %xmm2, %xmm21048; AVX1-NEXT: vpand %xmm6, %xmm2, %xmm21049; AVX1-NEXT: vpxor %xmm7, %xmm2, %xmm21050; AVX1-NEXT: vpaddb %xmm1, %xmm2, %xmm11051; AVX1-NEXT: vpsubb %xmm7, %xmm1, %xmm11052; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11053; AVX1-NEXT: retq1054;1055; AVX2-LABEL: test_ext_v64i8:1056; AVX2: # %bb.0:1057; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm41058; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm01059; AVX2-NEXT: vpsrlw $1, %ymm0, %ymm01060; AVX2-NEXT: vpbroadcastb {{.*#+}} ymm2 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]1061; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm01062; AVX2-NEXT: vpbroadcastb {{.*#+}} ymm5 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]1063; AVX2-NEXT: vpxor %ymm5, %ymm0, %ymm01064; AVX2-NEXT: vpaddb %ymm4, %ymm0, %ymm01065; AVX2-NEXT: vpsubb %ymm5, %ymm0, %ymm01066; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm41067; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm11068; AVX2-NEXT: vpsrlw $1, %ymm1, %ymm11069; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm11070; AVX2-NEXT: vpxor %ymm5, %ymm1, %ymm11071; AVX2-NEXT: vpaddb %ymm4, %ymm1, %ymm11072; AVX2-NEXT: vpsubb %ymm5, %ymm1, %ymm11073; AVX2-NEXT: retq1074;1075; AVX512-LABEL: test_ext_v64i8:1076; AVX512: # %bb.0:1077; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm21078; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm01079; AVX512-NEXT: vpsrlw $1, %zmm0, %zmm01080; AVX512-NEXT: vpbroadcastd {{.*#+}} zmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]1081; AVX512-NEXT: vpternlogd {{.*#+}} zmm0 = zmm1 ^ (zmm0 & m32bcst)1082; AVX512-NEXT: vpaddb %zmm2, %zmm0, %zmm01083; AVX512-NEXT: vpsubb %zmm1, %zmm0, %zmm01084; AVX512-NEXT: retq1085 %x0 = sext <64 x i8> %a0 to <64 x i16>1086 %x1 = sext <64 x i8> %a1 to <64 x i16>1087 %sum = add <64 x i16> %x0, %x11088 %shift = ashr <64 x i16> %sum, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>1089 %res = trunc <64 x i16> %shift to <64 x i8>1090 ret <64 x i8> %res1091}1092 1093define <32 x i16> @test_fixed_v32i16(<32 x i16> %a0, <32 x i16> %a1) nounwind {1094; SSE-LABEL: test_fixed_v32i16:1095; SSE: # %bb.0:1096; SSE-NEXT: movdqa %xmm0, %xmm81097; SSE-NEXT: pand %xmm4, %xmm81098; SSE-NEXT: pxor %xmm4, %xmm01099; SSE-NEXT: psraw $1, %xmm01100; SSE-NEXT: paddw %xmm8, %xmm01101; SSE-NEXT: movdqa %xmm1, %xmm41102; SSE-NEXT: pand %xmm5, %xmm41103; SSE-NEXT: pxor %xmm5, %xmm11104; SSE-NEXT: psraw $1, %xmm11105; SSE-NEXT: paddw %xmm4, %xmm11106; SSE-NEXT: movdqa %xmm2, %xmm41107; SSE-NEXT: pand %xmm6, %xmm41108; SSE-NEXT: pxor %xmm6, %xmm21109; SSE-NEXT: psraw $1, %xmm21110; SSE-NEXT: paddw %xmm4, %xmm21111; SSE-NEXT: movdqa %xmm3, %xmm41112; SSE-NEXT: pand %xmm7, %xmm41113; SSE-NEXT: pxor %xmm7, %xmm31114; SSE-NEXT: psraw $1, %xmm31115; SSE-NEXT: paddw %xmm4, %xmm31116; SSE-NEXT: retq1117;1118; AVX1-LABEL: test_fixed_v32i16:1119; AVX1: # %bb.0:1120; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm41121; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm51122; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm01123; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21124; AVX1-NEXT: vpsraw $1, %xmm2, %xmm21125; AVX1-NEXT: vpaddw %xmm2, %xmm5, %xmm21126; AVX1-NEXT: vpsraw $1, %xmm0, %xmm01127; AVX1-NEXT: vpaddw %xmm0, %xmm4, %xmm01128; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01129; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm21130; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41131; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm11132; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31133; AVX1-NEXT: vpsraw $1, %xmm3, %xmm31134; AVX1-NEXT: vpaddw %xmm3, %xmm4, %xmm31135; AVX1-NEXT: vpsraw $1, %xmm1, %xmm11136; AVX1-NEXT: vpaddw %xmm1, %xmm2, %xmm11137; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11138; AVX1-NEXT: retq1139;1140; AVX2-LABEL: test_fixed_v32i16:1141; AVX2: # %bb.0:1142; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm41143; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm01144; AVX2-NEXT: vpsraw $1, %ymm0, %ymm01145; AVX2-NEXT: vpaddw %ymm0, %ymm4, %ymm01146; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm21147; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm11148; AVX2-NEXT: vpsraw $1, %ymm1, %ymm11149; AVX2-NEXT: vpaddw %ymm1, %ymm2, %ymm11150; AVX2-NEXT: retq1151;1152; AVX512-LABEL: test_fixed_v32i16:1153; AVX512: # %bb.0:1154; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm21155; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm01156; AVX512-NEXT: vpsraw $1, %zmm0, %zmm01157; AVX512-NEXT: vpaddw %zmm0, %zmm2, %zmm01158; AVX512-NEXT: retq1159 %and = and <32 x i16> %a0, %a11160 %xor = xor <32 x i16> %a1, %a01161 %shift = ashr <32 x i16> %xor, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>1162 %res = add <32 x i16> %and, %shift1163 ret <32 x i16> %res1164}1165 1166define <32 x i16> @test_ext_v32i16(<32 x i16> %a0, <32 x i16> %a1) nounwind {1167; SSE-LABEL: test_ext_v32i16:1168; SSE: # %bb.0:1169; SSE-NEXT: movdqa %xmm0, %xmm81170; SSE-NEXT: pand %xmm4, %xmm81171; SSE-NEXT: pxor %xmm4, %xmm01172; SSE-NEXT: psraw $1, %xmm01173; SSE-NEXT: paddw %xmm8, %xmm01174; SSE-NEXT: movdqa %xmm1, %xmm41175; SSE-NEXT: pand %xmm5, %xmm41176; SSE-NEXT: pxor %xmm5, %xmm11177; SSE-NEXT: psraw $1, %xmm11178; SSE-NEXT: paddw %xmm4, %xmm11179; SSE-NEXT: movdqa %xmm2, %xmm41180; SSE-NEXT: pand %xmm6, %xmm41181; SSE-NEXT: pxor %xmm6, %xmm21182; SSE-NEXT: psraw $1, %xmm21183; SSE-NEXT: paddw %xmm4, %xmm21184; SSE-NEXT: movdqa %xmm3, %xmm41185; SSE-NEXT: pand %xmm7, %xmm41186; SSE-NEXT: pxor %xmm7, %xmm31187; SSE-NEXT: psraw $1, %xmm31188; SSE-NEXT: paddw %xmm4, %xmm31189; SSE-NEXT: retq1190;1191; AVX1-LABEL: test_ext_v32i16:1192; AVX1: # %bb.0:1193; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm41194; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm51195; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm01196; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21197; AVX1-NEXT: vpsraw $1, %xmm2, %xmm21198; AVX1-NEXT: vpaddw %xmm2, %xmm5, %xmm21199; AVX1-NEXT: vpsraw $1, %xmm0, %xmm01200; AVX1-NEXT: vpaddw %xmm0, %xmm4, %xmm01201; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01202; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm21203; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41204; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm11205; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31206; AVX1-NEXT: vpsraw $1, %xmm3, %xmm31207; AVX1-NEXT: vpaddw %xmm3, %xmm4, %xmm31208; AVX1-NEXT: vpsraw $1, %xmm1, %xmm11209; AVX1-NEXT: vpaddw %xmm1, %xmm2, %xmm11210; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11211; AVX1-NEXT: retq1212;1213; AVX2-LABEL: test_ext_v32i16:1214; AVX2: # %bb.0:1215; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm41216; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm01217; AVX2-NEXT: vpsraw $1, %ymm0, %ymm01218; AVX2-NEXT: vpaddw %ymm0, %ymm4, %ymm01219; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm21220; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm11221; AVX2-NEXT: vpsraw $1, %ymm1, %ymm11222; AVX2-NEXT: vpaddw %ymm1, %ymm2, %ymm11223; AVX2-NEXT: retq1224;1225; AVX512-LABEL: test_ext_v32i16:1226; AVX512: # %bb.0:1227; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm21228; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm01229; AVX512-NEXT: vpsraw $1, %zmm0, %zmm01230; AVX512-NEXT: vpaddw %zmm0, %zmm2, %zmm01231; AVX512-NEXT: retq1232 %x0 = sext <32 x i16> %a0 to <32 x i32>1233 %x1 = sext <32 x i16> %a1 to <32 x i32>1234 %sum = add <32 x i32> %x0, %x11235 %shift = ashr <32 x i32> %sum, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>1236 %res = trunc <32 x i32> %shift to <32 x i16>1237 ret <32 x i16> %res1238}1239 1240define <16 x i32> @test_fixed_v16i32(<16 x i32> %a0, <16 x i32> %a1) nounwind {1241; SSE-LABEL: test_fixed_v16i32:1242; SSE: # %bb.0:1243; SSE-NEXT: movdqa %xmm0, %xmm81244; SSE-NEXT: pand %xmm4, %xmm81245; SSE-NEXT: pxor %xmm4, %xmm01246; SSE-NEXT: psrad $1, %xmm01247; SSE-NEXT: paddd %xmm8, %xmm01248; SSE-NEXT: movdqa %xmm1, %xmm41249; SSE-NEXT: pand %xmm5, %xmm41250; SSE-NEXT: pxor %xmm5, %xmm11251; SSE-NEXT: psrad $1, %xmm11252; SSE-NEXT: paddd %xmm4, %xmm11253; SSE-NEXT: movdqa %xmm2, %xmm41254; SSE-NEXT: pand %xmm6, %xmm41255; SSE-NEXT: pxor %xmm6, %xmm21256; SSE-NEXT: psrad $1, %xmm21257; SSE-NEXT: paddd %xmm4, %xmm21258; SSE-NEXT: movdqa %xmm3, %xmm41259; SSE-NEXT: pand %xmm7, %xmm41260; SSE-NEXT: pxor %xmm7, %xmm31261; SSE-NEXT: psrad $1, %xmm31262; SSE-NEXT: paddd %xmm4, %xmm31263; SSE-NEXT: retq1264;1265; AVX1-LABEL: test_fixed_v16i32:1266; AVX1: # %bb.0:1267; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm41268; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm51269; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm01270; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21271; AVX1-NEXT: vpsrad $1, %xmm2, %xmm21272; AVX1-NEXT: vpaddd %xmm2, %xmm5, %xmm21273; AVX1-NEXT: vpsrad $1, %xmm0, %xmm01274; AVX1-NEXT: vpaddd %xmm0, %xmm4, %xmm01275; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01276; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm21277; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41278; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm11279; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31280; AVX1-NEXT: vpsrad $1, %xmm3, %xmm31281; AVX1-NEXT: vpaddd %xmm3, %xmm4, %xmm31282; AVX1-NEXT: vpsrad $1, %xmm1, %xmm11283; AVX1-NEXT: vpaddd %xmm1, %xmm2, %xmm11284; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11285; AVX1-NEXT: retq1286;1287; AVX2-LABEL: test_fixed_v16i32:1288; AVX2: # %bb.0:1289; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm41290; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm01291; AVX2-NEXT: vpsrad $1, %ymm0, %ymm01292; AVX2-NEXT: vpaddd %ymm0, %ymm4, %ymm01293; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm21294; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm11295; AVX2-NEXT: vpsrad $1, %ymm1, %ymm11296; AVX2-NEXT: vpaddd %ymm1, %ymm2, %ymm11297; AVX2-NEXT: retq1298;1299; AVX512-LABEL: test_fixed_v16i32:1300; AVX512: # %bb.0:1301; AVX512-NEXT: vpandd %zmm1, %zmm0, %zmm21302; AVX512-NEXT: vpxord %zmm1, %zmm0, %zmm01303; AVX512-NEXT: vpsrad $1, %zmm0, %zmm01304; AVX512-NEXT: vpaddd %zmm0, %zmm2, %zmm01305; AVX512-NEXT: retq1306 %and = and <16 x i32> %a0, %a11307 %xor = xor <16 x i32> %a1, %a01308 %shift = ashr <16 x i32> %xor, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>1309 %res = add <16 x i32> %and, %shift1310 ret <16 x i32> %res1311}1312 1313define <16 x i32> @test_ext_v16i32(<16 x i32> %a0, <16 x i32> %a1) nounwind {1314; SSE-LABEL: test_ext_v16i32:1315; SSE: # %bb.0:1316; SSE-NEXT: movdqa %xmm0, %xmm81317; SSE-NEXT: pand %xmm4, %xmm81318; SSE-NEXT: pxor %xmm4, %xmm01319; SSE-NEXT: psrad $1, %xmm01320; SSE-NEXT: paddd %xmm8, %xmm01321; SSE-NEXT: movdqa %xmm1, %xmm41322; SSE-NEXT: pand %xmm5, %xmm41323; SSE-NEXT: pxor %xmm5, %xmm11324; SSE-NEXT: psrad $1, %xmm11325; SSE-NEXT: paddd %xmm4, %xmm11326; SSE-NEXT: movdqa %xmm2, %xmm41327; SSE-NEXT: pand %xmm6, %xmm41328; SSE-NEXT: pxor %xmm6, %xmm21329; SSE-NEXT: psrad $1, %xmm21330; SSE-NEXT: paddd %xmm4, %xmm21331; SSE-NEXT: movdqa %xmm3, %xmm41332; SSE-NEXT: pand %xmm7, %xmm41333; SSE-NEXT: pxor %xmm7, %xmm31334; SSE-NEXT: psrad $1, %xmm31335; SSE-NEXT: paddd %xmm4, %xmm31336; SSE-NEXT: retq1337;1338; AVX1-LABEL: test_ext_v16i32:1339; AVX1: # %bb.0:1340; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm41341; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm51342; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm01343; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21344; AVX1-NEXT: vpsrad $1, %xmm2, %xmm21345; AVX1-NEXT: vpaddd %xmm2, %xmm5, %xmm21346; AVX1-NEXT: vpsrad $1, %xmm0, %xmm01347; AVX1-NEXT: vpaddd %xmm0, %xmm4, %xmm01348; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01349; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm21350; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41351; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm11352; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31353; AVX1-NEXT: vpsrad $1, %xmm3, %xmm31354; AVX1-NEXT: vpaddd %xmm3, %xmm4, %xmm31355; AVX1-NEXT: vpsrad $1, %xmm1, %xmm11356; AVX1-NEXT: vpaddd %xmm1, %xmm2, %xmm11357; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11358; AVX1-NEXT: retq1359;1360; AVX2-LABEL: test_ext_v16i32:1361; AVX2: # %bb.0:1362; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm41363; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm01364; AVX2-NEXT: vpsrad $1, %ymm0, %ymm01365; AVX2-NEXT: vpaddd %ymm0, %ymm4, %ymm01366; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm21367; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm11368; AVX2-NEXT: vpsrad $1, %ymm1, %ymm11369; AVX2-NEXT: vpaddd %ymm1, %ymm2, %ymm11370; AVX2-NEXT: retq1371;1372; AVX512-LABEL: test_ext_v16i32:1373; AVX512: # %bb.0:1374; AVX512-NEXT: vpandd %zmm1, %zmm0, %zmm21375; AVX512-NEXT: vpxord %zmm1, %zmm0, %zmm01376; AVX512-NEXT: vpsrad $1, %zmm0, %zmm01377; AVX512-NEXT: vpaddd %zmm0, %zmm2, %zmm01378; AVX512-NEXT: retq1379 %x0 = sext <16 x i32> %a0 to <16 x i64>1380 %x1 = sext <16 x i32> %a1 to <16 x i64>1381 %sum = add <16 x i64> %x0, %x11382 %shift = ashr <16 x i64> %sum, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>1383 %res = trunc <16 x i64> %shift to <16 x i32>1384 ret <16 x i32> %res1385}1386 1387define <8 x i64> @test_fixed_v8i64(<8 x i64> %a0, <8 x i64> %a1) nounwind {1388; SSE2-LABEL: test_fixed_v8i64:1389; SSE2: # %bb.0:1390; SSE2-NEXT: movdqa %xmm0, %xmm81391; SSE2-NEXT: pxor %xmm4, %xmm81392; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm8[1,3,2,3]1393; SSE2-NEXT: psrad $1, %xmm91394; SSE2-NEXT: psrlq $1, %xmm81395; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]1396; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm9[0],xmm8[1],xmm9[1]1397; SSE2-NEXT: pand %xmm4, %xmm01398; SSE2-NEXT: paddq %xmm8, %xmm01399; SSE2-NEXT: movdqa %xmm1, %xmm41400; SSE2-NEXT: pxor %xmm5, %xmm41401; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm4[1,3,2,3]1402; SSE2-NEXT: psrad $1, %xmm81403; SSE2-NEXT: psrlq $1, %xmm41404; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]1405; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm8[0],xmm4[1],xmm8[1]1406; SSE2-NEXT: pand %xmm5, %xmm11407; SSE2-NEXT: paddq %xmm4, %xmm11408; SSE2-NEXT: movdqa %xmm2, %xmm41409; SSE2-NEXT: pxor %xmm6, %xmm41410; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,3,2,3]1411; SSE2-NEXT: psrad $1, %xmm51412; SSE2-NEXT: psrlq $1, %xmm41413; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]1414; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]1415; SSE2-NEXT: pand %xmm6, %xmm21416; SSE2-NEXT: paddq %xmm4, %xmm21417; SSE2-NEXT: movdqa %xmm3, %xmm41418; SSE2-NEXT: pxor %xmm7, %xmm41419; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,3,2,3]1420; SSE2-NEXT: psrad $1, %xmm51421; SSE2-NEXT: psrlq $1, %xmm41422; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]1423; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]1424; SSE2-NEXT: pand %xmm7, %xmm31425; SSE2-NEXT: paddq %xmm4, %xmm31426; SSE2-NEXT: retq1427;1428; SSE4-LABEL: test_fixed_v8i64:1429; SSE4: # %bb.0:1430; SSE4-NEXT: movdqa %xmm0, %xmm81431; SSE4-NEXT: pxor %xmm4, %xmm81432; SSE4-NEXT: movdqa %xmm8, %xmm91433; SSE4-NEXT: psrad $1, %xmm91434; SSE4-NEXT: psrlq $1, %xmm81435; SSE4-NEXT: pblendw {{.*#+}} xmm8 = xmm8[0,1],xmm9[2,3],xmm8[4,5],xmm9[6,7]1436; SSE4-NEXT: pand %xmm4, %xmm01437; SSE4-NEXT: paddq %xmm8, %xmm01438; SSE4-NEXT: movdqa %xmm1, %xmm41439; SSE4-NEXT: pxor %xmm5, %xmm41440; SSE4-NEXT: movdqa %xmm4, %xmm81441; SSE4-NEXT: psrad $1, %xmm81442; SSE4-NEXT: psrlq $1, %xmm41443; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm8[2,3],xmm4[4,5],xmm8[6,7]1444; SSE4-NEXT: pand %xmm5, %xmm11445; SSE4-NEXT: paddq %xmm4, %xmm11446; SSE4-NEXT: movdqa %xmm2, %xmm41447; SSE4-NEXT: pxor %xmm6, %xmm41448; SSE4-NEXT: movdqa %xmm4, %xmm51449; SSE4-NEXT: psrad $1, %xmm51450; SSE4-NEXT: psrlq $1, %xmm41451; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1452; SSE4-NEXT: pand %xmm6, %xmm21453; SSE4-NEXT: paddq %xmm4, %xmm21454; SSE4-NEXT: movdqa %xmm3, %xmm41455; SSE4-NEXT: pxor %xmm7, %xmm41456; SSE4-NEXT: movdqa %xmm4, %xmm51457; SSE4-NEXT: psrad $1, %xmm51458; SSE4-NEXT: psrlq $1, %xmm41459; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1460; SSE4-NEXT: pand %xmm7, %xmm31461; SSE4-NEXT: paddq %xmm4, %xmm31462; SSE4-NEXT: retq1463;1464; AVX1-LABEL: test_fixed_v8i64:1465; AVX1: # %bb.0:1466; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm41467; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm51468; AVX1-NEXT: vpsrad $1, %xmm5, %xmm61469; AVX1-NEXT: vpsrlq $1, %xmm5, %xmm51470; AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1],xmm6[2,3],xmm5[4,5],xmm6[6,7]1471; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm01472; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21473; AVX1-NEXT: vpaddq %xmm5, %xmm2, %xmm21474; AVX1-NEXT: vpsrad $1, %xmm4, %xmm51475; AVX1-NEXT: vpsrlq $1, %xmm4, %xmm41476; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1477; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm01478; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01479; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm21480; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41481; AVX1-NEXT: vpsrad $1, %xmm4, %xmm51482; AVX1-NEXT: vpsrlq $1, %xmm4, %xmm41483; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1484; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm11485; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31486; AVX1-NEXT: vpaddq %xmm4, %xmm3, %xmm31487; AVX1-NEXT: vpsrad $1, %xmm2, %xmm41488; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm21489; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm4[2,3],xmm2[4,5],xmm4[6,7]1490; AVX1-NEXT: vpaddq %xmm2, %xmm1, %xmm11491; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11492; AVX1-NEXT: retq1493;1494; AVX2-LABEL: test_fixed_v8i64:1495; AVX2: # %bb.0:1496; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm41497; AVX2-NEXT: vpsrad $1, %ymm4, %ymm51498; AVX2-NEXT: vpsrlq $1, %ymm4, %ymm41499; AVX2-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0],ymm5[1],ymm4[2],ymm5[3],ymm4[4],ymm5[5],ymm4[6],ymm5[7]1500; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm01501; AVX2-NEXT: vpaddq %ymm4, %ymm0, %ymm01502; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm21503; AVX2-NEXT: vpsrad $1, %ymm2, %ymm41504; AVX2-NEXT: vpsrlq $1, %ymm2, %ymm21505; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0],ymm4[1],ymm2[2],ymm4[3],ymm2[4],ymm4[5],ymm2[6],ymm4[7]1506; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm11507; AVX2-NEXT: vpaddq %ymm2, %ymm1, %ymm11508; AVX2-NEXT: retq1509;1510; AVX512-LABEL: test_fixed_v8i64:1511; AVX512: # %bb.0:1512; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm21513; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm01514; AVX512-NEXT: vpsraq $1, %zmm0, %zmm01515; AVX512-NEXT: vpaddq %zmm0, %zmm2, %zmm01516; AVX512-NEXT: retq1517 %and = and <8 x i64> %a0, %a11518 %xor = xor <8 x i64> %a1, %a01519 %shift = ashr <8 x i64> %xor, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>1520 %res = add <8 x i64> %and, %shift1521 ret <8 x i64> %res1522}1523 1524define <8 x i64> @test_ext_v8i64(<8 x i64> %a0, <8 x i64> %a1) nounwind {1525; SSE2-LABEL: test_ext_v8i64:1526; SSE2: # %bb.0:1527; SSE2-NEXT: movdqa %xmm0, %xmm81528; SSE2-NEXT: pxor %xmm4, %xmm81529; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm8[1,3,2,3]1530; SSE2-NEXT: psrad $1, %xmm91531; SSE2-NEXT: psrlq $1, %xmm81532; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]1533; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm9[0],xmm8[1],xmm9[1]1534; SSE2-NEXT: pand %xmm4, %xmm01535; SSE2-NEXT: paddq %xmm8, %xmm01536; SSE2-NEXT: movdqa %xmm1, %xmm41537; SSE2-NEXT: pxor %xmm5, %xmm41538; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm4[1,3,2,3]1539; SSE2-NEXT: psrad $1, %xmm81540; SSE2-NEXT: psrlq $1, %xmm41541; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]1542; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm8[0],xmm4[1],xmm8[1]1543; SSE2-NEXT: pand %xmm5, %xmm11544; SSE2-NEXT: paddq %xmm4, %xmm11545; SSE2-NEXT: movdqa %xmm2, %xmm41546; SSE2-NEXT: pxor %xmm6, %xmm41547; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,3,2,3]1548; SSE2-NEXT: psrad $1, %xmm51549; SSE2-NEXT: psrlq $1, %xmm41550; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]1551; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]1552; SSE2-NEXT: pand %xmm6, %xmm21553; SSE2-NEXT: paddq %xmm4, %xmm21554; SSE2-NEXT: movdqa %xmm3, %xmm41555; SSE2-NEXT: pxor %xmm7, %xmm41556; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,3,2,3]1557; SSE2-NEXT: psrad $1, %xmm51558; SSE2-NEXT: psrlq $1, %xmm41559; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]1560; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]1561; SSE2-NEXT: pand %xmm7, %xmm31562; SSE2-NEXT: paddq %xmm4, %xmm31563; SSE2-NEXT: retq1564;1565; SSE4-LABEL: test_ext_v8i64:1566; SSE4: # %bb.0:1567; SSE4-NEXT: movdqa %xmm0, %xmm81568; SSE4-NEXT: pxor %xmm4, %xmm81569; SSE4-NEXT: movdqa %xmm8, %xmm91570; SSE4-NEXT: psrad $1, %xmm91571; SSE4-NEXT: psrlq $1, %xmm81572; SSE4-NEXT: pblendw {{.*#+}} xmm8 = xmm8[0,1],xmm9[2,3],xmm8[4,5],xmm9[6,7]1573; SSE4-NEXT: pand %xmm4, %xmm01574; SSE4-NEXT: paddq %xmm8, %xmm01575; SSE4-NEXT: movdqa %xmm1, %xmm41576; SSE4-NEXT: pxor %xmm5, %xmm41577; SSE4-NEXT: movdqa %xmm4, %xmm81578; SSE4-NEXT: psrad $1, %xmm81579; SSE4-NEXT: psrlq $1, %xmm41580; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm8[2,3],xmm4[4,5],xmm8[6,7]1581; SSE4-NEXT: pand %xmm5, %xmm11582; SSE4-NEXT: paddq %xmm4, %xmm11583; SSE4-NEXT: movdqa %xmm2, %xmm41584; SSE4-NEXT: pxor %xmm6, %xmm41585; SSE4-NEXT: movdqa %xmm4, %xmm51586; SSE4-NEXT: psrad $1, %xmm51587; SSE4-NEXT: psrlq $1, %xmm41588; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1589; SSE4-NEXT: pand %xmm6, %xmm21590; SSE4-NEXT: paddq %xmm4, %xmm21591; SSE4-NEXT: movdqa %xmm3, %xmm41592; SSE4-NEXT: pxor %xmm7, %xmm41593; SSE4-NEXT: movdqa %xmm4, %xmm51594; SSE4-NEXT: psrad $1, %xmm51595; SSE4-NEXT: psrlq $1, %xmm41596; SSE4-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1597; SSE4-NEXT: pand %xmm7, %xmm31598; SSE4-NEXT: paddq %xmm4, %xmm31599; SSE4-NEXT: retq1600;1601; AVX1-LABEL: test_ext_v8i64:1602; AVX1: # %bb.0:1603; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm41604; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm51605; AVX1-NEXT: vpsrad $1, %xmm5, %xmm61606; AVX1-NEXT: vpsrlq $1, %xmm5, %xmm51607; AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1],xmm6[2,3],xmm5[4,5],xmm6[6,7]1608; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm01609; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21610; AVX1-NEXT: vpaddq %xmm5, %xmm2, %xmm21611; AVX1-NEXT: vpsrad $1, %xmm4, %xmm51612; AVX1-NEXT: vpsrlq $1, %xmm4, %xmm41613; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1614; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm01615; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01616; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm21617; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41618; AVX1-NEXT: vpsrad $1, %xmm4, %xmm51619; AVX1-NEXT: vpsrlq $1, %xmm4, %xmm41620; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm5[2,3],xmm4[4,5],xmm5[6,7]1621; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm11622; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm31623; AVX1-NEXT: vpaddq %xmm4, %xmm3, %xmm31624; AVX1-NEXT: vpsrad $1, %xmm2, %xmm41625; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm21626; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm4[2,3],xmm2[4,5],xmm4[6,7]1627; AVX1-NEXT: vpaddq %xmm2, %xmm1, %xmm11628; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm11629; AVX1-NEXT: retq1630;1631; AVX2-LABEL: test_ext_v8i64:1632; AVX2: # %bb.0:1633; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm41634; AVX2-NEXT: vpsrad $1, %ymm4, %ymm51635; AVX2-NEXT: vpsrlq $1, %ymm4, %ymm41636; AVX2-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0],ymm5[1],ymm4[2],ymm5[3],ymm4[4],ymm5[5],ymm4[6],ymm5[7]1637; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm01638; AVX2-NEXT: vpaddq %ymm4, %ymm0, %ymm01639; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm21640; AVX2-NEXT: vpsrad $1, %ymm2, %ymm41641; AVX2-NEXT: vpsrlq $1, %ymm2, %ymm21642; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0],ymm4[1],ymm2[2],ymm4[3],ymm2[4],ymm4[5],ymm2[6],ymm4[7]1643; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm11644; AVX2-NEXT: vpaddq %ymm2, %ymm1, %ymm11645; AVX2-NEXT: retq1646;1647; AVX512-LABEL: test_ext_v8i64:1648; AVX512: # %bb.0:1649; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm21650; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm01651; AVX512-NEXT: vpsraq $1, %zmm0, %zmm01652; AVX512-NEXT: vpaddq %zmm0, %zmm2, %zmm01653; AVX512-NEXT: retq1654 %x0 = sext <8 x i64> %a0 to <8 x i128>1655 %x1 = sext <8 x i64> %a1 to <8 x i128>1656 %sum = add <8 x i128> %x0, %x11657 %shift = ashr <8 x i128> %sum, <i128 1, i128 1, i128 1, i128 1, i128 1, i128 1, i128 1, i128 1>1658 %res = trunc <8 x i128> %shift to <8 x i64>1659 ret <8 x i64> %res1660}1661 1662