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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx | FileCheck %s3 4@x = common global <8 x float> zeroinitializer, align 325@y = common global <4 x double> zeroinitializer, align 326@z = common global <4 x float> zeroinitializer, align 167 8define void @zero128() nounwind ssp {9; CHECK-LABEL: zero128:10; CHECK: ## %bb.0:11; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm012; CHECK-NEXT: movq _z@GOTPCREL(%rip), %rax13; CHECK-NEXT: vmovaps %xmm0, (%rax)14; CHECK-NEXT: retq15 store <4 x float> zeroinitializer, ptr @z, align 1616 ret void17}18 19define void @zero256() nounwind ssp {20; CHECK-LABEL: zero256:21; CHECK: ## %bb.0:22; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm023; CHECK-NEXT: movq _x@GOTPCREL(%rip), %rax24; CHECK-NEXT: vmovaps %ymm0, (%rax)25; CHECK-NEXT: movq _y@GOTPCREL(%rip), %rax26; CHECK-NEXT: vmovaps %ymm0, (%rax)27; CHECK-NEXT: vzeroupper28; CHECK-NEXT: retq29 store <8 x float> zeroinitializer, ptr @x, align 3230 store <4 x double> zeroinitializer, ptr @y, align 3231 ret void32}33 34define void @ones(ptr nocapture %RET, ptr nocapture %aFOO) nounwind {35; CHECK-LABEL: ones:36; CHECK: ## %bb.0: ## %allocas37; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm038; CHECK-NEXT: vcmptrueps %ymm0, %ymm0, %ymm039; CHECK-NEXT: vmovaps %ymm0, (%rdi)40; CHECK-NEXT: vzeroupper41; CHECK-NEXT: retq42allocas:43 store <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float440xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float450xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, ptr %RET, align 3246 ret void47}48 49define void @ones2(ptr nocapture %RET, ptr nocapture %aFOO) nounwind {50; CHECK-LABEL: ones2:51; CHECK: ## %bb.0: ## %allocas52; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm053; CHECK-NEXT: vcmptrueps %ymm0, %ymm0, %ymm054; CHECK-NEXT: vmovaps %ymm0, (%rdi)55; CHECK-NEXT: vzeroupper56; CHECK-NEXT: retq57allocas:58 store <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, ptr %RET, align 3259 ret void60}61 62;;; Just make sure this doesn't crash63define <4 x i64> @ISelCrash(<4 x i64> %a) nounwind uwtable readnone ssp {64; CHECK-LABEL: ISelCrash:65; CHECK: ## %bb.0:66; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm067; CHECK-NEXT: retq68 %shuffle = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 2, i32 3, i32 4, i32 4>69 ret <4 x i64> %shuffle70}71 72;;; Don't crash on movd73define <8 x i32> @VMOVZQI2PQI(ptr nocapture %aFOO) nounwind {74; CHECK-LABEL: VMOVZQI2PQI:75; CHECK: ## %bb.0:76; CHECK-NEXT: vbroadcastss (%rdi), %ymm077; CHECK-NEXT: retq78 %val.i34.i = load i32, ptr %aFOO, align 479 %ptroffset.i22.i992 = getelementptr [0 x float], ptr %aFOO, i64 0, i64 180 %val.i24.i = load i32, ptr %ptroffset.i22.i992, align 481 %updatedret.i30.i = insertelement <8 x i32> undef, i32 %val.i34.i, i32 182 ret <8 x i32> %updatedret.i30.i83}84 85;;;; Don't crash on fneg86; rdar://1056648687define <16 x float> @fneg(<16 x float> %a) nounwind {88; CHECK-LABEL: fneg:89; CHECK: ## %bb.0:90; CHECK-NEXT: vbroadcastss {{.*#+}} ymm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]91; CHECK-NEXT: vxorps %ymm2, %ymm0, %ymm092; CHECK-NEXT: vxorps %ymm2, %ymm1, %ymm193; CHECK-NEXT: retq94 %1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %a95 ret <16 x float> %196}97 98;;; Don't crash on build vector99define <16 x i16> @build_vec_16x16(i16 %a) nounwind readonly {100; CHECK-LABEL: build_vec_16x16:101; CHECK: ## %bb.0:102; CHECK-NEXT: movzwl %di, %eax103; CHECK-NEXT: vmovd %eax, %xmm0104; CHECK-NEXT: retq105 %res = insertelement <16 x i16> <i16 undef, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 %a, i32 0106 ret <16 x i16> %res107}108 109;;; Check that VMOVPQIto64rr generates the assembly string "vmovq". Previously110;;; an incorrect mnemonic of "movd" was printed for this instruction.111define i64 @VMOVPQIto64rr(<2 x i64> %a) {112; CHECK-LABEL: VMOVPQIto64rr:113; CHECK: ## %bb.0:114; CHECK-NEXT: vmovq %xmm0, %rax115; CHECK-NEXT: retq116 %vecext.i = extractelement <2 x i64> %a, i32 0117 ret i64 %vecext.i118}119 120; PR22685121define <8 x float> @mov00_8f32(ptr %ptr) {122; CHECK-LABEL: mov00_8f32:123; CHECK: ## %bb.0:124; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero125; CHECK-NEXT: retq126 %val = load float, ptr %ptr127 %vec = insertelement <8 x float> zeroinitializer, float %val, i32 0128 ret <8 x float> %vec129}130