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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X863; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X644 5; Insertion/shuffles of all-zero/all-bits/constants into v8i32->v8f32 sitofp conversion.6 7define <8 x float> @sitofp_insert_zero_v8i32(<8 x i32> %a0) {8; X86-LABEL: sitofp_insert_zero_v8i32:9; X86: # %bb.0:10; X86-NEXT: vxorps %xmm1, %xmm1, %xmm111; X86-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4,5],ymm0[6,7]12; X86-NEXT: vcvtdq2ps %ymm0, %ymm013; X86-NEXT: retl14;15; X64-LABEL: sitofp_insert_zero_v8i32:16; X64: # %bb.0:17; X64-NEXT: vxorps %xmm1, %xmm1, %xmm118; X64-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4,5],ymm0[6,7]19; X64-NEXT: vcvtdq2ps %ymm0, %ymm020; X64-NEXT: retq21 %1 = insertelement <8 x i32> %a0, i32 0, i32 022 %2 = insertelement <8 x i32> %1, i32 0, i32 223 %3 = insertelement <8 x i32> %2, i32 0, i32 424 %4 = insertelement <8 x i32> %3, i32 0, i32 525 %5 = sitofp <8 x i32> %4 to <8 x float>26 ret <8 x float> %527}28 29define <8 x float> @sitofp_shuffle_zero_v8i32(<8 x i32> %a0) {30; X86-LABEL: sitofp_shuffle_zero_v8i32:31; X86: # %bb.0:32; X86-NEXT: vxorps %xmm1, %xmm1, %xmm133; X86-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4],ymm0[5],ymm1[6],ymm0[7]34; X86-NEXT: vcvtdq2ps %ymm0, %ymm035; X86-NEXT: retl36;37; X64-LABEL: sitofp_shuffle_zero_v8i32:38; X64: # %bb.0:39; X64-NEXT: vxorps %xmm1, %xmm1, %xmm140; X64-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4],ymm0[5],ymm1[6],ymm0[7]41; X64-NEXT: vcvtdq2ps %ymm0, %ymm042; X64-NEXT: retq43 %1 = shufflevector <8 x i32> %a0, <8 x i32> <i32 0, i32 undef, i32 0, i32 undef, i32 0, i32 undef, i32 0, i32 undef>, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7>44 %2 = sitofp <8 x i32> %1 to <8 x float>45 ret <8 x float> %246}47 48define <8 x float> @sitofp_insert_allbits_v8i32(<8 x i32> %a0) {49; X86-LABEL: sitofp_insert_allbits_v8i32:50; X86: # %bb.0:51; X86-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm052; X86-NEXT: vcvtdq2ps %ymm0, %ymm053; X86-NEXT: retl54;55; X64-LABEL: sitofp_insert_allbits_v8i32:56; X64: # %bb.0:57; X64-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm058; X64-NEXT: vcvtdq2ps %ymm0, %ymm059; X64-NEXT: retq60 %1 = insertelement <8 x i32> %a0, i32 -1, i32 061 %2 = insertelement <8 x i32> %1, i32 -1, i32 262 %3 = insertelement <8 x i32> %2, i32 -1, i32 463 %4 = insertelement <8 x i32> %3, i32 -1, i32 564 %5 = sitofp <8 x i32> %4 to <8 x float>65 ret <8 x float> %566}67 68define <8 x float> @sitofp_shuffle_allbits_v8i32(<8 x i32> %a0) {69; X86-LABEL: sitofp_shuffle_allbits_v8i32:70; X86: # %bb.0:71; X86-NEXT: vxorps %xmm1, %xmm1, %xmm172; X86-NEXT: vcmptrueps %ymm1, %ymm1, %ymm173; X86-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4],ymm0[5],ymm1[6],ymm0[7]74; X86-NEXT: vcvtdq2ps %ymm0, %ymm075; X86-NEXT: retl76;77; X64-LABEL: sitofp_shuffle_allbits_v8i32:78; X64: # %bb.0:79; X64-NEXT: vxorps %xmm1, %xmm1, %xmm180; X64-NEXT: vcmptrueps %ymm1, %ymm1, %ymm181; X64-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4],ymm0[5],ymm1[6],ymm0[7]82; X64-NEXT: vcvtdq2ps %ymm0, %ymm083; X64-NEXT: retq84 %1 = shufflevector <8 x i32> %a0, <8 x i32> <i32 -1, i32 undef, i32 -1, i32 undef, i32 -1, i32 undef, i32 -1, i32 undef>, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7>85 %2 = sitofp <8 x i32> %1 to <8 x float>86 ret <8 x float> %287}88 89define <8 x float> @sitofp_insert_constants_v8i32(<8 x i32> %a0) {90; X86-LABEL: sitofp_insert_constants_v8i32:91; X86: # %bb.0:92; X86-NEXT: vpxor %xmm1, %xmm1, %xmm193; X86-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,3,4,5,6,7]94; X86-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm295; X86-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5],xmm1[6,7]96; X86-NEXT: vextractf128 $1, %ymm0, %xmm097; X86-NEXT: movl $2, %eax98; X86-NEXT: vpinsrd $0, %eax, %xmm0, %xmm099; X86-NEXT: movl $-3, %eax100; X86-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0101; X86-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0102; X86-NEXT: vcvtdq2ps %ymm0, %ymm0103; X86-NEXT: retl104;105; X64-LABEL: sitofp_insert_constants_v8i32:106; X64: # %bb.0:107; X64-NEXT: vpxor %xmm1, %xmm1, %xmm1108; X64-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,3,4,5,6,7]109; X64-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2110; X64-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5],xmm1[6,7]111; X64-NEXT: vextractf128 $1, %ymm0, %xmm0112; X64-NEXT: movl $2, %eax113; X64-NEXT: vpinsrd $0, %eax, %xmm0, %xmm0114; X64-NEXT: movl $-3, %eax115; X64-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0116; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0117; X64-NEXT: vcvtdq2ps %ymm0, %ymm0118; X64-NEXT: retq119 %1 = insertelement <8 x i32> %a0, i32 0, i32 0120 %2 = insertelement <8 x i32> %1, i32 -1, i32 2121 %3 = insertelement <8 x i32> %2, i32 2, i32 4122 %4 = insertelement <8 x i32> %3, i32 -3, i32 5123 %5 = sitofp <8 x i32> %4 to <8 x float>124 ret <8 x float> %5125}126 127define <8 x float> @sitofp_shuffle_constants_v8i32(<8 x i32> %a0) {128; X86-LABEL: sitofp_shuffle_constants_v8i32:129; X86: # %bb.0:130; X86-NEXT: vblendps {{.*#+}} ymm0 = mem[0],ymm0[1],mem[2],ymm0[3],mem[4],ymm0[5],mem[6],ymm0[7]131; X86-NEXT: vcvtdq2ps %ymm0, %ymm0132; X86-NEXT: retl133;134; X64-LABEL: sitofp_shuffle_constants_v8i32:135; X64: # %bb.0:136; X64-NEXT: vblendps {{.*#+}} ymm0 = mem[0],ymm0[1],mem[2],ymm0[3],mem[4],ymm0[5],mem[6],ymm0[7]137; X64-NEXT: vcvtdq2ps %ymm0, %ymm0138; X64-NEXT: retq139 %1 = shufflevector <8 x i32> %a0, <8 x i32> <i32 0, i32 undef, i32 -1, i32 undef, i32 2, i32 undef, i32 -3, i32 undef>, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7>140 %2 = sitofp <8 x i32> %1 to <8 x float>141 ret <8 x float> %2142}143