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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avxifma --show-mc-encoding | FileCheck %s --check-prefix=AVXIFMA3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma --show-mc-encoding | FileCheck %s --check-prefix=AVXIFMA4; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avxifma,+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=AVX512IFMA5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma,+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=AVX512IFMA6 7declare <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64>, <2 x i64>, <2 x i64>)8 9define <2 x i64>@test_int_x86_avx_vpmadd52h_uq_128(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {10; AVXIFMA-LABEL: test_int_x86_avx_vpmadd52h_uq_128:11; AVXIFMA: # %bb.0:12; AVXIFMA-NEXT: {vex} vpmadd52huq %xmm2, %xmm1, %xmm0 # encoding: [0xc4,0xe2,0xf1,0xb5,0xc2]13; AVXIFMA-NEXT: ret{{[l|q]}} # encoding: [0xc3]14;15; AVX512IFMA-LABEL: test_int_x86_avx_vpmadd52h_uq_128:16; AVX512IFMA: # %bb.0:17; AVX512IFMA-NEXT: {vex} vpmadd52huq %xmm2, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf1,0xb5,0xc2]18; AVX512IFMA-NEXT: ret{{[l|q]}} # encoding: [0xc3]19 %res = call <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2)20 ret <2 x i64> %res21}22 23declare <4 x i64> @llvm.x86.avx512.vpmadd52h.uq.256(<4 x i64>, <4 x i64>, <4 x i64>)24 25define <4 x i64>@test_int_x86_avx_vpmadd52h_uq_256(<4 x i64> %x0, <4 x i64> %x1, <4 x i64> %x2) {26; AVXIFMA-LABEL: test_int_x86_avx_vpmadd52h_uq_256:27; AVXIFMA: # %bb.0:28; AVXIFMA-NEXT: {vex} vpmadd52huq %ymm2, %ymm1, %ymm0 # encoding: [0xc4,0xe2,0xf5,0xb5,0xc2]29; AVXIFMA-NEXT: ret{{[l|q]}} # encoding: [0xc3]30;31; AVX512IFMA-LABEL: test_int_x86_avx_vpmadd52h_uq_256:32; AVX512IFMA: # %bb.0:33; AVX512IFMA-NEXT: {vex} vpmadd52huq %ymm2, %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf5,0xb5,0xc2]34; AVX512IFMA-NEXT: ret{{[l|q]}} # encoding: [0xc3]35 %res = call <4 x i64> @llvm.x86.avx512.vpmadd52h.uq.256(<4 x i64> %x0, <4 x i64> %x1, <4 x i64> %x2)36 ret <4 x i64> %res37}38 39declare <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64>, <2 x i64>, <2 x i64>)40 41define <2 x i64>@test_int_x86_avx_vpmadd52l_uq_128(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {42; AVXIFMA-LABEL: test_int_x86_avx_vpmadd52l_uq_128:43; AVXIFMA: # %bb.0:44; AVXIFMA-NEXT: {vex} vpmadd52luq %xmm2, %xmm1, %xmm0 # encoding: [0xc4,0xe2,0xf1,0xb4,0xc2]45; AVXIFMA-NEXT: ret{{[l|q]}} # encoding: [0xc3]46;47; AVX512IFMA-LABEL: test_int_x86_avx_vpmadd52l_uq_128:48; AVX512IFMA: # %bb.0:49; AVX512IFMA-NEXT: {vex} vpmadd52luq %xmm2, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf1,0xb4,0xc2]50; AVX512IFMA-NEXT: ret{{[l|q]}} # encoding: [0xc3]51 %res = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2)52 ret <2 x i64> %res53}54 55declare <4 x i64> @llvm.x86.avx512.vpmadd52l.uq.256(<4 x i64>, <4 x i64>, <4 x i64>)56 57define <4 x i64>@test_int_x86_avx_vpmadd52l_uq_256(<4 x i64> %x0, <4 x i64> %x1, <4 x i64> %x2) {58; AVXIFMA-LABEL: test_int_x86_avx_vpmadd52l_uq_256:59; AVXIFMA: # %bb.0:60; AVXIFMA-NEXT: {vex} vpmadd52luq %ymm2, %ymm1, %ymm0 # encoding: [0xc4,0xe2,0xf5,0xb4,0xc2]61; AVXIFMA-NEXT: ret{{[l|q]}} # encoding: [0xc3]62;63; AVX512IFMA-LABEL: test_int_x86_avx_vpmadd52l_uq_256:64; AVX512IFMA: # %bb.0:65; AVX512IFMA-NEXT: {vex} vpmadd52luq %ymm2, %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf5,0xb4,0xc2]66; AVX512IFMA-NEXT: ret{{[l|q]}} # encoding: [0xc3]67 %res = call <4 x i64> @llvm.x86.avx512.vpmadd52l.uq.256(<4 x i64> %x0, <4 x i64> %x1, <4 x i64> %x2)68 ret <4 x i64> %res69}70