174 lines · plain
1; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx | FileCheck -check-prefix=X86 %s2; RUN: llc < %s -mtriple=i386-pc-win32 -mattr=+avx | FileCheck -check-prefix=X86 %s3; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+avx | FileCheck -check-prefix=WIN64 %s4; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck -check-prefix=X64 %s5 6declare <16 x float> @func_float16_ptr(<16 x float>, ptr)7declare <16 x float> @func_float16(<16 x float>, <16 x float>)8declare i32 @func_int(i32, i32)9 10; WIN64-LABEL: testf16_inp11; WIN64: vaddps {{.*}}, {{%ymm[0-1]}}12; WIN64: vaddps {{.*}}, {{%ymm[0-1]}}13; WIN64: leaq {{.*}}(%rsp), %rcx14; WIN64: call15; WIN64: ret16 17; X86-LABEL: testf16_inp18; X86: vaddps {{.*}}, {{%ymm[0-1]}}19; X86: vaddps {{.*}}, {{%ymm[0-1]}}20; Push is not deemed profitable if we're realigning the stack.21; X86: {{pushl|movl}} %eax22; X86: call23; X86: ret24 25; X64-LABEL: testf16_inp26; X64: vaddps {{.*}}, {{%ymm[0-1]}}27; X64: vaddps {{.*}}, {{%ymm[0-1]}}28; X64: movq %rsp, %rdi29; X64: call30; X64: ret31 32;test calling conventions - input parameters33define <16 x float> @testf16_inp(<16 x float> %a, <16 x float> %b) nounwind {34 %y = alloca <16 x float>, align 1635 %x = fadd <16 x float> %a, %b36 %1 = call intel_ocl_bicc <16 x float> @func_float16_ptr(<16 x float> %x, ptr %y)37 %2 = load <16 x float>, ptr %y, align 1638 %3 = fadd <16 x float> %2, %139 ret <16 x float> %340}41 42;test calling conventions - preserved registers43 44; preserved ymm6-ymm1545; WIN64-LABEL: testf16_regs46; WIN64: call47; WIN64: vaddps {{%ymm[6-7]}}, {{%ymm[0-1]}}, {{%ymm[0-1]}}48; WIN64: vaddps {{%ymm[6-7]}}, {{%ymm[0-1]}}, {{%ymm[0-1]}}49; WIN64: ret50 51; preserved ymm8-ymm1552; X64-LABEL: testf16_regs53; X64: call54; X64: vaddps {{%ymm[0-1]}}, {{%ymm[8-9]}}, {{%ymm[0-1]}}55; X64: vaddps {{%ymm[0-1]}}, {{%ymm[8-9]}}, {{%ymm[0-1]}}56; X64: ret57 58define <16 x float> @testf16_regs(<16 x float> %a, <16 x float> %b) nounwind {59 %y = alloca <16 x float>, align 1660 %x = fadd <16 x float> %a, %b61 %1 = call intel_ocl_bicc <16 x float> @func_float16_ptr(<16 x float> %x, ptr %y)62 %2 = load <16 x float>, ptr %y, align 1663 %3 = fadd <16 x float> %1, %b64 %4 = fadd <16 x float> %2, %365 ret <16 x float> %466}67 68; test calling conventions - prolog and epilog69; WIN64-LABEL: test_prolog_epilog70; WIN64: vmovups {{%ymm([6-9]|1[0-5])}}, {{.*(%rbp).*}} # 32-byte Spill71; WIN64: vmovups {{%ymm([6-9]|1[0-5])}}, {{.*(%rbp).*}} # 32-byte Spill72; WIN64: vmovups {{%ymm([6-9]|1[0-5])}}, {{.*(%rbp).*}} # 32-byte Spill73; WIN64: vmovups {{%ymm([6-9]|1[0-5])}}, {{.*(%rbp).*}} # 32-byte Spill74; WIN64: vmovups {{%ymm([6-9]|1[0-5])}}, {{.*(%rbp).*}} # 32-byte Spill75; WIN64: vmovups {{%ymm([6-9]|1[0-5])}}, {{.*(%rbp).*}} # 32-byte Spill76; WIN64: vmovups {{%ymm([6-9]|1[0-5])}}, {{.*(%rbp).*}} # 32-byte Spill77; WIN64: vmovups {{%ymm([6-9]|1[0-5])}}, {{.*(%rbp).*}} # 32-byte Spill78; WIN64: vmovups {{%ymm([6-9]|1[0-5])}}, {{.*(%rbp).*}} # 32-byte Spill79; WIN64: vmovups {{%ymm([6-9]|1[0-5])}}, {{.*(%rbp).*}} # 32-byte Spill80; WIN64: call81; WIN64: vmovups {{.*(%rbp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload82; WIN64: vmovups {{.*(%rbp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload83; WIN64: vmovups {{.*(%rbp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload84; WIN64: vmovups {{.*(%rbp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload85; WIN64: vmovups {{.*(%rbp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload86; WIN64: vmovups {{.*(%rbp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload87; WIN64: vmovups {{.*(%rbp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload88; WIN64: vmovups {{.*(%rbp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload89; WIN64: vmovups {{.*(%rbp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload90; WIN64: vmovups {{.*(%rbp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload91 92; X64-LABEL: test_prolog_epilog93; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Spill94; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Spill95; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Spill96; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Spill97; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Spill98; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Spill99; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Spill100; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Spill101; X64: call102; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload103; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload104; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload105; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload106; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload107; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload108; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload109; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload110define intel_ocl_bicc <16 x float> @test_prolog_epilog(<16 x float> %a, <16 x float> %b) nounwind {111 %c = call <16 x float> @func_float16(<16 x float> %a, <16 x float> %b)112 ret <16 x float> %c113}114 115; test functions with integer parameters116; pass parameters on stack for 32-bit platform117; X86-LABEL: test_int118; X86: pushl {{.*}}119; X86: pushl {{.*}}120; X86: call121; X86: addl {{.*}}, %eax122 123; pass parameters in registers for 64-bit platform124; X64-LABEL: test_int125; X64: movl {{.*}}, %esi126; X64: leal {{.*}}, %edi127; X64: call128; X64: addl {{.*}}, %eax129define i32 @test_int(i32 %a, i32 %b) nounwind {130 %c1 = add i32 %a, %b131 %c2 = call intel_ocl_bicc i32 @func_int(i32 %c1, i32 %a)132 %c = add i32 %c2, %b133 ret i32 %c134}135 136; WIN64-LABEL: test_float4137; WIN64-NOT: vzeroupper138; WIN64: call139; WIN64-NOT: vzeroupper140; WIN64: call141; WIN64: ret142 143; X64-LABEL: test_float4144; X64-NOT: vzeroupper145; X64: call146; X64-NOT: vzeroupper147; X64: call148; X64: ret149 150; X86-LABEL: test_float4151; X86: vzeroupper152; X86: call153; X86: vzeroupper154; X86: call155; X86: ret156 157declare <4 x float> @func_float4(<4 x float>, <4 x float>, <4 x float>)158 159define <8 x float> @test_float4(<8 x float> %a, <8 x float> %b, <8 x float> %c) nounwind readnone {160entry:161 %0 = shufflevector <8 x float> %a, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>162 %1 = shufflevector <8 x float> %b, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>163 %2 = shufflevector <8 x float> %c, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>164 %call.i = tail call intel_ocl_bicc <4 x float> @func_float4(<4 x float> %0, <4 x float> %1, <4 x float> %2) nounwind165 %3 = shufflevector <4 x float> %call.i, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>166 %4 = shufflevector <8 x float> %a, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>167 %5 = shufflevector <8 x float> %b, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>168 %6 = shufflevector <8 x float> %c, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>169 %call.i2 = tail call intel_ocl_bicc <4 x float> @func_float4(<4 x float> %4, <4 x float> %5, <4 x float> %6) nounwind170 %7 = shufflevector <4 x float> %call.i2, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>171 %8 = shufflevector <8 x float> %3, <8 x float> %7, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>172 ret <8 x float> %8173}174