135 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s3 4define <8 x float> @A(<8 x float> %a) nounwind uwtable readnone ssp {5; CHECK-LABEL: A:6; CHECK: ## %bb.0: ## %entry7; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm08; CHECK-NEXT: retq9entry:10 %shuffle = shufflevector <8 x float> %a, <8 x float> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 8, i32 8, i32 8>11 ret <8 x float> %shuffle12}13 14define <4 x double> @B(<4 x double> %a) nounwind uwtable readnone ssp {15; CHECK-LABEL: B:16; CHECK: ## %bb.0: ## %entry17; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm018; CHECK-NEXT: retq19entry:20 %shuffle = shufflevector <4 x double> %a, <4 x double> undef, <4 x i32> <i32 2, i32 3, i32 4, i32 4>21 ret <4 x double> %shuffle22}23 24define void @t0(ptr nocapture %addr, <8 x float> %a) nounwind uwtable ssp {25; CHECK-LABEL: t0:26; CHECK: ## %bb.0: ## %entry27; CHECK-NEXT: vextractf128 $1, %ymm0, (%rdi)28; CHECK-NEXT: vzeroupper29; CHECK-NEXT: retq30entry:31 %0 = tail call <4 x float> @llvm.x86.avx.vextractf128.ps.256(<8 x float> %a, i8 1)32 store <4 x float> %0, ptr %addr, align 1633 ret void34}35 36define void @t2(ptr nocapture %addr, <4 x double> %a) nounwind uwtable ssp {37; CHECK-LABEL: t2:38; CHECK: ## %bb.0: ## %entry39; CHECK-NEXT: vextractf128 $1, %ymm0, (%rdi)40; CHECK-NEXT: vzeroupper41; CHECK-NEXT: retq42entry:43 %0 = tail call <2 x double> @llvm.x86.avx.vextractf128.pd.256(<4 x double> %a, i8 1)44 store <2 x double> %0, ptr %addr, align 1645 ret void46}47 48define void @t4(ptr nocapture %addr, <4 x i64> %a) nounwind uwtable ssp {49; CHECK-LABEL: t4:50; CHECK: ## %bb.0: ## %entry51; CHECK-NEXT: vextractf128 $1, %ymm0, (%rdi)52; CHECK-NEXT: vzeroupper53; CHECK-NEXT: retq54entry:55 %0 = bitcast <4 x i64> %a to <8 x i32>56 %1 = tail call <4 x i32> @llvm.x86.avx.vextractf128.si.256(<8 x i32> %0, i8 1)57 %2 = bitcast <4 x i32> %1 to <2 x i64>58 store <2 x i64> %2, ptr %addr, align 1659 ret void60}61 62define void @t5(ptr nocapture %addr, <8 x float> %a) nounwind uwtable ssp {63; CHECK-LABEL: t5:64; CHECK: ## %bb.0: ## %entry65; CHECK-NEXT: vmovaps %xmm0, (%rdi)66; CHECK-NEXT: vzeroupper67; CHECK-NEXT: retq68entry:69 %0 = tail call <4 x float> @llvm.x86.avx.vextractf128.ps.256(<8 x float> %a, i8 0)70 store <4 x float> %0, ptr %addr, align 1671 ret void72}73 74define void @t6(ptr nocapture %addr, <4 x double> %a) nounwind uwtable ssp {75; CHECK-LABEL: t6:76; CHECK: ## %bb.0: ## %entry77; CHECK-NEXT: vmovaps %xmm0, (%rdi)78; CHECK-NEXT: vzeroupper79; CHECK-NEXT: retq80entry:81 %0 = tail call <2 x double> @llvm.x86.avx.vextractf128.pd.256(<4 x double> %a, i8 0)82 store <2 x double> %0, ptr %addr, align 1683 ret void84}85 86define void @t7(ptr nocapture %addr, <4 x i64> %a) nounwind uwtable ssp {87; CHECK-LABEL: t7:88; CHECK: ## %bb.0: ## %entry89; CHECK-NEXT: vmovaps %xmm0, (%rdi)90; CHECK-NEXT: vzeroupper91; CHECK-NEXT: retq92entry:93 %0 = bitcast <4 x i64> %a to <8 x i32>94 %1 = tail call <4 x i32> @llvm.x86.avx.vextractf128.si.256(<8 x i32> %0, i8 0)95 %2 = bitcast <4 x i32> %1 to <2 x i64>96 store <2 x i64> %2, ptr %addr, align 1697 ret void98}99 100define void @t8(ptr nocapture %addr, <4 x i64> %a) nounwind uwtable ssp {101; CHECK-LABEL: t8:102; CHECK: ## %bb.0: ## %entry103; CHECK-NEXT: vmovups %xmm0, (%rdi)104; CHECK-NEXT: vzeroupper105; CHECK-NEXT: retq106entry:107 %0 = bitcast <4 x i64> %a to <8 x i32>108 %1 = tail call <4 x i32> @llvm.x86.avx.vextractf128.si.256(<8 x i32> %0, i8 0)109 %2 = bitcast <4 x i32> %1 to <2 x i64>110 store <2 x i64> %2, ptr %addr, align 1111 ret void112}113 114; PR15462115define void @t9(ptr %p) {116; CHECK-LABEL: t9:117; CHECK: ## %bb.0:118; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0119; CHECK-NEXT: vmovups %ymm0, (%rdi)120; CHECK-NEXT: vzeroupper121; CHECK-NEXT: retq122 store i64 0, ptr %p123 %q = getelementptr i64, ptr %p, i64 1124 store i64 0, ptr %q125 %r = getelementptr i64, ptr %p, i64 2126 store i64 0, ptr %r127 %s = getelementptr i64, ptr %p, i64 3128 store i64 0, ptr %s129 ret void130}131 132declare <2 x double> @llvm.x86.avx.vextractf128.pd.256(<4 x double>, i8) nounwind readnone133declare <4 x float> @llvm.x86.avx.vextractf128.ps.256(<8 x float>, i8) nounwind readnone134declare <4 x i32> @llvm.x86.avx.vextractf128.si.256(<8 x i32>, i8) nounwind readnone135