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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X643; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X864 5 6define <8 x i32> @test_int_x86_mask_vcvtt_pd2dqs_512(<8 x double> %x0, <8 x i32> %src, i8 %mask) {7; X64-LABEL: test_int_x86_mask_vcvtt_pd2dqs_512:8; X64: # %bb.0:9; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]10; X64-NEXT: vcvttpd2dqs %zmm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0xfc,0x49,0x6d,0xc8]11; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]12; X64-NEXT: retq # encoding: [0xc3]13;14; X86-LABEL: test_int_x86_mask_vcvtt_pd2dqs_512:15; X86: # %bb.0:16; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]17; X86-NEXT: vcvttpd2dqs %zmm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0xfc,0x49,0x6d,0xc8]18; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]19; X86-NEXT: retl # encoding: [0xc3]20 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.round.512(<8 x double> %x0, <8 x i32> %src, i8 %mask, i32 4)21 ret <8 x i32> %res22}23 24define <8 x i32> @test_int_x86_maskz_vcvtt_pd2dqs_512_z(<8 x double> %x0, i8 %mask) {25; X64-LABEL: test_int_x86_maskz_vcvtt_pd2dqs_512_z:26; X64: # %bb.0:27; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]28; X64-NEXT: vcvttpd2dqs %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xc9,0x6d,0xc0]29; X64-NEXT: retq # encoding: [0xc3]30;31; X86-LABEL: test_int_x86_maskz_vcvtt_pd2dqs_512_z:32; X86: # %bb.0:33; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]34; X86-NEXT: vcvttpd2dqs %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xc9,0x6d,0xc0]35; X86-NEXT: retl # encoding: [0xc3]36 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.round.512(<8 x double> %x0, <8 x i32> zeroinitializer, i8 %mask, i32 4)37 ret <8 x i32> %res38}39 40define <8 x i32> @test_int_x86_mask_vcvtt_pd2dqs_512_undef(<8 x double> %x0, i8 %mask) {41; X64-LABEL: test_int_x86_mask_vcvtt_pd2dqs_512_undef:42; X64: # %bb.0:43; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]44; X64-NEXT: vcvttpd2dqs %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xc9,0x6d,0xc0]45; X64-NEXT: retq # encoding: [0xc3]46;47; X86-LABEL: test_int_x86_mask_vcvtt_pd2dqs_512_undef:48; X86: # %bb.0:49; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]50; X86-NEXT: vcvttpd2dqs %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xc9,0x6d,0xc0]51; X86-NEXT: retl # encoding: [0xc3]52 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.round.512(<8 x double> %x0, <8 x i32> undef, i8 %mask, i32 4)53 ret <8 x i32> %res54}55 56define <8 x i32> @test_int_x86_mask_vcvtt_pd2dqs_512_default(<8 x double>* %x0) {57; X64-LABEL: test_int_x86_mask_vcvtt_pd2dqs_512_default:58; X64: # %bb.0:59; X64-NEXT: vcvttpd2dqs (%rdi), %ymm0 # encoding: [0x62,0xf5,0xfc,0x48,0x6d,0x07]60; X64-NEXT: retq # encoding: [0xc3]61;62; X86-LABEL: test_int_x86_mask_vcvtt_pd2dqs_512_default:63; X86: # %bb.0:64; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]65; X86-NEXT: vcvttpd2dqs (%eax), %ymm0 # encoding: [0x62,0xf5,0xfc,0x48,0x6d,0x00]66; X86-NEXT: retl # encoding: [0xc3]67 %x10 = load <8 x double>, <8 x double> * %x068 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.round.512(<8 x double> %x10, <8 x i32> undef, i8 -1, i32 4)69 ret <8 x i32> %res70}71declare <8 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.round.512(<8 x double>, <8 x i32>, i8 , i32)72 73define <8 x i32> @test_int_x86_mask_vcvtt_pd2udqs_512(<8 x double> %x0, <8 x i32> %src, i8 %mask) {74; X64-LABEL: test_int_x86_mask_vcvtt_pd2udqs_512:75; X64: # %bb.0:76; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]77; X64-NEXT: vcvttpd2udqs %zmm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0xfc,0x49,0x6c,0xc8]78; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]79; X64-NEXT: retq # encoding: [0xc3]80;81; X86-LABEL: test_int_x86_mask_vcvtt_pd2udqs_512:82; X86: # %bb.0:83; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]84; X86-NEXT: vcvttpd2udqs %zmm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0xfc,0x49,0x6c,0xc8]85; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]86; X86-NEXT: retl # encoding: [0xc3]87 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.round.512(<8 x double> %x0, <8 x i32> %src, i8 %mask, i32 4)88 ret <8 x i32> %res89}90 91define <8 x i32> @test_int_x86_maskz_vcvtt_pd2udqs_512_z(<8 x double> %x0, i8 %mask) {92; X64-LABEL: test_int_x86_maskz_vcvtt_pd2udqs_512_z:93; X64: # %bb.0:94; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]95; X64-NEXT: vcvttpd2udqs %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xc9,0x6c,0xc0]96; X64-NEXT: retq # encoding: [0xc3]97;98; X86-LABEL: test_int_x86_maskz_vcvtt_pd2udqs_512_z:99; X86: # %bb.0:100; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]101; X86-NEXT: vcvttpd2udqs %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xc9,0x6c,0xc0]102; X86-NEXT: retl # encoding: [0xc3]103 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.round.512(<8 x double> %x0, <8 x i32> zeroinitializer, i8 %mask, i32 4)104 ret <8 x i32> %res105}106 107define <8 x i32> @test_int_x86_mask_vcvtt_pd2udqs_512_undef(<8 x double> %x0, i8 %mask) {108; X64-LABEL: test_int_x86_mask_vcvtt_pd2udqs_512_undef:109; X64: # %bb.0:110; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]111; X64-NEXT: vcvttpd2udqs %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xc9,0x6c,0xc0]112; X64-NEXT: retq # encoding: [0xc3]113;114; X86-LABEL: test_int_x86_mask_vcvtt_pd2udqs_512_undef:115; X86: # %bb.0:116; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]117; X86-NEXT: vcvttpd2udqs %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xc9,0x6c,0xc0]118; X86-NEXT: retl # encoding: [0xc3]119 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.round.512(<8 x double> %x0, <8 x i32> undef, i8 %mask, i32 4)120 ret <8 x i32> %res121}122 123define <8 x i32> @test_int_x86_mask_vcvtt_pd2udqs_512_default(<8 x double>* %x0) {124; X64-LABEL: test_int_x86_mask_vcvtt_pd2udqs_512_default:125; X64: # %bb.0:126; X64-NEXT: vcvttpd2udqs (%rdi), %ymm0 # encoding: [0x62,0xf5,0xfc,0x48,0x6c,0x07]127; X64-NEXT: retq # encoding: [0xc3]128;129; X86-LABEL: test_int_x86_mask_vcvtt_pd2udqs_512_default:130; X86: # %bb.0:131; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]132; X86-NEXT: vcvttpd2udqs (%eax), %ymm0 # encoding: [0x62,0xf5,0xfc,0x48,0x6c,0x00]133; X86-NEXT: retl # encoding: [0xc3]134 %x10 = load <8 x double>, <8 x double> * %x0135 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.round.512(<8 x double> %x10, <8 x i32> undef, i8 -1, i32 4)136 ret <8 x i32> %res137}138declare <8 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.round.512(<8 x double>, <8 x i32>, i8 , i32)139 140define <8 x i64> @test_int_x86_mask_vcvtt_pd2qqs_512(<8 x double> %x0, <8 x i64> %src, i8 %mask) {141; X64-LABEL: test_int_x86_mask_vcvtt_pd2qqs_512:142; X64: # %bb.0:143; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]144; X64-NEXT: vcvttpd2qqs %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0xfd,0x49,0x6d,0xc8]145; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]146; X64-NEXT: retq # encoding: [0xc3]147;148; X86-LABEL: test_int_x86_mask_vcvtt_pd2qqs_512:149; X86: # %bb.0:150; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]151; X86-NEXT: vcvttpd2qqs %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0xfd,0x49,0x6d,0xc8]152; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]153; X86-NEXT: retl # encoding: [0xc3]154 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.round.512(<8 x double> %x0, <8 x i64> %src, i8 %mask, i32 4)155 ret <8 x i64> %res156}157 158define <8 x i64> @test_int_x86_maskz_vcvtt_pd2qqs_512_z(<8 x double> %x0, i8 %mask) {159; X64-LABEL: test_int_x86_maskz_vcvtt_pd2qqs_512_z:160; X64: # %bb.0:161; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]162; X64-NEXT: vcvttpd2qqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xc9,0x6d,0xc0]163; X64-NEXT: retq # encoding: [0xc3]164;165; X86-LABEL: test_int_x86_maskz_vcvtt_pd2qqs_512_z:166; X86: # %bb.0:167; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]168; X86-NEXT: vcvttpd2qqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xc9,0x6d,0xc0]169; X86-NEXT: retl # encoding: [0xc3]170 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.round.512(<8 x double> %x0, <8 x i64> zeroinitializer, i8 %mask, i32 4)171 ret <8 x i64> %res172}173 174define <8 x i64> @test_int_x86_mask_vcvtt_pd2qqs_512_undef(<8 x double> %x0, i8 %mask) {175; X64-LABEL: test_int_x86_mask_vcvtt_pd2qqs_512_undef:176; X64: # %bb.0:177; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]178; X64-NEXT: vcvttpd2qqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xc9,0x6d,0xc0]179; X64-NEXT: retq # encoding: [0xc3]180;181; X86-LABEL: test_int_x86_mask_vcvtt_pd2qqs_512_undef:182; X86: # %bb.0:183; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]184; X86-NEXT: vcvttpd2qqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xc9,0x6d,0xc0]185; X86-NEXT: retl # encoding: [0xc3]186 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.round.512(<8 x double> %x0, <8 x i64> undef, i8 %mask, i32 4)187 ret <8 x i64> %res188}189 190define <8 x i64> @test_int_x86_mask_vcvtt_pd2qqs_512_default(<8 x double>* %x0) {191; X64-LABEL: test_int_x86_mask_vcvtt_pd2qqs_512_default:192; X64: # %bb.0:193; X64-NEXT: vcvttpd2qqs (%rdi), %zmm0 # encoding: [0x62,0xf5,0xfd,0x48,0x6d,0x07]194; X64-NEXT: retq # encoding: [0xc3]195;196; X86-LABEL: test_int_x86_mask_vcvtt_pd2qqs_512_default:197; X86: # %bb.0:198; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]199; X86-NEXT: vcvttpd2qqs (%eax), %zmm0 # encoding: [0x62,0xf5,0xfd,0x48,0x6d,0x00]200; X86-NEXT: retl # encoding: [0xc3]201 %x10 = load <8 x double>, <8 x double>* %x0202 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.round.512(<8 x double> %x10, <8 x i64> undef, i8 -1, i32 4)203 ret <8 x i64> %res204}205declare <8 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.round.512(<8 x double>, <8 x i64>, i8 , i32)206 207define <8 x i64> @test_int_x86_mask_vcvtt_pd2uqqs_512(<8 x double> %x0, <8 x i64> %src, i8 %mask) {208; X64-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_512:209; X64: # %bb.0:210; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]211; X64-NEXT: vcvttpd2uqqs %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0xfd,0x49,0x6c,0xc8]212; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]213; X64-NEXT: retq # encoding: [0xc3]214;215; X86-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_512:216; X86: # %bb.0:217; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]218; X86-NEXT: vcvttpd2uqqs %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0xfd,0x49,0x6c,0xc8]219; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]220; X86-NEXT: retl # encoding: [0xc3]221 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.round.512(<8 x double> %x0, <8 x i64> %src, i8 %mask, i32 4)222 ret <8 x i64> %res223}224 225define <8 x i64> @test_int_x86_maskz_vcvtt_pd2uqqs_512_z(<8 x double> %x0, i8 %mask) {226; X64-LABEL: test_int_x86_maskz_vcvtt_pd2uqqs_512_z:227; X64: # %bb.0:228; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]229; X64-NEXT: vcvttpd2uqqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xc9,0x6c,0xc0]230; X64-NEXT: retq # encoding: [0xc3]231;232; X86-LABEL: test_int_x86_maskz_vcvtt_pd2uqqs_512_z:233; X86: # %bb.0:234; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]235; X86-NEXT: vcvttpd2uqqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xc9,0x6c,0xc0]236; X86-NEXT: retl # encoding: [0xc3]237 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.round.512(<8 x double> %x0, <8 x i64> zeroinitializer, i8 %mask, i32 4)238 ret <8 x i64> %res239}240 241define <8 x i64> @test_int_x86_mask_vcvtt_pd2uqqs_512_undef(<8 x double> %x0, i8 %mask) {242; X64-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_512_undef:243; X64: # %bb.0:244; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]245; X64-NEXT: vcvttpd2uqqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xc9,0x6c,0xc0]246; X64-NEXT: retq # encoding: [0xc3]247;248; X86-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_512_undef:249; X86: # %bb.0:250; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]251; X86-NEXT: vcvttpd2uqqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xc9,0x6c,0xc0]252; X86-NEXT: retl # encoding: [0xc3]253 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.round.512(<8 x double> %x0, <8 x i64> undef, i8 %mask, i32 4)254 ret <8 x i64> %res255}256 257define <8 x i64> @test_int_x86_mask_vcvtt_pd2uqqs_512_default(<8 x double>* %x0) {258; X64-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_512_default:259; X64: # %bb.0:260; X64-NEXT: vcvttpd2uqqs (%rdi), %zmm0 # encoding: [0x62,0xf5,0xfd,0x48,0x6c,0x07]261; X64-NEXT: retq # encoding: [0xc3]262;263; X86-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_512_default:264; X86: # %bb.0:265; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]266; X86-NEXT: vcvttpd2uqqs (%eax), %zmm0 # encoding: [0x62,0xf5,0xfd,0x48,0x6c,0x00]267; X86-NEXT: retl # encoding: [0xc3]268 %x10 = load <8 x double>, <8 x double>* %x0269 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.round.512(<8 x double> %x10, <8 x i64> undef, i8 -1, i32 4)270 ret <8 x i64> %res271}272declare <8 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.round.512(<8 x double>, <8 x i64>, i8 , i32)273 274define <16 x i32> @test_int_x86_mask_vcvtt_ps2dqs_512(<16 x float> %x0, <16 x i32> %src, i16 %mask) {275; X64-LABEL: test_int_x86_mask_vcvtt_ps2dqs_512:276; X64: # %bb.0:277; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]278; X64-NEXT: vcvttps2dqs %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0x7c,0x49,0x6d,0xc8]279; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]280; X64-NEXT: retq # encoding: [0xc3]281;282; X86-LABEL: test_int_x86_mask_vcvtt_ps2dqs_512:283; X86: # %bb.0:284; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]285; X86-NEXT: vcvttps2dqs %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0x7c,0x49,0x6d,0xc8]286; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]287; X86-NEXT: retl # encoding: [0xc3]288 %res = call <16 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.round.512(<16 x float> %x0, <16 x i32> %src, i16 %mask, i32 4)289 ret <16 x i32> %res290}291 292define <16 x i32> @test_int_x86_maskz_vcvtt_ps2dqs_512_z(<16 x float> %x0, i16 %mask) {293; X64-LABEL: test_int_x86_maskz_vcvtt_ps2dqs_512_z:294; X64: # %bb.0:295; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]296; X64-NEXT: vcvttps2dqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x6d,0xc0]297; X64-NEXT: retq # encoding: [0xc3]298;299; X86-LABEL: test_int_x86_maskz_vcvtt_ps2dqs_512_z:300; X86: # %bb.0:301; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]302; X86-NEXT: vcvttps2dqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x6d,0xc0]303; X86-NEXT: retl # encoding: [0xc3]304 %res = call <16 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.round.512(<16 x float> %x0, <16 x i32> zeroinitializer, i16 %mask, i32 4)305 ret <16 x i32> %res306}307 308define <16 x i32> @test_int_x86_mask_vcvtt_ps2dqs_512_undef(<16 x float> %x0, i16 %mask) {309; X64-LABEL: test_int_x86_mask_vcvtt_ps2dqs_512_undef:310; X64: # %bb.0:311; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]312; X64-NEXT: vcvttps2dqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x6d,0xc0]313; X64-NEXT: retq # encoding: [0xc3]314;315; X86-LABEL: test_int_x86_mask_vcvtt_ps2dqs_512_undef:316; X86: # %bb.0:317; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]318; X86-NEXT: vcvttps2dqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x6d,0xc0]319; X86-NEXT: retl # encoding: [0xc3]320 %res = call <16 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.round.512(<16 x float> %x0, <16 x i32> undef, i16 %mask, i32 4)321 ret <16 x i32> %res322}323 324define <16 x i32> @test_int_x86_mask_vcvtt_ps2dqs_512_default(<16 x float>* %x0) {325; X64-LABEL: test_int_x86_mask_vcvtt_ps2dqs_512_default:326; X64: # %bb.0:327; X64-NEXT: vcvttps2dqs (%rdi), %zmm0 # encoding: [0x62,0xf5,0x7c,0x48,0x6d,0x07]328; X64-NEXT: retq # encoding: [0xc3]329;330; X86-LABEL: test_int_x86_mask_vcvtt_ps2dqs_512_default:331; X86: # %bb.0:332; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]333; X86-NEXT: vcvttps2dqs (%eax), %zmm0 # encoding: [0x62,0xf5,0x7c,0x48,0x6d,0x00]334; X86-NEXT: retl # encoding: [0xc3]335 %x10 = load <16 x float>, <16 x float>* %x0336 %res = call <16 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.round.512(<16 x float> %x10, <16 x i32> undef, i16 -1, i32 4)337 ret <16 x i32> %res338}339declare <16 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.round.512(<16 x float>, <16 x i32>, i16 , i32)340 341define <16 x i32> @test_int_x86_mask_vcvtt_ps2udqs_512(<16 x float> %x0, <16 x i32> %src, i16 %mask) {342; X64-LABEL: test_int_x86_mask_vcvtt_ps2udqs_512:343; X64: # %bb.0:344; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]345; X64-NEXT: vcvttps2udqs %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0x7c,0x49,0x6c,0xc8]346; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]347; X64-NEXT: retq # encoding: [0xc3]348;349; X86-LABEL: test_int_x86_mask_vcvtt_ps2udqs_512:350; X86: # %bb.0:351; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]352; X86-NEXT: vcvttps2udqs %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0x7c,0x49,0x6c,0xc8]353; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]354; X86-NEXT: retl # encoding: [0xc3]355 %res = call <16 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.round.512(<16 x float> %x0, <16 x i32> %src, i16 %mask, i32 4)356 ret <16 x i32> %res357}358 359define <16 x i32> @test_int_x86_maskz_vcvtt_ps2udqs_512_z(<16 x float> %x0, i16 %mask) {360; X64-LABEL: test_int_x86_maskz_vcvtt_ps2udqs_512_z:361; X64: # %bb.0:362; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]363; X64-NEXT: vcvttps2udqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x6c,0xc0]364; X64-NEXT: retq # encoding: [0xc3]365;366; X86-LABEL: test_int_x86_maskz_vcvtt_ps2udqs_512_z:367; X86: # %bb.0:368; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]369; X86-NEXT: vcvttps2udqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x6c,0xc0]370; X86-NEXT: retl # encoding: [0xc3]371 %res = call <16 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.round.512(<16 x float> %x0, <16 x i32> zeroinitializer, i16 %mask, i32 4)372 ret <16 x i32> %res373}374 375define <16 x i32> @test_int_x86_mask_vcvtt_ps2udqs_512_undef(<16 x float> %x0, i16 %mask) {376; X64-LABEL: test_int_x86_mask_vcvtt_ps2udqs_512_undef:377; X64: # %bb.0:378; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]379; X64-NEXT: vcvttps2udqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x6c,0xc0]380; X64-NEXT: retq # encoding: [0xc3]381;382; X86-LABEL: test_int_x86_mask_vcvtt_ps2udqs_512_undef:383; X86: # %bb.0:384; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]385; X86-NEXT: vcvttps2udqs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x6c,0xc0]386; X86-NEXT: retl # encoding: [0xc3]387 %res = call <16 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.round.512(<16 x float> %x0, <16 x i32> undef, i16 %mask, i32 4)388 ret <16 x i32> %res389}390 391define <16 x i32> @test_int_x86_mask_vcvtt_ps2udqs_512_default(<16 x float>* %x0) {392; X64-LABEL: test_int_x86_mask_vcvtt_ps2udqs_512_default:393; X64: # %bb.0:394; X64-NEXT: vcvttps2dqs (%rdi), %zmm0 # encoding: [0x62,0xf5,0x7c,0x48,0x6d,0x07]395; X64-NEXT: retq # encoding: [0xc3]396;397; X86-LABEL: test_int_x86_mask_vcvtt_ps2udqs_512_default:398; X86: # %bb.0:399; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]400; X86-NEXT: vcvttps2dqs (%eax), %zmm0 # encoding: [0x62,0xf5,0x7c,0x48,0x6d,0x00]401; X86-NEXT: retl # encoding: [0xc3]402 %x10 = load <16 x float>, <16 x float>* %x0403 %res = call <16 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.round.512(<16 x float> %x10, <16 x i32> undef, i16 -1, i32 4)404 ret <16 x i32> %res405}406declare <16 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.round.512(<16 x float>, <16 x i32>, i16 , i32)407 408define <8 x i64> @test_int_x86_mask_vcvtt_ps2qqs_512(<8 x float> %x0, <8 x i64> %src, i8 %mask) {409; X64-LABEL: test_int_x86_mask_vcvtt_ps2qqs_512:410; X64: # %bb.0:411; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]412; X64-NEXT: vcvttps2qqs %ymm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0x7d,0x49,0x6d,0xc8]413; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]414; X64-NEXT: retq # encoding: [0xc3]415;416; X86-LABEL: test_int_x86_mask_vcvtt_ps2qqs_512:417; X86: # %bb.0:418; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]419; X86-NEXT: vcvttps2qqs %ymm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0x7d,0x49,0x6d,0xc8]420; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]421; X86-NEXT: retl # encoding: [0xc3]422 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.round.512(<8 x float> %x0, <8 x i64> %src, i8 %mask, i32 4)423 ret <8 x i64> %res424}425 426define <8 x i64> @test_int_x86_maskz_vcvtt_ps2qqs_512_z(<8 x float> %x0, i8 %mask) {427; X64-LABEL: test_int_x86_maskz_vcvtt_ps2qqs_512_z:428; X64: # %bb.0:429; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]430; X64-NEXT: vcvttps2qqs %ymm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x6d,0xc0]431; X64-NEXT: retq # encoding: [0xc3]432;433; X86-LABEL: test_int_x86_maskz_vcvtt_ps2qqs_512_z:434; X86: # %bb.0:435; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]436; X86-NEXT: vcvttps2qqs %ymm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x6d,0xc0]437; X86-NEXT: retl # encoding: [0xc3]438 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.round.512(<8 x float> %x0, <8 x i64> zeroinitializer, i8 %mask, i32 4)439 ret <8 x i64> %res440}441 442define <8 x i64> @test_int_x86_mask_vcvtt_ps2qqs_512_undef(<8 x float> %x0, i8 %mask) {443; X64-LABEL: test_int_x86_mask_vcvtt_ps2qqs_512_undef:444; X64: # %bb.0:445; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]446; X64-NEXT: vcvttps2qqs %ymm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x6d,0xc0]447; X64-NEXT: retq # encoding: [0xc3]448;449; X86-LABEL: test_int_x86_mask_vcvtt_ps2qqs_512_undef:450; X86: # %bb.0:451; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]452; X86-NEXT: vcvttps2qqs %ymm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x6d,0xc0]453; X86-NEXT: retl # encoding: [0xc3]454 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.round.512(<8 x float> %x0, <8 x i64> undef, i8 %mask, i32 4)455 ret <8 x i64> %res456}457 458define <8 x i64> @test_int_x86_mask_vcvtt_ps2qqs_512_default(<8 x float> %x0) {459; CHECK-LABEL: test_int_x86_mask_vcvtt_ps2qqs_512_default:460; CHECK: # %bb.0:461; CHECK-NEXT: vcvttps2qqs %ymm0, %zmm0 # encoding: [0x62,0xf5,0x7d,0x48,0x6d,0xc0]462; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]463 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.round.512(<8 x float> %x0, <8 x i64> undef, i8 -1, i32 4)464 ret <8 x i64> %res465}466declare <8 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.round.512(<8 x float>, <8 x i64>, i8 , i32)467 468define <8 x i64> @test_int_x86_mask_vcvtt_ps2uqqs_512(<8 x float> %x0, <8 x i64> %src, i8 %mask) {469; X64-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_512:470; X64: # %bb.0:471; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]472; X64-NEXT: vcvttps2uqqs %ymm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0x7d,0x49,0x6c,0xc8]473; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]474; X64-NEXT: retq # encoding: [0xc3]475;476; X86-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_512:477; X86: # %bb.0:478; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]479; X86-NEXT: vcvttps2uqqs %ymm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0x7d,0x49,0x6c,0xc8]480; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]481; X86-NEXT: retl # encoding: [0xc3]482 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.round.512(<8 x float> %x0, <8 x i64> %src, i8 %mask, i32 4)483 ret <8 x i64> %res484}485 486define <8 x i64> @test_int_x86_maskz_vcvtt_ps2uqqs_512_z(<8 x float> %x0, i8 %mask) {487; X64-LABEL: test_int_x86_maskz_vcvtt_ps2uqqs_512_z:488; X64: # %bb.0:489; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]490; X64-NEXT: vcvttps2uqqs %ymm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x6c,0xc0]491; X64-NEXT: retq # encoding: [0xc3]492;493; X86-LABEL: test_int_x86_maskz_vcvtt_ps2uqqs_512_z:494; X86: # %bb.0:495; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]496; X86-NEXT: vcvttps2uqqs %ymm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x6c,0xc0]497; X86-NEXT: retl # encoding: [0xc3]498 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.round.512(<8 x float> %x0, <8 x i64> zeroinitializer, i8 %mask, i32 4)499 ret <8 x i64> %res500}501 502define <8 x i64> @test_int_x86_mask_vcvtt_ps2uqqs_512_undef(<8 x float> %x0, i8 %mask) {503; X64-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_512_undef:504; X64: # %bb.0:505; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]506; X64-NEXT: vcvttps2uqqs %ymm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x6c,0xc0]507; X64-NEXT: retq # encoding: [0xc3]508;509; X86-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_512_undef:510; X86: # %bb.0:511; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]512; X86-NEXT: vcvttps2uqqs %ymm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x6c,0xc0]513; X86-NEXT: retl # encoding: [0xc3]514 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.round.512(<8 x float> %x0, <8 x i64> undef, i8 %mask, i32 4)515 ret <8 x i64> %res516}517 518define <8 x i64> @test_int_x86_mask_vcvtt_ps2uqqs_512_default(<8 x float> %x0) {519; CHECK-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_512_default:520; CHECK: # %bb.0:521; CHECK-NEXT: vcvttps2uqqs %ymm0, %zmm0 # encoding: [0x62,0xf5,0x7d,0x48,0x6c,0xc0]522; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]523 %res = call <8 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.round.512(<8 x float> %x0, <8 x i64> undef, i8 -1, i32 4)524 ret <8 x i64> %res525}526declare <8 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.round.512(<8 x float>, <8 x i64>, i8 , i32)527