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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-linux -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X863; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X644 5;6; 32-bit float to signed integer7;8 9declare i32 @llvm.fptosi.sat.i32.f32 (float)10declare i64 @llvm.fptosi.sat.i64.f32 (float)11 12define i32 @test_signed_i32_f32(float %f) nounwind {13; X86-LABEL: test_signed_i32_f32:14; X86: # %bb.0:15; X86-NEXT: vcvttss2sis {{[0-9]+}}(%esp), %eax16; X86-NEXT: retl17;18; X64-LABEL: test_signed_i32_f32:19; X64: # %bb.0:20; X64-NEXT: vcvttss2sis %xmm0, %eax21; X64-NEXT: retq22 %x = call i32 @llvm.fptosi.sat.i32.f32(float %f)23 ret i32 %x24}25 26define i64 @test_signed_i64_f32(float %f) nounwind {27; X86-LABEL: test_signed_i64_f32:28; X86: # %bb.0:29; X86-NEXT: pushl %edi30; X86-NEXT: pushl %esi31; X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero32; X86-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero33; X86-NEXT: vcvttps2qq %xmm1, %xmm134; X86-NEXT: vmovd %xmm1, %esi35; X86-NEXT: xorl %ecx, %ecx36; X86-NEXT: vucomiss {{\.?LCPI[0-9]+_[0-9]+}}, %xmm037; X86-NEXT: cmovbl %ecx, %esi38; X86-NEXT: vpextrd $1, %xmm1, %eax39; X86-NEXT: movl $-2147483648, %edi # imm = 0x8000000040; X86-NEXT: cmovael %eax, %edi41; X86-NEXT: vucomiss {{\.?LCPI[0-9]+_[0-9]+}}, %xmm042; X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF43; X86-NEXT: cmovbel %edi, %edx44; X86-NEXT: movl $-1, %eax45; X86-NEXT: cmovbel %esi, %eax46; X86-NEXT: vucomiss %xmm0, %xmm047; X86-NEXT: cmovpl %ecx, %eax48; X86-NEXT: cmovpl %ecx, %edx49; X86-NEXT: popl %esi50; X86-NEXT: popl %edi51; X86-NEXT: retl52;53; X64-LABEL: test_signed_i64_f32:54; X64: # %bb.0:55; X64-NEXT: vcvttss2sis %xmm0, %rax56; X64-NEXT: retq57 %x = call i64 @llvm.fptosi.sat.i64.f32(float %f)58 ret i64 %x59}60 61;62; 64-bit float to signed integer63;64 65declare i32 @llvm.fptosi.sat.i32.f64 (double)66declare i64 @llvm.fptosi.sat.i64.f64 (double)67 68define i32 @test_signed_i32_f64(double %f) nounwind {69; X86-LABEL: test_signed_i32_f64:70; X86: # %bb.0:71; X86-NEXT: vcvttsd2sis {{[0-9]+}}(%esp), %eax72; X86-NEXT: retl73;74; X64-LABEL: test_signed_i32_f64:75; X64: # %bb.0:76; X64-NEXT: vcvttsd2sis %xmm0, %eax77; X64-NEXT: retq78 %x = call i32 @llvm.fptosi.sat.i32.f64(double %f)79 ret i32 %x80}81 82define i64 @test_signed_i64_f64(double %f) nounwind {83; X86-LABEL: test_signed_i64_f64:84; X86: # %bb.0:85; X86-NEXT: pushl %edi86; X86-NEXT: pushl %esi87; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero88; X86-NEXT: vcvttpd2qq %xmm0, %xmm189; X86-NEXT: vmovd %xmm1, %esi90; X86-NEXT: xorl %ecx, %ecx91; X86-NEXT: vucomisd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm092; X86-NEXT: cmovbl %ecx, %esi93; X86-NEXT: vpextrd $1, %xmm1, %eax94; X86-NEXT: movl $-2147483648, %edi # imm = 0x8000000095; X86-NEXT: cmovael %eax, %edi96; X86-NEXT: vucomisd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm097; X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF98; X86-NEXT: cmovbel %edi, %edx99; X86-NEXT: movl $-1, %eax100; X86-NEXT: cmovbel %esi, %eax101; X86-NEXT: vucomisd %xmm0, %xmm0102; X86-NEXT: cmovpl %ecx, %eax103; X86-NEXT: cmovpl %ecx, %edx104; X86-NEXT: popl %esi105; X86-NEXT: popl %edi106; X86-NEXT: retl107;108; X64-LABEL: test_signed_i64_f64:109; X64: # %bb.0:110; X64-NEXT: vcvttsd2sis %xmm0, %rax111; X64-NEXT: retq112 %x = call i64 @llvm.fptosi.sat.i64.f64(double %f)113 ret i64 %x114}115 116; VCVTTPD2DQS117define <2 x i32> @test_signed_v2i32_v2f64(<2 x double> %d) nounwind {118; CHECK-LABEL: test_signed_v2i32_v2f64:119; CHECK: # %bb.0:120; CHECK-NEXT: vcvttpd2dqs %xmm0, %xmm0121; CHECK-NEXT: ret{{[l|q]}}122 %x = call <2 x i32> @llvm.fptosi.sat.v2i32.v2f64(<2 x double> %d)123 ret <2 x i32> %x124}125 126define <4 x i32> @test_signed_v4i32_v4f64(<4 x double> %f) nounwind {127; CHECK-LABEL: test_signed_v4i32_v4f64:128; CHECK: # %bb.0:129; CHECK-NEXT: vcvttpd2dqs %ymm0, %xmm0130; CHECK-NEXT: vzeroupper131; CHECK-NEXT: ret{{[l|q]}}132 %x = call <4 x i32> @llvm.fptosi.sat.v4i32.v4f64(<4 x double> %f)133 ret <4 x i32> %x134}135 136; VCVTTPD2QQS137define <2 x i64> @test_signed_v2i64_v2f64(<2 x double> %f) nounwind {138; CHECK-LABEL: test_signed_v2i64_v2f64:139; CHECK: # %bb.0:140; CHECK-NEXT: vcvttpd2qqs %xmm0, %xmm0141; CHECK-NEXT: ret{{[l|q]}}142 %x = call <2 x i64> @llvm.fptosi.sat.v2i64.v2f64(<2 x double> %f)143 ret <2 x i64> %x144}145 146define <4 x i64> @test_signed_v4i64_v4f64(<4 x double> %f) nounwind {147; CHECK-LABEL: test_signed_v4i64_v4f64:148; CHECK: # %bb.0:149; CHECK-NEXT: vcvttpd2qqs %ymm0, %ymm0150; CHECK-NEXT: ret{{[l|q]}}151 %x = call <4 x i64> @llvm.fptosi.sat.v4i64.v4f64(<4 x double> %f)152 ret <4 x i64> %x153}154 155; VCVTTPD2UDQS156define <2 x i32> @test_unsigned_v2i32_v2f64(<2 x double> %d) nounwind {157; CHECK-LABEL: test_unsigned_v2i32_v2f64:158; CHECK: # %bb.0:159; CHECK-NEXT: vcvttpd2udqs %xmm0, %xmm0160; CHECK-NEXT: ret{{[l|q]}}161 %x = call <2 x i32> @llvm.fptoui.sat.v2i32.v2f64(<2 x double> %d)162 ret <2 x i32> %x163}164 165define <4 x i32> @test_unsigned_v4i32_v4f64(<4 x double> %f) nounwind {166; CHECK-LABEL: test_unsigned_v4i32_v4f64:167; CHECK: # %bb.0:168; CHECK-NEXT: vcvttpd2udqs %ymm0, %xmm0169; CHECK-NEXT: vzeroupper170; CHECK-NEXT: ret{{[l|q]}}171 %x = call <4 x i32> @llvm.fptoui.sat.v4i32.v4f64(<4 x double> %f)172 ret <4 x i32> %x173}174 175; VCVTTPD2UQQS176define <2 x i64> @test_unsigned_v2i64_v2f64(<2 x double> %f) nounwind {177; CHECK-LABEL: test_unsigned_v2i64_v2f64:178; CHECK: # %bb.0:179; CHECK-NEXT: vcvttpd2uqqs %xmm0, %xmm0180; CHECK-NEXT: ret{{[l|q]}}181 %x = call <2 x i64> @llvm.fptoui.sat.v2i64.v2f64(<2 x double> %f)182 ret <2 x i64> %x183}184 185define <4 x i64> @test_unsigned_v4i64_v4f64(<4 x double> %f) nounwind {186; CHECK-LABEL: test_unsigned_v4i64_v4f64:187; CHECK: # %bb.0:188; CHECK-NEXT: vcvttpd2uqqs %ymm0, %ymm0189; CHECK-NEXT: ret{{[l|q]}}190 %x = call <4 x i64> @llvm.fptoui.sat.v4i64.v4f64(<4 x double> %f)191 ret <4 x i64> %x192}193 194; VCVTTPS2DQS195define <4 x i32> @test_signed_v4i32_v4f32(<4 x float> %f) nounwind {196; CHECK-LABEL: test_signed_v4i32_v4f32:197; CHECK: # %bb.0:198; CHECK-NEXT: vcvttps2dqs %xmm0, %xmm0199; CHECK-NEXT: ret{{[l|q]}}200 %x = call <4 x i32> @llvm.fptosi.sat.v4i32.v4f32(<4 x float> %f)201 ret <4 x i32> %x202}203 204define <8 x i32> @test_signed_v8i32_v8f32(<8 x float> %f) nounwind {205; CHECK-LABEL: test_signed_v8i32_v8f32:206; CHECK: # %bb.0:207; CHECK-NEXT: vcvttps2dqs %ymm0, %ymm0208; CHECK-NEXT: ret{{[l|q]}}209 %x = call <8 x i32> @llvm.fptosi.sat.v8i32.v8f32(<8 x float> %f)210 ret <8 x i32> %x211}212 213; VCVTTPS2UDQS214define <4 x i32> @test_unsigned_v4i32_v4f32(<4 x float> %f) nounwind {215; CHECK-LABEL: test_unsigned_v4i32_v4f32:216; CHECK: # %bb.0:217; CHECK-NEXT: vcvttps2udqs %xmm0, %xmm0218; CHECK-NEXT: ret{{[l|q]}}219 %x = call <4 x i32> @llvm.fptoui.sat.v4i32.v4f32(<4 x float> %f)220 ret <4 x i32> %x221}222 223define <8 x i32> @test_unsigned_v8i32_v8f32(<8 x float> %f) nounwind {224; CHECK-LABEL: test_unsigned_v8i32_v8f32:225; CHECK: # %bb.0:226; CHECK-NEXT: vcvttps2udqs %ymm0, %ymm0227; CHECK-NEXT: ret{{[l|q]}}228 %x = call <8 x i32> @llvm.fptoui.sat.v8i32.v8f32(<8 x float> %f)229 ret <8 x i32> %x230}231 232; VCVTTPS2QQS233define <2 x i64> @test_signed_v2i64_v2f32(<2 x float> %f) nounwind {234; CHECK-LABEL: test_signed_v2i64_v2f32:235; CHECK: # %bb.0:236; CHECK-NEXT: vcvttps2qqs %xmm0, %xmm0237; CHECK-NEXT: ret{{[l|q]}}238 %x = call <2 x i64> @llvm.fptosi.sat.v2i64.v2f32(<2 x float> %f)239 ret <2 x i64> %x240}241 242define <4 x i64> @test_signed_v4i64_v4f32(<4 x float> %f) nounwind {243; CHECK-LABEL: test_signed_v4i64_v4f32:244; CHECK: # %bb.0:245; CHECK-NEXT: vcvttps2qqs %xmm0, %ymm0246; CHECK-NEXT: ret{{[l|q]}}247 %x = call <4 x i64> @llvm.fptosi.sat.v4i64.v4f32(<4 x float> %f)248 ret <4 x i64> %x249}250 251; VCVTTPS2UQQS252define <2 x i64> @test_unsigned_v2i64_v2f32(<2 x float> %f) nounwind {253; CHECK-LABEL: test_unsigned_v2i64_v2f32:254; CHECK: # %bb.0:255; CHECK-NEXT: vcvttps2uqqs %xmm0, %xmm0256; CHECK-NEXT: ret{{[l|q]}}257 %x = call <2 x i64> @llvm.fptoui.sat.v2i64.v2f32(<2 x float> %f)258 ret <2 x i64> %x259}260 261define <4 x i64> @test_unsigned_v4i64_v4f32(<4 x float> %f) nounwind {262; CHECK-LABEL: test_unsigned_v4i64_v4f32:263; CHECK: # %bb.0:264; CHECK-NEXT: vcvttps2uqqs %xmm0, %ymm0265; CHECK-NEXT: ret{{[l|q]}}266 %x = call <4 x i64> @llvm.fptoui.sat.v4i64.v4f32(<4 x float> %f)267 ret <4 x i64> %x268}269