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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X643; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X864 5define i32 @test_x86_avx512_vcvttsd2usis(<2 x double> %a0) {6; CHECK-LABEL: test_x86_avx512_vcvttsd2usis:7; CHECK: # %bb.0:8; CHECK-NEXT: vcvttsd2usis %xmm0, %ecx # encoding: [0x62,0xf5,0x7f,0x08,0x6c,0xc8]9; CHECK-NEXT: vcvttsd2usis {sae}, %xmm0, %eax # encoding: [0x62,0xf5,0x7f,0x18,0x6c,0xc0]10; CHECK-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]11; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]12 %res0 = call i32 @llvm.x86.avx10.vcvttsd2usis(<2 x double> %a0, i32 4) ;13 %res1 = call i32 @llvm.x86.avx10.vcvttsd2usis(<2 x double> %a0, i32 8) ;14 %res2 = add i32 %res0, %res115 ret i32 %res216}17declare i32 @llvm.x86.avx10.vcvttsd2usis(<2 x double>, i32) nounwind readnone18 19define i32 @test_x86_avx512_vcvttsd2sis(<2 x double> %a0) {20; CHECK-LABEL: test_x86_avx512_vcvttsd2sis:21; CHECK: # %bb.0:22; CHECK-NEXT: vcvttsd2sis %xmm0, %ecx # encoding: [0x62,0xf5,0x7f,0x08,0x6d,0xc8]23; CHECK-NEXT: vcvttsd2sis {sae}, %xmm0, %eax # encoding: [0x62,0xf5,0x7f,0x18,0x6d,0xc0]24; CHECK-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]25; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]26 %res0 = call i32 @llvm.x86.avx10.vcvttsd2sis(<2 x double> %a0, i32 4) ;27 %res1 = call i32 @llvm.x86.avx10.vcvttsd2sis(<2 x double> %a0, i32 8) ;28 %res2 = add i32 %res0, %res129 ret i32 %res230}31declare i32 @llvm.x86.avx10.vcvttsd2sis(<2 x double>, i32) nounwind readnone32 33define i32 @test_x86_avx512_vcvttss2sis(<4 x float> %a0) {34; CHECK-LABEL: test_x86_avx512_vcvttss2sis:35; CHECK: # %bb.0:36; CHECK-NEXT: vcvttss2sis {sae}, %xmm0, %ecx # encoding: [0x62,0xf5,0x7e,0x18,0x6d,0xc8]37; CHECK-NEXT: vcvttss2sis %xmm0, %eax # encoding: [0x62,0xf5,0x7e,0x08,0x6d,0xc0]38; CHECK-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]39; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]40 %res0 = call i32 @llvm.x86.avx10.vcvttss2sis(<4 x float> %a0, i32 8) ;41 %res1 = call i32 @llvm.x86.avx10.vcvttss2sis(<4 x float> %a0, i32 4) ;42 %res2 = add i32 %res0, %res143 ret i32 %res244}45declare i32 @llvm.x86.avx10.vcvttss2sis(<4 x float>, i32) nounwind readnone46 47define i32 @test_x86_avx512_vcvttss2sis_load(ptr %a0) {48; X64-LABEL: test_x86_avx512_vcvttss2sis_load:49; X64: # %bb.0:50; X64-NEXT: vcvttss2sis (%rdi), %eax # encoding: [0x62,0xf5,0x7e,0x08,0x6d,0x07]51; X64-NEXT: retq # encoding: [0xc3]52;53; X86-LABEL: test_x86_avx512_vcvttss2sis_load:54; X86: # %bb.0:55; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]56; X86-NEXT: vcvttss2sis (%eax), %eax # encoding: [0x62,0xf5,0x7e,0x08,0x6d,0x00]57; X86-NEXT: retl # encoding: [0xc3]58 %a1 = load <4 x float>, ptr %a059 %res = call i32 @llvm.x86.avx10.vcvttss2sis(<4 x float> %a1, i32 4) ;60 ret i32 %res61}62 63define i32 @test_x86_avx512_vcvttss2usis(<4 x float> %a0) {64; CHECK-LABEL: test_x86_avx512_vcvttss2usis:65; CHECK: # %bb.0:66; CHECK-NEXT: vcvttss2usis {sae}, %xmm0, %ecx # encoding: [0x62,0xf5,0x7e,0x18,0x6c,0xc8]67; CHECK-NEXT: vcvttss2usis %xmm0, %eax # encoding: [0x62,0xf5,0x7e,0x08,0x6c,0xc0]68; CHECK-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]69; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]70 %res0 = call i32 @llvm.x86.avx10.vcvttss2usis(<4 x float> %a0, i32 8) ;71 %res1 = call i32 @llvm.x86.avx10.vcvttss2usis(<4 x float> %a0, i32 4) ;72 %res2 = add i32 %res0, %res173 ret i32 %res274}75declare i32 @llvm.x86.avx10.vcvttss2usis(<4 x float>, i32) nounwind readnone76 77define <4 x i32> @test_int_x86_mask_vcvtt_pd2dqs_256(<4 x double> %x0, <4 x i32> %src, i8 %mask) {78; X64-LABEL: test_int_x86_mask_vcvtt_pd2dqs_256:79; X64: # %bb.0:80; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]81; X64-NEXT: vcvttpd2dqs %ymm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0xfc,0x29,0x6d,0xc8]82; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]83; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]84; X64-NEXT: retq # encoding: [0xc3]85;86; X86-LABEL: test_int_x86_mask_vcvtt_pd2dqs_256:87; X86: # %bb.0:88; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]89; X86-NEXT: vcvttpd2dqs %ymm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0xfc,0x29,0x6d,0xc8]90; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]91; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]92; X86-NEXT: retl # encoding: [0xc3]93 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.256( <4 x double> %x0, <4 x i32> %src, i8 %mask)94 ret <4 x i32> %res95}96 97define <4 x i32> @test_int_x86_maskz_vcvtt_pd2dqs_256_z(<4 x double> %x0, i8 %mask) {98; X64-LABEL: test_int_x86_maskz_vcvtt_pd2dqs_256_z:99; X64: # %bb.0:100; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]101; X64-NEXT: vcvttpd2dqs %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xa9,0x6d,0xc0]102; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]103; X64-NEXT: retq # encoding: [0xc3]104;105; X86-LABEL: test_int_x86_maskz_vcvtt_pd2dqs_256_z:106; X86: # %bb.0:107; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]108; X86-NEXT: vcvttpd2dqs %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xa9,0x6d,0xc0]109; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]110; X86-NEXT: retl # encoding: [0xc3]111 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.256( <4 x double> %x0, <4 x i32> zeroinitializer, i8 %mask)112 ret <4 x i32> %res113}114 115define <4 x i32> @test_int_x86_mask_vcvtt_pd2dqs_256_undef(<4 x double> %x0, i8 %mask) {116; X64-LABEL: test_int_x86_mask_vcvtt_pd2dqs_256_undef:117; X64: # %bb.0:118; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]119; X64-NEXT: vcvttpd2dqs %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xa9,0x6d,0xc0]120; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]121; X64-NEXT: retq # encoding: [0xc3]122;123; X86-LABEL: test_int_x86_mask_vcvtt_pd2dqs_256_undef:124; X86: # %bb.0:125; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]126; X86-NEXT: vcvttpd2dqs %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xa9,0x6d,0xc0]127; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]128; X86-NEXT: retl # encoding: [0xc3]129 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.256( <4 x double> %x0, <4 x i32> undef, i8 %mask)130 ret <4 x i32> %res131}132 133define <4 x i32> @test_int_x86_mask_vcvtt_pd2dqs_256_default(<4 x double>* %xptr) {134; X64-LABEL: test_int_x86_mask_vcvtt_pd2dqs_256_default:135; X64: # %bb.0:136; X64-NEXT: vcvttpd2dqsy (%rdi), %xmm0 # encoding: [0x62,0xf5,0xfc,0x28,0x6d,0x07]137; X64-NEXT: retq # encoding: [0xc3]138;139; X86-LABEL: test_int_x86_mask_vcvtt_pd2dqs_256_default:140; X86: # %bb.0:141; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]142; X86-NEXT: vcvttpd2dqsy (%eax), %xmm0 # encoding: [0x62,0xf5,0xfc,0x28,0x6d,0x00]143; X86-NEXT: retl # encoding: [0xc3]144 %x0 = load <4 x double>, <4 x double> * %xptr145 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.256( <4 x double> %x0, <4 x i32> undef, i8 -1)146 ret <4 x i32> %res147}148declare <4 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.256(<4 x double>, <4 x i32>, i8 )149 150define <4 x i32> @test_int_x86_mask_vcvtt_pd2udqs_256(<4 x double> %x0, <4 x i32> %src, i8 %mask) {151; X64-LABEL: test_int_x86_mask_vcvtt_pd2udqs_256:152; X64: # %bb.0:153; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]154; X64-NEXT: vcvttpd2udqs %ymm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0xfc,0x29,0x6c,0xc8]155; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]156; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]157; X64-NEXT: retq # encoding: [0xc3]158;159; X86-LABEL: test_int_x86_mask_vcvtt_pd2udqs_256:160; X86: # %bb.0:161; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]162; X86-NEXT: vcvttpd2udqs %ymm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0xfc,0x29,0x6c,0xc8]163; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]164; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]165; X86-NEXT: retl # encoding: [0xc3]166 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.256( <4 x double> %x0, <4 x i32> %src, i8 %mask)167 ret <4 x i32> %res168}169 170define <4 x i32> @test_int_x86_maskz_vcvtt_pd2udqs_256_z(<4 x double> %x0, i8 %mask) {171; X64-LABEL: test_int_x86_maskz_vcvtt_pd2udqs_256_z:172; X64: # %bb.0:173; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]174; X64-NEXT: vcvttpd2udqs %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xa9,0x6c,0xc0]175; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]176; X64-NEXT: retq # encoding: [0xc3]177;178; X86-LABEL: test_int_x86_maskz_vcvtt_pd2udqs_256_z:179; X86: # %bb.0:180; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]181; X86-NEXT: vcvttpd2udqs %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xa9,0x6c,0xc0]182; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]183; X86-NEXT: retl # encoding: [0xc3]184 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.256( <4 x double> %x0, <4 x i32> zeroinitializer, i8 %mask)185 ret <4 x i32> %res186}187 188define <4 x i32> @test_int_x86_mask_vcvtt_pd2udqs_256_undef(<4 x double> %x0, i8 %mask) {189; X64-LABEL: test_int_x86_mask_vcvtt_pd2udqs_256_undef:190; X64: # %bb.0:191; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]192; X64-NEXT: vcvttpd2udqs %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xa9,0x6c,0xc0]193; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]194; X64-NEXT: retq # encoding: [0xc3]195;196; X86-LABEL: test_int_x86_mask_vcvtt_pd2udqs_256_undef:197; X86: # %bb.0:198; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]199; X86-NEXT: vcvttpd2udqs %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0xa9,0x6c,0xc0]200; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]201; X86-NEXT: retl # encoding: [0xc3]202 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.256( <4 x double> %x0, <4 x i32> undef, i8 %mask)203 ret <4 x i32> %res204}205 206 207define <4 x i32> @test_int_x86_mask_vcvtt_pd2udqs_256_default(<4 x double>* %x0) {208; X64-LABEL: test_int_x86_mask_vcvtt_pd2udqs_256_default:209; X64: # %bb.0:210; X64-NEXT: vcvttpd2udqsy (%rdi), %xmm0 # encoding: [0x62,0xf5,0xfc,0x28,0x6c,0x07]211; X64-NEXT: retq # encoding: [0xc3]212;213; X86-LABEL: test_int_x86_mask_vcvtt_pd2udqs_256_default:214; X86: # %bb.0:215; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]216; X86-NEXT: vcvttpd2udqsy (%eax), %xmm0 # encoding: [0x62,0xf5,0xfc,0x28,0x6c,0x00]217; X86-NEXT: retl # encoding: [0xc3]218 %x10 = load <4 x double>, <4 x double> * %x0219 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.256( <4 x double> %x10, <4 x i32> undef, i8 -1)220 ret <4 x i32> %res221}222declare <4 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.256(<4 x double>, <4 x i32>, i8 )223 224define <4 x i64> @test_int_x86_mask_vcvtt_pd2qqs_256(<4 x double> %x0, <4 x i64> %src, i8 %mask) {225; X64-LABEL: test_int_x86_mask_vcvtt_pd2qqs_256:226; X64: # %bb.0:227; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]228; X64-NEXT: vcvttpd2qqs %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0xfd,0x29,0x6d,0xc8]229; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]230; X64-NEXT: retq # encoding: [0xc3]231;232; X86-LABEL: test_int_x86_mask_vcvtt_pd2qqs_256:233; X86: # %bb.0:234; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]235; X86-NEXT: vcvttpd2qqs %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0xfd,0x29,0x6d,0xc8]236; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]237; X86-NEXT: retl # encoding: [0xc3]238 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.256( <4 x double> %x0, <4 x i64> %src, i8 %mask)239 ret <4 x i64> %res240}241 242define <4 x i64> @test_int_x86_maskz_vcvtt_pd2qqs_256_z(<4 x double> %x0, i8 %mask) {243; X64-LABEL: test_int_x86_maskz_vcvtt_pd2qqs_256_z:244; X64: # %bb.0:245; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]246; X64-NEXT: vcvttpd2qqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xa9,0x6d,0xc0]247; X64-NEXT: retq # encoding: [0xc3]248;249; X86-LABEL: test_int_x86_maskz_vcvtt_pd2qqs_256_z:250; X86: # %bb.0:251; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]252; X86-NEXT: vcvttpd2qqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xa9,0x6d,0xc0]253; X86-NEXT: retl # encoding: [0xc3]254 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.256( <4 x double> %x0, <4 x i64> zeroinitializer, i8 %mask)255 ret <4 x i64> %res256}257 258define <4 x i64> @test_int_x86_mask_vcvtt_pd2qqs_256_undef(<4 x double> %x0, i8 %mask) {259; X64-LABEL: test_int_x86_mask_vcvtt_pd2qqs_256_undef:260; X64: # %bb.0:261; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]262; X64-NEXT: vcvttpd2qqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xa9,0x6d,0xc0]263; X64-NEXT: retq # encoding: [0xc3]264;265; X86-LABEL: test_int_x86_mask_vcvtt_pd2qqs_256_undef:266; X86: # %bb.0:267; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]268; X86-NEXT: vcvttpd2qqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xa9,0x6d,0xc0]269; X86-NEXT: retl # encoding: [0xc3]270 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.256( <4 x double> %x0, <4 x i64> undef, i8 %mask)271 ret <4 x i64> %res272}273 274 275define <4 x i64> @test_int_x86_mask_vcvtt_pd2qqs_256_default(<4 x double>* %x0) {276; X64-LABEL: test_int_x86_mask_vcvtt_pd2qqs_256_default:277; X64: # %bb.0:278; X64-NEXT: vcvttpd2qqs (%rdi), %ymm0 # encoding: [0x62,0xf5,0xfd,0x28,0x6d,0x07]279; X64-NEXT: retq # encoding: [0xc3]280;281; X86-LABEL: test_int_x86_mask_vcvtt_pd2qqs_256_default:282; X86: # %bb.0:283; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]284; X86-NEXT: vcvttpd2qqs (%eax), %ymm0 # encoding: [0x62,0xf5,0xfd,0x28,0x6d,0x00]285; X86-NEXT: retl # encoding: [0xc3]286 %x10 = load <4 x double>, <4 x double>* %x0287 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.256( <4 x double> %x10, <4 x i64> undef, i8 -1)288 ret <4 x i64> %res289}290declare <4 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.256(<4 x double>, <4 x i64>, i8 )291 292define <4 x i64> @test_int_x86_mask_vcvtt_pd2uqqs_256(<4 x double> %x0, <4 x i64> %src, i8 %mask) {293; X64-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_256:294; X64: # %bb.0:295; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]296; X64-NEXT: vcvttpd2uqqs %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0xfd,0x29,0x6c,0xc8]297; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]298; X64-NEXT: retq # encoding: [0xc3]299;300; X86-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_256:301; X86: # %bb.0:302; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]303; X86-NEXT: vcvttpd2uqqs %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0xfd,0x29,0x6c,0xc8]304; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]305; X86-NEXT: retl # encoding: [0xc3]306 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.256( <4 x double> %x0, <4 x i64> %src, i8 %mask)307 ret <4 x i64> %res308}309 310define <4 x i64> @test_int_x86_maskz_vcvtt_pd2uqqs_256_z(<4 x double> %x0, i8 %mask) {311; X64-LABEL: test_int_x86_maskz_vcvtt_pd2uqqs_256_z:312; X64: # %bb.0:313; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]314; X64-NEXT: vcvttpd2uqqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xa9,0x6c,0xc0]315; X64-NEXT: retq # encoding: [0xc3]316;317; X86-LABEL: test_int_x86_maskz_vcvtt_pd2uqqs_256_z:318; X86: # %bb.0:319; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]320; X86-NEXT: vcvttpd2uqqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xa9,0x6c,0xc0]321; X86-NEXT: retl # encoding: [0xc3]322 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.256( <4 x double> %x0, <4 x i64> zeroinitializer, i8 %mask)323 ret <4 x i64> %res324}325 326define <4 x i64> @test_int_x86_mask_vcvtt_pd2uqqs_256_undef(<4 x double> %x0, i8 %mask) {327; X64-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_256_undef:328; X64: # %bb.0:329; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]330; X64-NEXT: vcvttpd2uqqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xa9,0x6c,0xc0]331; X64-NEXT: retq # encoding: [0xc3]332;333; X86-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_256_undef:334; X86: # %bb.0:335; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]336; X86-NEXT: vcvttpd2uqqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0xa9,0x6c,0xc0]337; X86-NEXT: retl # encoding: [0xc3]338 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.256( <4 x double> %x0, <4 x i64> undef, i8 %mask)339 ret <4 x i64> %res340}341 342 343define <4 x i64> @test_int_x86_mask_vcvtt_pd2uqqs_256_default(<4 x double>* %x0) {344; X64-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_256_default:345; X64: # %bb.0:346; X64-NEXT: vcvttpd2uqqs (%rdi), %ymm0 # encoding: [0x62,0xf5,0xfd,0x28,0x6c,0x07]347; X64-NEXT: retq # encoding: [0xc3]348;349; X86-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_256_default:350; X86: # %bb.0:351; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]352; X86-NEXT: vcvttpd2uqqs (%eax), %ymm0 # encoding: [0x62,0xf5,0xfd,0x28,0x6c,0x00]353; X86-NEXT: retl # encoding: [0xc3]354 %x10 = load <4 x double>, <4 x double>* %x0355 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.256( <4 x double> %x10, <4 x i64> undef, i8 -1)356 ret <4 x i64> %res357}358declare <4 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.256(<4 x double>, <4 x i64>, i8 )359 360define <8 x i32> @test_int_x86_mask_vcvtt_ps2dqs_256(<8 x float> %x0, <8 x i32> %src, i8 %mask) {361; X64-LABEL: test_int_x86_mask_vcvtt_ps2dqs_256:362; X64: # %bb.0:363; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]364; X64-NEXT: vcvttps2dqs %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0x7c,0x29,0x6d,0xc8]365; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]366; X64-NEXT: retq # encoding: [0xc3]367;368; X86-LABEL: test_int_x86_mask_vcvtt_ps2dqs_256:369; X86: # %bb.0:370; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]371; X86-NEXT: vcvttps2dqs %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0x7c,0x29,0x6d,0xc8]372; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]373; X86-NEXT: retl # encoding: [0xc3]374 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.256( <8 x float> %x0, <8 x i32> %src, i8 %mask)375 ret <8 x i32> %res376}377 378define <8 x i32> @test_int_x86_maskz_vcvtt_ps2dqs_256_z(<8 x float> %x0, i8 %mask) {379; X64-LABEL: test_int_x86_maskz_vcvtt_ps2dqs_256_z:380; X64: # %bb.0:381; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]382; X64-NEXT: vcvttps2dqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x6d,0xc0]383; X64-NEXT: retq # encoding: [0xc3]384;385; X86-LABEL: test_int_x86_maskz_vcvtt_ps2dqs_256_z:386; X86: # %bb.0:387; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]388; X86-NEXT: vcvttps2dqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x6d,0xc0]389; X86-NEXT: retl # encoding: [0xc3]390 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.256( <8 x float> %x0, <8 x i32> zeroinitializer, i8 %mask)391 ret <8 x i32> %res392}393 394define <8 x i32> @test_int_x86_mask_vcvtt_ps2dqs_256_undef(<8 x float> %x0, i8 %mask) {395; X64-LABEL: test_int_x86_mask_vcvtt_ps2dqs_256_undef:396; X64: # %bb.0:397; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]398; X64-NEXT: vcvttps2dqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x6d,0xc0]399; X64-NEXT: retq # encoding: [0xc3]400;401; X86-LABEL: test_int_x86_mask_vcvtt_ps2dqs_256_undef:402; X86: # %bb.0:403; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]404; X86-NEXT: vcvttps2dqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x6d,0xc0]405; X86-NEXT: retl # encoding: [0xc3]406 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.256( <8 x float> %x0, <8 x i32> undef, i8 %mask)407 ret <8 x i32> %res408}409 410define <8 x i32> @test_int_x86_mask_vcvtt_ps2dqs_256_default(<8 x float>* %x0) {411; X64-LABEL: test_int_x86_mask_vcvtt_ps2dqs_256_default:412; X64: # %bb.0:413; X64-NEXT: vcvttps2dqs (%rdi), %ymm0 # encoding: [0x62,0xf5,0x7c,0x28,0x6d,0x07]414; X64-NEXT: retq # encoding: [0xc3]415;416; X86-LABEL: test_int_x86_mask_vcvtt_ps2dqs_256_default:417; X86: # %bb.0:418; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]419; X86-NEXT: vcvttps2dqs (%eax), %ymm0 # encoding: [0x62,0xf5,0x7c,0x28,0x6d,0x00]420; X86-NEXT: retl # encoding: [0xc3]421 %x10 = load <8 x float>, <8 x float>* %x0422 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.256( <8 x float> %x10, <8 x i32> undef, i8 -1)423 ret <8 x i32> %res424}425declare <8 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.256(<8 x float>, <8 x i32>, i8 )426 427define <8 x i32> @test_int_x86_mask_vcvtt_ps2udqs_256(<8 x float> %x0, <8 x i32> %src, i8 %mask) {428; X64-LABEL: test_int_x86_mask_vcvtt_ps2udqs_256:429; X64: # %bb.0:430; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]431; X64-NEXT: vcvttps2udqs %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0x7c,0x29,0x6c,0xc8]432; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]433; X64-NEXT: retq # encoding: [0xc3]434;435; X86-LABEL: test_int_x86_mask_vcvtt_ps2udqs_256:436; X86: # %bb.0:437; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]438; X86-NEXT: vcvttps2udqs %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0x7c,0x29,0x6c,0xc8]439; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]440; X86-NEXT: retl # encoding: [0xc3]441 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.256( <8 x float> %x0, <8 x i32> %src, i8 %mask)442 ret <8 x i32> %res443}444 445define <8 x i32> @test_int_x86_maskz_vcvtt_ps2udqs_256_z(<8 x float> %x0, i8 %mask) {446; X64-LABEL: test_int_x86_maskz_vcvtt_ps2udqs_256_z:447; X64: # %bb.0:448; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]449; X64-NEXT: vcvttps2udqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x6c,0xc0]450; X64-NEXT: retq # encoding: [0xc3]451;452; X86-LABEL: test_int_x86_maskz_vcvtt_ps2udqs_256_z:453; X86: # %bb.0:454; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]455; X86-NEXT: vcvttps2udqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x6c,0xc0]456; X86-NEXT: retl # encoding: [0xc3]457 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.256( <8 x float> %x0, <8 x i32> zeroinitializer, i8 %mask)458 ret <8 x i32> %res459}460 461define <8 x i32> @test_int_x86_mask_vcvtt_ps2udqs_256_undef(<8 x float> %x0, i8 %mask) {462; X64-LABEL: test_int_x86_mask_vcvtt_ps2udqs_256_undef:463; X64: # %bb.0:464; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]465; X64-NEXT: vcvttps2udqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x6c,0xc0]466; X64-NEXT: retq # encoding: [0xc3]467;468; X86-LABEL: test_int_x86_mask_vcvtt_ps2udqs_256_undef:469; X86: # %bb.0:470; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]471; X86-NEXT: vcvttps2udqs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x6c,0xc0]472; X86-NEXT: retl # encoding: [0xc3]473 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.256( <8 x float> %x0, <8 x i32> undef, i8 %mask)474 ret <8 x i32> %res475}476 477 478define <8 x i32> @test_int_x86_mask_vcvtt_ps2udqs_256_default(<8 x float>* %x0) {479; X64-LABEL: test_int_x86_mask_vcvtt_ps2udqs_256_default:480; X64: # %bb.0:481; X64-NEXT: vcvttps2udqs (%rdi), %ymm0 # encoding: [0x62,0xf5,0x7c,0x28,0x6c,0x07]482; X64-NEXT: retq # encoding: [0xc3]483;484; X86-LABEL: test_int_x86_mask_vcvtt_ps2udqs_256_default:485; X86: # %bb.0:486; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]487; X86-NEXT: vcvttps2udqs (%eax), %ymm0 # encoding: [0x62,0xf5,0x7c,0x28,0x6c,0x00]488; X86-NEXT: retl # encoding: [0xc3]489 %x10 = load <8 x float>, <8 x float>* %x0490 %res = call <8 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.256( <8 x float> %x10, <8 x i32> undef, i8 -1)491 ret <8 x i32> %res492}493declare <8 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.256(<8 x float>, <8 x i32>, i8 )494 495define <4 x i64> @test_int_x86_maskz_vcvtt_ps2qqs_256_z(<4 x float> %x0, i8 %mask) {496; X64-LABEL: test_int_x86_maskz_vcvtt_ps2qqs_256_z:497; X64: # %bb.0:498; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]499; X64-NEXT: vcvttps2qqs %xmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x6d,0xc0]500; X64-NEXT: retq # encoding: [0xc3]501;502; X86-LABEL: test_int_x86_maskz_vcvtt_ps2qqs_256_z:503; X86: # %bb.0:504; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]505; X86-NEXT: vcvttps2qqs %xmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x6d,0xc0]506; X86-NEXT: retl # encoding: [0xc3]507 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.256( <4 x float> %x0, <4 x i64> zeroinitializer, i8 %mask)508 ret <4 x i64> %res509}510 511define <4 x i64> @test_int_x86_mask_vcvtt_ps2qqs_256_undef(<4 x float> %x0, i8 %mask) {512; X64-LABEL: test_int_x86_mask_vcvtt_ps2qqs_256_undef:513; X64: # %bb.0:514; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]515; X64-NEXT: vcvttps2qqs %xmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x6d,0xc0]516; X64-NEXT: retq # encoding: [0xc3]517;518; X86-LABEL: test_int_x86_mask_vcvtt_ps2qqs_256_undef:519; X86: # %bb.0:520; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]521; X86-NEXT: vcvttps2qqs %xmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x6d,0xc0]522; X86-NEXT: retl # encoding: [0xc3]523 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.256( <4 x float> %x0, <4 x i64> undef, i8 %mask)524 ret <4 x i64> %res525}526declare <4 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.256(<4 x float>, <4 x i64>, i8 )527 528define <4 x i64> @test_int_x86_mask_vcvtt_ps2uqqs_256(<4 x float> %x0, <4 x i64> %src, i8 %mask) {529; X64-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_256:530; X64: # %bb.0:531; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]532; X64-NEXT: vcvttps2uqqs %xmm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0x7d,0x29,0x6c,0xc8]533; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]534; X64-NEXT: retq # encoding: [0xc3]535;536; X86-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_256:537; X86: # %bb.0:538; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]539; X86-NEXT: vcvttps2uqqs %xmm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0x7d,0x29,0x6c,0xc8]540; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]541; X86-NEXT: retl # encoding: [0xc3]542 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.256( <4 x float> %x0, <4 x i64> %src, i8 %mask)543 ret <4 x i64> %res544}545 546define <4 x i64> @test_int_x86_maskz_vcvtt_ps2uqqs_256_z(<4 x float> %x0, i8 %mask) {547; X64-LABEL: test_int_x86_maskz_vcvtt_ps2uqqs_256_z:548; X64: # %bb.0:549; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]550; X64-NEXT: vcvttps2uqqs %xmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x6c,0xc0]551; X64-NEXT: retq # encoding: [0xc3]552;553; X86-LABEL: test_int_x86_maskz_vcvtt_ps2uqqs_256_z:554; X86: # %bb.0:555; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]556; X86-NEXT: vcvttps2uqqs %xmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x6c,0xc0]557; X86-NEXT: retl # encoding: [0xc3]558 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.256( <4 x float> %x0, <4 x i64> zeroinitializer, i8 %mask)559 ret <4 x i64> %res560}561 562define <4 x i64> @test_int_x86_mask_vcvtt_ps2uqqs_256_undef(<4 x float> %x0, i8 %mask) {563; X64-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_256_undef:564; X64: # %bb.0:565; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]566; X64-NEXT: vcvttps2uqqs %xmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x6c,0xc0]567; X64-NEXT: retq # encoding: [0xc3]568;569; X86-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_256_undef:570; X86: # %bb.0:571; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]572; X86-NEXT: vcvttps2uqqs %xmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x6c,0xc0]573; X86-NEXT: retl # encoding: [0xc3]574 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.256( <4 x float> %x0, <4 x i64> undef, i8 %mask)575 ret <4 x i64> %res576}577 578 579define <4 x i64> @test_int_x86_mask_vcvtt_ps2uqqs_256_default(<4 x float> %x0) {580; CHECK-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_256_default:581; CHECK: # %bb.0:582; CHECK-NEXT: vcvttps2uqqs %xmm0, %ymm0 # encoding: [0x62,0xf5,0x7d,0x28,0x6c,0xc0]583; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]584 %res = call <4 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.256( <4 x float> %x0, <4 x i64> undef, i8 -1)585 ret <4 x i64> %res586}587 588declare <4 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.256(<4 x float>, <4 x i64>, i8 )589 590define <4 x i32> @test_int_x86_mask_vcvtt_pd2dqs_128(<2 x double> %x0, <4 x i32> %src, i8 %mask) {591; X64-LABEL: test_int_x86_mask_vcvtt_pd2dqs_128:592; X64: # %bb.0:593; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]594; X64-NEXT: vcvttpd2dqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0xfc,0x09,0x6d,0xc8]595; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]596; X64-NEXT: retq # encoding: [0xc3]597;598; X86-LABEL: test_int_x86_mask_vcvtt_pd2dqs_128:599; X86: # %bb.0:600; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]601; X86-NEXT: vcvttpd2dqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0xfc,0x09,0x6d,0xc8]602; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]603; X86-NEXT: retl # encoding: [0xc3]604 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.128( <2 x double> %x0, <4 x i32> %src, i8 %mask)605 ret <4 x i32> %res606}607 608define <4 x i32> @test_int_x86_maskz_vcvtt_pd2dqs_128_z(<2 x double> %x0, i8 %mask) {609; X64-LABEL: test_int_x86_maskz_vcvtt_pd2dqs_128_z:610; X64: # %bb.0:611; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]612; X64-NEXT: vcvttpd2dqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0x89,0x6d,0xc0]613; X64-NEXT: retq # encoding: [0xc3]614;615; X86-LABEL: test_int_x86_maskz_vcvtt_pd2dqs_128_z:616; X86: # %bb.0:617; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]618; X86-NEXT: vcvttpd2dqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0x89,0x6d,0xc0]619; X86-NEXT: retl # encoding: [0xc3]620 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.128( <2 x double> %x0, <4 x i32> zeroinitializer, i8 %mask)621 ret <4 x i32> %res622}623 624define <4 x i32> @test_int_x86_mask_vcvtt_pd2dqs_128_undef(<2 x double> %x0, i8 %mask) {625; X64-LABEL: test_int_x86_mask_vcvtt_pd2dqs_128_undef:626; X64: # %bb.0:627; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]628; X64-NEXT: vcvttpd2dqs %xmm0, %xmm0 {%k1} # encoding: [0x62,0xf5,0xfc,0x09,0x6d,0xc0]629; X64-NEXT: retq # encoding: [0xc3]630;631; X86-LABEL: test_int_x86_mask_vcvtt_pd2dqs_128_undef:632; X86: # %bb.0:633; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]634; X86-NEXT: vcvttpd2dqs %xmm0, %xmm0 {%k1} # encoding: [0x62,0xf5,0xfc,0x09,0x6d,0xc0]635; X86-NEXT: retl # encoding: [0xc3]636 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.128( <2 x double> %x0, <4 x i32> undef, i8 %mask)637 ret <4 x i32> %res638}639 640 641define <4 x i32> @test_int_x86_mask_vcvtt_pd2dqs_128_default(<2 x double> %x0) {642; CHECK-LABEL: test_int_x86_mask_vcvtt_pd2dqs_128_default:643; CHECK: # %bb.0:644; CHECK-NEXT: vcvttpd2dqs %xmm0, %xmm0 # encoding: [0x62,0xf5,0xfc,0x08,0x6d,0xc0]645; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]646 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.128( <2 x double> %x0, <4 x i32> undef, i8 -1)647 ret <4 x i32> %res648}649declare <4 x i32> @llvm.x86.avx10.mask.vcvttpd2dqs.128(<2 x double>, <4 x i32>, i8)650 651define <4 x i32> @test_int_x86_mask_vcvtt_pd2udqs_128(<2 x double> %x0, <4 x i32> %src, i8 %mask) {652; X64-LABEL: test_int_x86_mask_vcvtt_pd2udqs_128:653; X64: # %bb.0:654; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]655; X64-NEXT: vcvttpd2dqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0xfc,0x09,0x6d,0xc8]656; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]657; X64-NEXT: retq # encoding: [0xc3]658;659; X86-LABEL: test_int_x86_mask_vcvtt_pd2udqs_128:660; X86: # %bb.0:661; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]662; X86-NEXT: vcvttpd2dqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0xfc,0x09,0x6d,0xc8]663; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]664; X86-NEXT: retl # encoding: [0xc3]665 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.128( <2 x double> %x0, <4 x i32> %src, i8 %mask)666 ret <4 x i32> %res667}668 669define <4 x i32> @test_int_x86_maskz_vcvtt_pd2udqs_128_z(<2 x double> %x0, i8 %mask) {670; X64-LABEL: test_int_x86_maskz_vcvtt_pd2udqs_128_z:671; X64: # %bb.0:672; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]673; X64-NEXT: vcvttpd2dqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0x89,0x6d,0xc0]674; X64-NEXT: retq # encoding: [0xc3]675;676; X86-LABEL: test_int_x86_maskz_vcvtt_pd2udqs_128_z:677; X86: # %bb.0:678; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]679; X86-NEXT: vcvttpd2dqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfc,0x89,0x6d,0xc0]680; X86-NEXT: retl # encoding: [0xc3]681 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.128( <2 x double> %x0, <4 x i32> zeroinitializer, i8 %mask)682 ret <4 x i32> %res683}684 685define <4 x i32> @test_int_x86_mask_vcvtt_pd2udqs_128_undef(<2 x double> %x0, i8 %mask) {686; X64-LABEL: test_int_x86_mask_vcvtt_pd2udqs_128_undef:687; X64: # %bb.0:688; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]689; X64-NEXT: vcvttpd2dqs %xmm0, %xmm0 {%k1} # encoding: [0x62,0xf5,0xfc,0x09,0x6d,0xc0]690; X64-NEXT: retq # encoding: [0xc3]691;692; X86-LABEL: test_int_x86_mask_vcvtt_pd2udqs_128_undef:693; X86: # %bb.0:694; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]695; X86-NEXT: vcvttpd2dqs %xmm0, %xmm0 {%k1} # encoding: [0x62,0xf5,0xfc,0x09,0x6d,0xc0]696; X86-NEXT: retl # encoding: [0xc3]697 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.128( <2 x double> %x0, <4 x i32> undef, i8 %mask)698 ret <4 x i32> %res699}700 701 702define <4 x i32> @test_int_x86_mask_vcvtt_pd2udqs_128_default(<2 x double> %x0) {703; CHECK-LABEL: test_int_x86_mask_vcvtt_pd2udqs_128_default:704; CHECK: # %bb.0:705; CHECK-NEXT: vcvttpd2udqs %xmm0, %xmm0 # encoding: [0x62,0xf5,0xfc,0x08,0x6c,0xc0]706; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]707 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.128( <2 x double> %x0, <4 x i32> undef, i8 -1)708 ret <4 x i32> %res709}710declare <4 x i32> @llvm.x86.avx10.mask.vcvttpd2udqs.128(<2 x double>, <4 x i32>, i8)711 712define <2 x i64> @test_int_x86_mask_vcvtt_pd2qqs_128(<2 x double> %x0, <2 x i64> %src, i8 %mask) {713; X64-LABEL: test_int_x86_mask_vcvtt_pd2qqs_128:714; X64: # %bb.0:715; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]716; X64-NEXT: vcvttpd2qqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0xfd,0x09,0x6d,0xc8]717; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]718; X64-NEXT: retq # encoding: [0xc3]719;720; X86-LABEL: test_int_x86_mask_vcvtt_pd2qqs_128:721; X86: # %bb.0:722; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]723; X86-NEXT: vcvttpd2qqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0xfd,0x09,0x6d,0xc8]724; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]725; X86-NEXT: retl # encoding: [0xc3]726 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.128( <2 x double> %x0, <2 x i64> %src, i8 %mask)727 ret <2 x i64> %res728}729 730define <2 x i64> @test_int_x86_maskz_vcvtt_pd2qqs_128_z(<2 x double> %x0, i8 %mask) {731; X64-LABEL: test_int_x86_maskz_vcvtt_pd2qqs_128_z:732; X64: # %bb.0:733; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]734; X64-NEXT: vcvttpd2qqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0x89,0x6d,0xc0]735; X64-NEXT: retq # encoding: [0xc3]736;737; X86-LABEL: test_int_x86_maskz_vcvtt_pd2qqs_128_z:738; X86: # %bb.0:739; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]740; X86-NEXT: vcvttpd2qqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0x89,0x6d,0xc0]741; X86-NEXT: retl # encoding: [0xc3]742 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.128( <2 x double> %x0, <2 x i64> zeroinitializer, i8 %mask)743 ret <2 x i64> %res744}745 746define <2 x i64> @test_int_x86_mask_vcvtt_pd2qqs_128_undef(<2 x double> %x0, i8 %mask) {747; X64-LABEL: test_int_x86_mask_vcvtt_pd2qqs_128_undef:748; X64: # %bb.0:749; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]750; X64-NEXT: vcvttpd2qqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0x89,0x6d,0xc0]751; X64-NEXT: retq # encoding: [0xc3]752;753; X86-LABEL: test_int_x86_mask_vcvtt_pd2qqs_128_undef:754; X86: # %bb.0:755; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]756; X86-NEXT: vcvttpd2qqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0x89,0x6d,0xc0]757; X86-NEXT: retl # encoding: [0xc3]758 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.128( <2 x double> %x0, <2 x i64> undef, i8 %mask)759 ret <2 x i64> %res760}761 762 763define <2 x i64> @test_int_x86_mask_vcvtt_pd2qqs_128_default(<2 x double> %x0) {764; CHECK-LABEL: test_int_x86_mask_vcvtt_pd2qqs_128_default:765; CHECK: # %bb.0:766; CHECK-NEXT: vcvttpd2qqs %xmm0, %xmm0 # encoding: [0x62,0xf5,0xfd,0x08,0x6d,0xc0]767; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]768 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.128( <2 x double> %x0, <2 x i64> undef, i8 -1)769 ret <2 x i64> %res770}771declare <2 x i64> @llvm.x86.avx10.mask.vcvttpd2qqs.128(<2 x double>, <2 x i64>, i8)772 773define <2 x i64> @test_int_x86_mask_vcvtt_pd2uqqs_128(<2 x double> %x0, <2 x i64> %src, i8 %mask) {774; X64-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_128:775; X64: # %bb.0:776; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]777; X64-NEXT: vcvttpd2uqqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0xfd,0x09,0x6c,0xc8]778; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]779; X64-NEXT: retq # encoding: [0xc3]780;781; X86-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_128:782; X86: # %bb.0:783; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]784; X86-NEXT: vcvttpd2uqqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0xfd,0x09,0x6c,0xc8]785; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]786; X86-NEXT: retl # encoding: [0xc3]787 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.128( <2 x double> %x0, <2 x i64> %src, i8 %mask)788 ret <2 x i64> %res789}790 791define <2 x i64> @test_int_x86_maskz_vcvtt_pd2uqqs_128_z(<2 x double> %x0, i8 %mask) {792; X64-LABEL: test_int_x86_maskz_vcvtt_pd2uqqs_128_z:793; X64: # %bb.0:794; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]795; X64-NEXT: vcvttpd2uqqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0x89,0x6c,0xc0]796; X64-NEXT: retq # encoding: [0xc3]797;798; X86-LABEL: test_int_x86_maskz_vcvtt_pd2uqqs_128_z:799; X86: # %bb.0:800; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]801; X86-NEXT: vcvttpd2uqqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0x89,0x6c,0xc0]802; X86-NEXT: retl # encoding: [0xc3]803 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.128( <2 x double> %x0, <2 x i64> zeroinitializer, i8 %mask)804 ret <2 x i64> %res805}806 807define <2 x i64> @test_int_x86_mask_vcvtt_pd2uqqs_128_undef(<2 x double> %x0, i8 %mask) {808; X64-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_128_undef:809; X64: # %bb.0:810; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]811; X64-NEXT: vcvttpd2uqqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0x89,0x6c,0xc0]812; X64-NEXT: retq # encoding: [0xc3]813;814; X86-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_128_undef:815; X86: # %bb.0:816; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]817; X86-NEXT: vcvttpd2uqqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfd,0x89,0x6c,0xc0]818; X86-NEXT: retl # encoding: [0xc3]819 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.128( <2 x double> %x0, <2 x i64> undef, i8 %mask)820 ret <2 x i64> %res821}822 823 824define <2 x i64> @test_int_x86_mask_vcvtt_pd2uqqs_128_default(<2 x double> %x0) {825; CHECK-LABEL: test_int_x86_mask_vcvtt_pd2uqqs_128_default:826; CHECK: # %bb.0:827; CHECK-NEXT: vcvttpd2uqqs %xmm0, %xmm0 # encoding: [0x62,0xf5,0xfd,0x08,0x6c,0xc0]828; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]829 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.128( <2 x double> %x0, <2 x i64> undef, i8 -1)830 ret <2 x i64> %res831}832declare <2 x i64> @llvm.x86.avx10.mask.vcvttpd2uqqs.128(<2 x double>, <2 x i64>, i8)833 834define <2 x i64> @test_int_x86_mask_vcvtt_ps2qqs_128_default(<4 x float> %x0) {835; CHECK-LABEL: test_int_x86_mask_vcvtt_ps2qqs_128_default:836; CHECK: # %bb.0:837; CHECK-NEXT: vcvttps2qqs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7d,0x08,0x6d,0xc0]838; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]839 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.128( <4 x float> %x0, <2 x i64> undef, i8 -1)840 ret <2 x i64> %res841}842 843define <4 x i32> @test_int_x86_mask_vcvtt_ps2dqs_128(<4 x float> %x0, <4 x i32> %src, i8 %mask) {844; X64-LABEL: test_int_x86_mask_vcvtt_ps2dqs_128:845; X64: # %bb.0:846; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]847; X64-NEXT: vcvttps2dqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0x7c,0x09,0x6d,0xc8]848; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]849; X64-NEXT: retq # encoding: [0xc3]850;851; X86-LABEL: test_int_x86_mask_vcvtt_ps2dqs_128:852; X86: # %bb.0:853; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]854; X86-NEXT: vcvttps2dqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0x7c,0x09,0x6d,0xc8]855; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]856; X86-NEXT: retl # encoding: [0xc3]857 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.128( <4 x float> %x0, <4 x i32> %src, i8 %mask)858 ret <4 x i32> %res859}860define <4 x i32> @test_int_x86_maskz_vcvtt_ps2dqs_128_z(<4 x float> %x0, i8 %mask) {861; X64-LABEL: test_int_x86_maskz_vcvtt_ps2dqs_128_z:862; X64: # %bb.0:863; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]864; X64-NEXT: vcvttps2dqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6d,0xc0]865; X64-NEXT: retq # encoding: [0xc3]866;867; X86-LABEL: test_int_x86_maskz_vcvtt_ps2dqs_128_z:868; X86: # %bb.0:869; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]870; X86-NEXT: vcvttps2dqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6d,0xc0]871; X86-NEXT: retl # encoding: [0xc3]872 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.128( <4 x float> %x0, <4 x i32> zeroinitializer, i8 %mask)873 ret <4 x i32> %res874}875define <4 x i32> @test_int_x86_mask_vcvtt_ps2dqs_128_undef(<4 x float> %x0, i8 %mask) {876; X64-LABEL: test_int_x86_mask_vcvtt_ps2dqs_128_undef:877; X64: # %bb.0:878; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]879; X64-NEXT: vcvttps2dqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6d,0xc0]880; X64-NEXT: retq # encoding: [0xc3]881;882; X86-LABEL: test_int_x86_mask_vcvtt_ps2dqs_128_undef:883; X86: # %bb.0:884; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]885; X86-NEXT: vcvttps2dqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6d,0xc0]886; X86-NEXT: retl # encoding: [0xc3]887 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.128( <4 x float> %x0, <4 x i32> undef, i8 %mask)888 ret <4 x i32> %res889}890define <4 x i32> @test_int_x86_mask_vcvtt_ps2dqs_128_default(<4 x float> %x0) {891; CHECK-LABEL: test_int_x86_mask_vcvtt_ps2dqs_128_default:892; CHECK: # %bb.0:893; CHECK-NEXT: vcvttps2dqs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7c,0x08,0x6d,0xc0]894; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]895 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.128( <4 x float> %x0, <4 x i32> undef, i8 -1)896 ret <4 x i32> %res897}898declare <4 x i32> @llvm.x86.avx10.mask.vcvttps2dqs.128(<4 x float>, <4 x i32>, i8)899 900define <4 x i32> @test_int_x86_mask_vcvtt_ps2udqs_128(<4 x float> %x0, <4 x i32> %src, i8 %mask) {901; X64-LABEL: test_int_x86_mask_vcvtt_ps2udqs_128:902; X64: # %bb.0:903; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]904; X64-NEXT: vcvttps2udqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0x7c,0x09,0x6c,0xc8]905; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]906; X64-NEXT: retq # encoding: [0xc3]907;908; X86-LABEL: test_int_x86_mask_vcvtt_ps2udqs_128:909; X86: # %bb.0:910; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]911; X86-NEXT: vcvttps2udqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0x7c,0x09,0x6c,0xc8]912; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]913; X86-NEXT: retl # encoding: [0xc3]914 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.128( <4 x float> %x0, <4 x i32> %src, i8 %mask)915 ret <4 x i32> %res916}917define <4 x i32> @test_int_x86_maskz_vcvtt_ps2udqs_128_z(<4 x float> %x0, i8 %mask) {918; X64-LABEL: test_int_x86_maskz_vcvtt_ps2udqs_128_z:919; X64: # %bb.0:920; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]921; X64-NEXT: vcvttps2udqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6c,0xc0]922; X64-NEXT: retq # encoding: [0xc3]923;924; X86-LABEL: test_int_x86_maskz_vcvtt_ps2udqs_128_z:925; X86: # %bb.0:926; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]927; X86-NEXT: vcvttps2udqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6c,0xc0]928; X86-NEXT: retl # encoding: [0xc3]929 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.128( <4 x float> %x0, <4 x i32> zeroinitializer, i8 %mask)930 ret <4 x i32> %res931}932define <4 x i32> @test_int_x86_mask_vcvtt_ps2udqs_128_undef(<4 x float> %x0, i8 %mask) {933; X64-LABEL: test_int_x86_mask_vcvtt_ps2udqs_128_undef:934; X64: # %bb.0:935; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]936; X64-NEXT: vcvttps2udqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6c,0xc0]937; X64-NEXT: retq # encoding: [0xc3]938;939; X86-LABEL: test_int_x86_mask_vcvtt_ps2udqs_128_undef:940; X86: # %bb.0:941; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]942; X86-NEXT: vcvttps2udqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6c,0xc0]943; X86-NEXT: retl # encoding: [0xc3]944 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.128( <4 x float> %x0, <4 x i32> undef, i8 %mask)945 ret <4 x i32> %res946}947define <4 x i32> @test_int_x86_mask_vcvtt_ps2udqs_128_default(<4 x float> %x0) {948; CHECK-LABEL: test_int_x86_mask_vcvtt_ps2udqs_128_default:949; CHECK: # %bb.0:950; CHECK-NEXT: vcvttps2udqs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7c,0x08,0x6c,0xc0]951; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]952 %res = call <4 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.128( <4 x float> %x0, <4 x i32> undef, i8 -1)953 ret <4 x i32> %res954}955declare <4 x i32> @llvm.x86.avx10.mask.vcvttps2udqs.128(<4 x float>, <4 x i32>, i8)956 957define <2 x i64> @test_int_x86_mask_vcvtt_ps2qqs_128_undef(<4 x float> %x0, i8 %mask) {958; X64-LABEL: test_int_x86_mask_vcvtt_ps2qqs_128_undef:959; X64: # %bb.0:960; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]961; X64-NEXT: vcvttps2qqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x6d,0xc0]962; X64-NEXT: retq # encoding: [0xc3]963;964; X86-LABEL: test_int_x86_mask_vcvtt_ps2qqs_128_undef:965; X86: # %bb.0:966; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]967; X86-NEXT: vcvttps2qqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x6d,0xc0]968; X86-NEXT: retl # encoding: [0xc3]969 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.128( <4 x float> %x0, <2 x i64> undef, i8 %mask)970 ret <2 x i64> %res971}972 973define <2 x i64> @test_int_x86_maskz_vcvtt_ps2qqs_128_z(<4 x float> %x0, i8 %mask) {974; X64-LABEL: test_int_x86_maskz_vcvtt_ps2qqs_128_z:975; X64: # %bb.0:976; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]977; X64-NEXT: vcvttps2qqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x6d,0xc0]978; X64-NEXT: retq # encoding: [0xc3]979;980; X86-LABEL: test_int_x86_maskz_vcvtt_ps2qqs_128_z:981; X86: # %bb.0:982; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]983; X86-NEXT: vcvttps2qqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x6d,0xc0]984; X86-NEXT: retl # encoding: [0xc3]985 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.128( <4 x float> %x0, <2 x i64> zeroinitializer, i8 %mask)986 ret <2 x i64> %res987}988 989define <2 x i64> @test_int_x86_mask_vcvtt_ps2qqs_128(<4 x float> %x0, <2 x i64> %src, i8 %mask) {990; X64-LABEL: test_int_x86_mask_vcvtt_ps2qqs_128:991; X64: # %bb.0:992; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]993; X64-NEXT: vcvttps2qqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0x7d,0x09,0x6d,0xc8]994; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]995; X64-NEXT: retq # encoding: [0xc3]996;997; X86-LABEL: test_int_x86_mask_vcvtt_ps2qqs_128:998; X86: # %bb.0:999; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]1000; X86-NEXT: vcvttps2qqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0x7d,0x09,0x6d,0xc8]1001; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]1002; X86-NEXT: retl # encoding: [0xc3]1003 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.128( <4 x float> %x0, <2 x i64> %src, i8 %mask)1004 ret <2 x i64> %res1005}1006declare <2 x i64> @llvm.x86.avx10.mask.vcvttps2qqs.128(<4 x float>, <2 x i64>, i8)1007 1008define <2 x i64> @test_int_x86_mask_vcvtt_ps2uqqs_128(<4 x float> %x0, <2 x i64> %src, i8 %mask) {1009; X64-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_128:1010; X64: # %bb.0:1011; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]1012; X64-NEXT: vcvttps2uqqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0x7d,0x09,0x6c,0xc8]1013; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]1014; X64-NEXT: retq # encoding: [0xc3]1015;1016; X86-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_128:1017; X86: # %bb.0:1018; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]1019; X86-NEXT: vcvttps2uqqs %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0x7d,0x09,0x6c,0xc8]1020; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]1021; X86-NEXT: retl # encoding: [0xc3]1022 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.128( <4 x float> %x0, <2 x i64> %src, i8 %mask)1023 ret <2 x i64> %res1024}1025 1026define <2 x i64> @test_int_x86_mask_vcvtt_ps2uqqs_128_undef(<4 x float> %x0, i8 %mask) {1027; X64-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_128_undef:1028; X64: # %bb.0:1029; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]1030; X64-NEXT: vcvttps2uqqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x6c,0xc0]1031; X64-NEXT: retq # encoding: [0xc3]1032;1033; X86-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_128_undef:1034; X86: # %bb.0:1035; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]1036; X86-NEXT: vcvttps2uqqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x6c,0xc0]1037; X86-NEXT: retl # encoding: [0xc3]1038 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.128( <4 x float> %x0, <2 x i64> undef, i8 %mask)1039 ret <2 x i64> %res1040}1041 1042define <2 x i64> @test_int_x86_mask_vcvtt_ps2uqqs_128_default(<4 x float> %x0) {1043; CHECK-LABEL: test_int_x86_mask_vcvtt_ps2uqqs_128_default:1044; CHECK: # %bb.0:1045; CHECK-NEXT: vcvttps2uqqs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7d,0x08,0x6c,0xc0]1046; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]1047 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.128( <4 x float> %x0, <2 x i64> undef, i8 -1)1048 ret <2 x i64> %res1049}1050define <2 x i64> @test_int_x86_maskz_vcvtt_ps2uqqs_128_z(<4 x float> %x0, i8 %mask) {1051; X64-LABEL: test_int_x86_maskz_vcvtt_ps2uqqs_128_z:1052; X64: # %bb.0:1053; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]1054; X64-NEXT: vcvttps2uqqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x6c,0xc0]1055; X64-NEXT: retq # encoding: [0xc3]1056;1057; X86-LABEL: test_int_x86_maskz_vcvtt_ps2uqqs_128_z:1058; X86: # %bb.0:1059; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]1060; X86-NEXT: vcvttps2uqqs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x6c,0xc0]1061; X86-NEXT: retl # encoding: [0xc3]1062 %res = call <2 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.128( <4 x float> %x0, <2 x i64> zeroinitializer, i8 %mask)1063 ret <2 x i64> %res1064}1065declare <2 x i64> @llvm.x86.avx10.mask.vcvttps2uqqs.128(<4 x float>, <2 x i64>, i8)1066 1067