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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X863; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X644 5define <4 x i64> @test_vpaddq(<4 x i64> %i, <4 x i64> %j) nounwind readnone {6; CHECK-LABEL: test_vpaddq:7; CHECK: # %bb.0:8; CHECK-NEXT: vpaddq %ymm1, %ymm0, %ymm09; CHECK-NEXT: ret{{[l|q]}}10 %x = add <4 x i64> %i, %j11 ret <4 x i64> %x12}13 14define <8 x i32> @test_vpaddd(<8 x i32> %i, <8 x i32> %j) nounwind readnone {15; CHECK-LABEL: test_vpaddd:16; CHECK: # %bb.0:17; CHECK-NEXT: vpaddd %ymm1, %ymm0, %ymm018; CHECK-NEXT: ret{{[l|q]}}19 %x = add <8 x i32> %i, %j20 ret <8 x i32> %x21}22 23define <16 x i16> @test_vpaddw(<16 x i16> %i, <16 x i16> %j) nounwind readnone {24; CHECK-LABEL: test_vpaddw:25; CHECK: # %bb.0:26; CHECK-NEXT: vpaddw %ymm1, %ymm0, %ymm027; CHECK-NEXT: ret{{[l|q]}}28 %x = add <16 x i16> %i, %j29 ret <16 x i16> %x30}31 32define <32 x i8> @test_vpaddb(<32 x i8> %i, <32 x i8> %j) nounwind readnone {33; CHECK-LABEL: test_vpaddb:34; CHECK: # %bb.0:35; CHECK-NEXT: vpaddb %ymm1, %ymm0, %ymm036; CHECK-NEXT: ret{{[l|q]}}37 %x = add <32 x i8> %i, %j38 ret <32 x i8> %x39}40 41define <4 x i64> @test_vpsubq(<4 x i64> %i, <4 x i64> %j) nounwind readnone {42; CHECK-LABEL: test_vpsubq:43; CHECK: # %bb.0:44; CHECK-NEXT: vpsubq %ymm1, %ymm0, %ymm045; CHECK-NEXT: ret{{[l|q]}}46 %x = sub <4 x i64> %i, %j47 ret <4 x i64> %x48}49 50define <8 x i32> @test_vpsubd(<8 x i32> %i, <8 x i32> %j) nounwind readnone {51; CHECK-LABEL: test_vpsubd:52; CHECK: # %bb.0:53; CHECK-NEXT: vpsubd %ymm1, %ymm0, %ymm054; CHECK-NEXT: ret{{[l|q]}}55 %x = sub <8 x i32> %i, %j56 ret <8 x i32> %x57}58 59define <16 x i16> @test_vpsubw(<16 x i16> %i, <16 x i16> %j) nounwind readnone {60; CHECK-LABEL: test_vpsubw:61; CHECK: # %bb.0:62; CHECK-NEXT: vpsubw %ymm1, %ymm0, %ymm063; CHECK-NEXT: ret{{[l|q]}}64 %x = sub <16 x i16> %i, %j65 ret <16 x i16> %x66}67 68define <32 x i8> @test_vpsubb(<32 x i8> %i, <32 x i8> %j) nounwind readnone {69; CHECK-LABEL: test_vpsubb:70; CHECK: # %bb.0:71; CHECK-NEXT: vpsubb %ymm1, %ymm0, %ymm072; CHECK-NEXT: ret{{[l|q]}}73 %x = sub <32 x i8> %i, %j74 ret <32 x i8> %x75}76 77define <8 x i32> @test_vpmulld(<8 x i32> %i, <8 x i32> %j) nounwind readnone {78; CHECK-LABEL: test_vpmulld:79; CHECK: # %bb.0:80; CHECK-NEXT: vpmulld %ymm1, %ymm0, %ymm081; CHECK-NEXT: ret{{[l|q]}}82 %x = mul <8 x i32> %i, %j83 ret <8 x i32> %x84}85 86define <16 x i16> @test_vpmullw(<16 x i16> %i, <16 x i16> %j) nounwind readnone {87; CHECK-LABEL: test_vpmullw:88; CHECK: # %bb.0:89; CHECK-NEXT: vpmullw %ymm1, %ymm0, %ymm090; CHECK-NEXT: ret{{[l|q]}}91 %x = mul <16 x i16> %i, %j92 ret <16 x i16> %x93}94 95define <16 x i8> @mul_v16i8(<16 x i8> %i, <16 x i8> %j) nounwind readnone {96; X86-LABEL: mul_v16i8:97; X86: # %bb.0:98; X86-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero99; X86-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero100; X86-NEXT: vpmullw %ymm1, %ymm0, %ymm0101; X86-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0102; X86-NEXT: vextracti128 $1, %ymm0, %xmm1103; X86-NEXT: vpackuswb %xmm1, %xmm0, %xmm0104; X86-NEXT: vzeroupper105; X86-NEXT: retl106;107; X64-LABEL: mul_v16i8:108; X64: # %bb.0:109; X64-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero110; X64-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero111; X64-NEXT: vpmullw %ymm1, %ymm0, %ymm0112; X64-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0113; X64-NEXT: vextracti128 $1, %ymm0, %xmm1114; X64-NEXT: vpackuswb %xmm1, %xmm0, %xmm0115; X64-NEXT: vzeroupper116; X64-NEXT: retq117 %x = mul <16 x i8> %i, %j118 ret <16 x i8> %x119}120 121define <32 x i8> @mul_v32i8(<32 x i8> %i, <32 x i8> %j) nounwind readnone {122; CHECK-LABEL: mul_v32i8:123; CHECK: # %bb.0:124; CHECK-NEXT: vpmullw %ymm1, %ymm0, %ymm2125; CHECK-NEXT: vpbroadcastw {{.*#+}} ymm3 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]126; CHECK-NEXT: vpand %ymm3, %ymm2, %ymm2127; CHECK-NEXT: vpandn %ymm1, %ymm3, %ymm1128; CHECK-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0129; CHECK-NEXT: vpsllw $8, %ymm0, %ymm0130; CHECK-NEXT: vpor %ymm0, %ymm2, %ymm0131; CHECK-NEXT: ret{{[l|q]}}132 %x = mul <32 x i8> %i, %j133 ret <32 x i8> %x134}135 136define <4 x i64> @mul_v4i64(<4 x i64> %i, <4 x i64> %j) nounwind readnone {137; CHECK-LABEL: mul_v4i64:138; CHECK: # %bb.0:139; CHECK-NEXT: vpsrlq $32, %ymm0, %ymm2140; CHECK-NEXT: vpmuludq %ymm1, %ymm2, %ymm2141; CHECK-NEXT: vpsrlq $32, %ymm1, %ymm3142; CHECK-NEXT: vpmuludq %ymm3, %ymm0, %ymm3143; CHECK-NEXT: vpaddq %ymm2, %ymm3, %ymm2144; CHECK-NEXT: vpsllq $32, %ymm2, %ymm2145; CHECK-NEXT: vpmuludq %ymm1, %ymm0, %ymm0146; CHECK-NEXT: vpaddq %ymm2, %ymm0, %ymm0147; CHECK-NEXT: ret{{[l|q]}}148 %x = mul <4 x i64> %i, %j149 ret <4 x i64> %x150}151 152define <8 x i32> @mul_const1(<8 x i32> %x) {153; CHECK-LABEL: mul_const1:154; CHECK: # %bb.0:155; CHECK-NEXT: vpaddd %ymm0, %ymm0, %ymm0156; CHECK-NEXT: ret{{[l|q]}}157 %y = mul <8 x i32> %x, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>158 ret <8 x i32> %y159}160 161define <4 x i64> @mul_const2(<4 x i64> %x) {162; CHECK-LABEL: mul_const2:163; CHECK: # %bb.0:164; CHECK-NEXT: vpsllq $2, %ymm0, %ymm0165; CHECK-NEXT: ret{{[l|q]}}166 %y = mul <4 x i64> %x, <i64 4, i64 4, i64 4, i64 4>167 ret <4 x i64> %y168}169 170define <16 x i16> @mul_const3(<16 x i16> %x) {171; CHECK-LABEL: mul_const3:172; CHECK: # %bb.0:173; CHECK-NEXT: vpsllw $3, %ymm0, %ymm0174; CHECK-NEXT: ret{{[l|q]}}175 %y = mul <16 x i16> %x, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>176 ret <16 x i16> %y177}178 179define <4 x i64> @mul_const4(<4 x i64> %x) {180; CHECK-LABEL: mul_const4:181; CHECK: # %bb.0:182; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1183; CHECK-NEXT: vpsubq %ymm0, %ymm1, %ymm0184; CHECK-NEXT: ret{{[l|q]}}185 %y = mul <4 x i64> %x, <i64 -1, i64 -1, i64 -1, i64 -1>186 ret <4 x i64> %y187}188 189define <8 x i32> @mul_const5(<8 x i32> %x) {190; CHECK-LABEL: mul_const5:191; CHECK: # %bb.0:192; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0193; CHECK-NEXT: ret{{[l|q]}}194 %y = mul <8 x i32> %x, <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>195 ret <8 x i32> %y196}197 198define <8 x i32> @mul_const6(<8 x i32> %x) {199; X86-LABEL: mul_const6:200; X86: # %bb.0:201; X86-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0 # [0,0,0,2,0,2,0,0]202; X86-NEXT: retl203;204; X64-LABEL: mul_const6:205; X64: # %bb.0:206; X64-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [0,0,0,2,0,2,0,0]207; X64-NEXT: retq208 %y = mul <8 x i32> %x, <i32 0, i32 0, i32 0, i32 2, i32 0, i32 2, i32 0, i32 0>209 ret <8 x i32> %y210}211 212define <8 x i64> @mul_const7(<8 x i64> %x) {213; CHECK-LABEL: mul_const7:214; CHECK: # %bb.0:215; CHECK-NEXT: vpaddq %ymm0, %ymm0, %ymm0216; CHECK-NEXT: vpaddq %ymm1, %ymm1, %ymm1217; CHECK-NEXT: ret{{[l|q]}}218 %y = mul <8 x i64> %x, <i64 2, i64 2, i64 2, i64 2, i64 2, i64 2, i64 2, i64 2>219 ret <8 x i64> %y220}221 222define <8 x i16> @mul_const8(<8 x i16> %x) {223; CHECK-LABEL: mul_const8:224; CHECK: # %bb.0:225; CHECK-NEXT: vpsllw $3, %xmm0, %xmm0226; CHECK-NEXT: ret{{[l|q]}}227 %y = mul <8 x i16> %x, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>228 ret <8 x i16> %y229}230 231define <8 x i32> @mul_const9(<8 x i32> %x) {232; CHECK-LABEL: mul_const9:233; CHECK: # %bb.0:234; CHECK-NEXT: vpmovsxbq {{.*#+}} xmm1 = [2,0]235; CHECK-NEXT: vpmulld %ymm1, %ymm0, %ymm0236; CHECK-NEXT: ret{{[l|q]}}237 %y = mul <8 x i32> %x, <i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>238 ret <8 x i32> %y239}240 241; ptr 0x01010101242define <4 x i32> @mul_const10(<4 x i32> %x) {243; CHECK-LABEL: mul_const10:244; CHECK: # %bb.0:245; CHECK-NEXT: vpbroadcastd {{.*#+}} xmm1 = [16843009,16843009,16843009,16843009]246; CHECK-NEXT: vpmulld %xmm1, %xmm0, %xmm0247; CHECK-NEXT: ret{{[l|q]}}248 %m = mul <4 x i32> %x, <i32 16843009, i32 16843009, i32 16843009, i32 16843009>249 ret <4 x i32> %m250}251 252; ptr 0x80808080253define <4 x i32> @mul_const11(<4 x i32> %x) {254; CHECK-LABEL: mul_const11:255; CHECK: # %bb.0:256; CHECK-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2155905152,2155905152,2155905152,2155905152]257; CHECK-NEXT: vpmulld %xmm1, %xmm0, %xmm0258; CHECK-NEXT: ret{{[l|q]}}259 %m = mul <4 x i32> %x, <i32 2155905152, i32 2155905152, i32 2155905152, i32 2155905152>260 ret <4 x i32> %m261}262 263; check we will zero both vectors.264define void @multi_freeze(<2 x double> %x, <2 x double> %y) nounwind {265; X86-LABEL: multi_freeze:266; X86: # %bb.0:267; X86-NEXT: vmovaps %xmm0, %xmm0268; X86-NEXT: vmovaps %xmm1, %xmm1269; X86-NEXT: calll foo@PLT270; X86-NEXT: vzeroupper271; X86-NEXT: retl272;273; X64-LABEL: multi_freeze:274; X64: # %bb.0:275; X64-NEXT: pushq %rax276; X64-NEXT: vmovaps %xmm0, %xmm0277; X64-NEXT: vmovaps %xmm1, %xmm1278; X64-NEXT: callq foo@PLT279; X64-NEXT: popq %rax280; X64-NEXT: vzeroupper281; X64-NEXT: retq282 %1 = freeze <2 x double> poison283 %2 = shufflevector <2 x double> %x, <2 x double> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>284 %3 = shufflevector <2 x double> %y, <2 x double> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>285 call void @foo(<4 x double> %2, <4 x double> %3)286 ret void287}288 289declare void @foo(<4 x double>, <4 x double>)290