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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s | FileCheck %s3 4; This test checks optimal passing values between "cmp" and "kor" intrinsics5; PR288396 7target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"8target triple = "x86_64-unknown-linux-gnu"9 10; Function Attrs: nounwind readnone uwtable11define zeroext i16 @cmp_kor_seq_16(<16 x float> %a, <16 x float> %b, <16 x float> %c, <16 x float> %d, <16 x float> %x) local_unnamed_addr #0 {12; CHECK-LABEL: cmp_kor_seq_16:13; CHECK: # %bb.0: # %entry14; CHECK-NEXT: vcmpgeps %zmm4, %zmm0, %k015; CHECK-NEXT: vcmpgeps %zmm4, %zmm1, %k116; CHECK-NEXT: korw %k1, %k0, %k017; CHECK-NEXT: vcmpgeps %zmm4, %zmm2, %k118; CHECK-NEXT: vcmpgeps %zmm4, %zmm3, %k219; CHECK-NEXT: korw %k2, %k1, %k120; CHECK-NEXT: korw %k1, %k0, %k021; CHECK-NEXT: kmovw %k0, %eax22; CHECK-NEXT: # kill: def $ax killed $ax killed $eax23; CHECK-NEXT: retq24entry:25 %0 = call <16 x i1> @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> %a, <16 x float> %x, i32 13, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i32 4)26 %1 = bitcast <16 x i1> %0 to i1627 %2 = call <16 x i1> @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> %b, <16 x float> %x, i32 13, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i32 4)28 %3 = bitcast <16 x i1> %2 to i1629 %4 = call <16 x i1> @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> %c, <16 x float> %x, i32 13, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i32 4)30 %5 = bitcast <16 x i1> %4 to i1631 %6 = call <16 x i1> @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> %d, <16 x float> %x, i32 13, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i32 4)32 %7 = bitcast <16 x i1> %6 to i1633 %8 = bitcast i16 %1 to <16 x i1>34 %9 = bitcast i16 %3 to <16 x i1>35 %10 = or <16 x i1> %8, %936 %11 = bitcast <16 x i1> %10 to i1637 %12 = bitcast i16 %5 to <16 x i1>38 %13 = bitcast i16 %7 to <16 x i1>39 %14 = or <16 x i1> %12, %1340 %15 = bitcast <16 x i1> %14 to i1641 %16 = bitcast i16 %11 to <16 x i1>42 %17 = bitcast i16 %15 to <16 x i1>43 %18 = or <16 x i1> %16, %1744 %19 = bitcast <16 x i1> %18 to i1645 ret i16 %1946}47 48; Function Attrs: nounwind readnone49declare <16 x i1> @llvm.x86.avx512.mask.cmp.ps.512(<16 x float>, <16 x float>, i32, <16 x i1>, i32) #150 51attributes #0 = { nounwind readnone uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="broadwell" "target-features"="+adx,+aes,+avx,+avx2,+avx512cd,+avx512f,+bmi,+bmi2,+cx16,+f16c,+fma,+fsgsbase,+fxsr,+evex512,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+rdrnd,+rdseed,+rtm,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-vzeroupper" "use-soft-float"="false" }52attributes #1 = { nounwind readnone }53