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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512f,avx512vl,avx512dq | FileCheck %s --check-prefixes=CHECK3 4; PR37751 - https://bugs.llvm.org/show_bug.cgi?id=377515; We can't combine into 'round' instructions because the behavior is different for out-of-range values.6 7declare <16 x i32> @llvm.x86.avx512.mask.cvttps2dq.512(<16 x float>, <16 x i32>, i16, i32)8declare <4 x i32> @llvm.x86.avx512.mask.cvttps2udq.128(<4 x float>, <4 x i32>, i8)9declare <8 x i32> @llvm.x86.avx512.mask.cvttps2udq.256(<8 x float>, <8 x i32>, i8)10declare <16 x i32> @llvm.x86.avx512.mask.cvttps2udq.512(<16 x float>, <16 x i32>, i16, i32)11declare <4 x i32> @llvm.x86.avx512.mask.cvttpd2udq.256(<4 x double>, <4 x i32>, i8)12declare <8 x i32> @llvm.x86.avx512.mask.cvttpd2dq.512(<8 x double>, <8 x i32>, i8, i32)13declare <8 x i32> @llvm.x86.avx512.mask.cvttpd2udq.512(<8 x double>, <8 x i32>, i8, i32)14declare <4 x i64> @llvm.x86.avx512.mask.cvttps2qq.256(<4 x float>, <4 x i64>, i8)15declare <8 x i64> @llvm.x86.avx512.mask.cvttps2qq.512(<8 x float>, <8 x i64>, i8, i32)16declare <4 x i64> @llvm.x86.avx512.mask.cvttps2uqq.256(<4 x float>, <4 x i64>, i8)17declare <8 x i64> @llvm.x86.avx512.mask.cvttps2uqq.512(<8 x float>, <8 x i64>, i8, i32)18declare <2 x i64> @llvm.x86.avx512.mask.cvttpd2qq.128(<2 x double>, <2 x i64>, i8)19declare <4 x i64> @llvm.x86.avx512.mask.cvttpd2qq.256(<4 x double>, <4 x i64>, i8)20declare <8 x i64> @llvm.x86.avx512.mask.cvttpd2qq.512(<8 x double>, <8 x i64>, i8, i32)21declare <2 x i64> @llvm.x86.avx512.mask.cvttpd2uqq.128(<2 x double>, <2 x i64>, i8)22declare <4 x i64> @llvm.x86.avx512.mask.cvttpd2uqq.256(<4 x double>, <4 x i64>, i8)23declare <8 x i64> @llvm.x86.avx512.mask.cvttpd2uqq.512(<8 x double>, <8 x i64>, i8, i32)24 25define <16 x float> @float_to_sint_to_float_mem_v16f32(ptr %p) {26; CHECK-LABEL: float_to_sint_to_float_mem_v16f32:27; CHECK: # %bb.0:28; CHECK-NEXT: vcvttps2dq (%rdi), %zmm029; CHECK-NEXT: vcvtdq2ps %zmm0, %zmm030; CHECK-NEXT: retq31 %x = load <16 x float>, ptr %p32 %fptosi = tail call <16 x i32> @llvm.x86.avx512.mask.cvttps2dq.512(<16 x float> %x, <16 x i32> undef, i16 -1, i32 4)33 %sitofp = sitofp <16 x i32> %fptosi to <16 x float>34 ret <16 x float> %sitofp35}36 37define <16 x float> @float_to_sint_to_float_reg_v16f32(<16 x float> %x) {38; CHECK-LABEL: float_to_sint_to_float_reg_v16f32:39; CHECK: # %bb.0:40; CHECK-NEXT: vcvttps2dq %zmm0, %zmm041; CHECK-NEXT: vcvtdq2ps %zmm0, %zmm042; CHECK-NEXT: retq43 %fptosi = tail call <16 x i32> @llvm.x86.avx512.mask.cvttps2dq.512(<16 x float> %x, <16 x i32> undef, i16 -1, i32 4)44 %sitofp = sitofp <16 x i32> %fptosi to <16 x float>45 ret <16 x float> %sitofp46}47 48define <16 x float> @float_to_uint_to_float_mem_v16f32(ptr %p) {49; CHECK-LABEL: float_to_uint_to_float_mem_v16f32:50; CHECK: # %bb.0:51; CHECK-NEXT: vcvttps2udq (%rdi), %zmm052; CHECK-NEXT: vcvtudq2ps %zmm0, %zmm053; CHECK-NEXT: retq54 %x = load <16 x float>, ptr %p55 %fptoui = tail call <16 x i32> @llvm.x86.avx512.mask.cvttps2udq.512(<16 x float> %x, <16 x i32> undef, i16 -1, i32 4)56 %uitofp = uitofp <16 x i32> %fptoui to <16 x float>57 ret <16 x float> %uitofp58}59 60define <16 x float> @float_to_uint_to_float_reg_v16f32(<16 x float> %x) {61; CHECK-LABEL: float_to_uint_to_float_reg_v16f32:62; CHECK: # %bb.0:63; CHECK-NEXT: vcvttps2udq %zmm0, %zmm064; CHECK-NEXT: vcvtudq2ps %zmm0, %zmm065; CHECK-NEXT: retq66 %fptoui = tail call <16 x i32> @llvm.x86.avx512.mask.cvttps2udq.512(<16 x float> %x, <16 x i32> undef, i16 -1, i32 4)67 %uitofp = uitofp <16 x i32> %fptoui to <16 x float>68 ret <16 x float> %uitofp69}70 71define <4 x float> @float_to_uint_to_float_mem_v4f32(ptr %p) {72; CHECK-LABEL: float_to_uint_to_float_mem_v4f32:73; CHECK: # %bb.0:74; CHECK-NEXT: vcvttps2udq (%rdi), %xmm075; CHECK-NEXT: vcvtudq2ps %xmm0, %xmm076; CHECK-NEXT: retq77 %x = load <4 x float>, ptr %p78 %fptoui = tail call <4 x i32> @llvm.x86.avx512.mask.cvttps2udq.128(<4 x float> %x, <4 x i32> undef, i8 -1)79 %uitofp = uitofp <4 x i32> %fptoui to <4 x float>80 ret <4 x float> %uitofp81}82 83define <4 x float> @float_to_uint_to_float_reg_v4f32(<4 x float> %x) {84; CHECK-LABEL: float_to_uint_to_float_reg_v4f32:85; CHECK: # %bb.0:86; CHECK-NEXT: vcvttps2udq %xmm0, %xmm087; CHECK-NEXT: vcvtudq2ps %xmm0, %xmm088; CHECK-NEXT: retq89 %fptoui = tail call <4 x i32> @llvm.x86.avx512.mask.cvttps2udq.128(<4 x float> %x, <4 x i32> undef, i8 -1)90 %uitofp = uitofp <4 x i32> %fptoui to <4 x float>91 ret <4 x float> %uitofp92}93 94define <8 x float> @float_to_uint_to_float_mem_v8f32(ptr %p) {95; CHECK-LABEL: float_to_uint_to_float_mem_v8f32:96; CHECK: # %bb.0:97; CHECK-NEXT: vcvttps2udq (%rdi), %ymm098; CHECK-NEXT: vcvtudq2ps %ymm0, %ymm099; CHECK-NEXT: retq100 %x = load <8 x float>, ptr %p101 %fptoui = tail call <8 x i32> @llvm.x86.avx512.mask.cvttps2udq.256(<8 x float> %x, <8 x i32> undef, i8 -1)102 %uitofp = uitofp <8 x i32> %fptoui to <8 x float>103 ret <8 x float> %uitofp104}105 106define <8 x float> @float_to_uint_to_float_reg_v8f32(<8 x float> %x) {107; CHECK-LABEL: float_to_uint_to_float_reg_v8f32:108; CHECK: # %bb.0:109; CHECK-NEXT: vcvttps2udq %ymm0, %ymm0110; CHECK-NEXT: vcvtudq2ps %ymm0, %ymm0111; CHECK-NEXT: retq112 %fptoui = tail call <8 x i32> @llvm.x86.avx512.mask.cvttps2udq.256(<8 x float> %x, <8 x i32> undef, i8 -1)113 %uitofp = uitofp <8 x i32> %fptoui to <8 x float>114 ret <8 x float> %uitofp115}116 117define <4 x double> @double_to_uint_to_double_mem_v4f64(ptr %p) {118; CHECK-LABEL: double_to_uint_to_double_mem_v4f64:119; CHECK: # %bb.0:120; CHECK-NEXT: vcvttpd2udqy (%rdi), %xmm0121; CHECK-NEXT: vcvtudq2pd %xmm0, %ymm0122; CHECK-NEXT: retq123 %x = load <4 x double>, ptr %p124 %fptoui = tail call <4 x i32> @llvm.x86.avx512.mask.cvttpd2udq.256(<4 x double> %x, <4 x i32> undef, i8 -1)125 %uitofp = uitofp <4 x i32> %fptoui to <4 x double>126 ret <4 x double> %uitofp127}128 129define <4 x double> @double_to_uint_to_double_reg_v4f64(<4 x double> %x) {130; CHECK-LABEL: double_to_uint_to_double_reg_v4f64:131; CHECK: # %bb.0:132; CHECK-NEXT: vcvttpd2udq %ymm0, %xmm0133; CHECK-NEXT: vcvtudq2pd %xmm0, %ymm0134; CHECK-NEXT: retq135 %fptoui = tail call <4 x i32> @llvm.x86.avx512.mask.cvttpd2udq.256(<4 x double> %x, <4 x i32> undef, i8 -1)136 %uitofp = uitofp <4 x i32> %fptoui to <4 x double>137 ret <4 x double> %uitofp138}139 140define <8 x double> @double_to_sint_to_double_mem_v8f64(ptr %p) {141; CHECK-LABEL: double_to_sint_to_double_mem_v8f64:142; CHECK: # %bb.0:143; CHECK-NEXT: vcvttpd2dq (%rdi), %ymm0144; CHECK-NEXT: vcvtdq2pd %ymm0, %zmm0145; CHECK-NEXT: retq146 %x = load <8 x double>, ptr %p147 %fptosi = tail call <8 x i32> @llvm.x86.avx512.mask.cvttpd2dq.512(<8 x double> %x, <8 x i32> undef, i8 -1, i32 4)148 %sitofp = sitofp <8 x i32> %fptosi to <8 x double>149 ret <8 x double> %sitofp150}151 152define <8 x double> @double_to_sint_to_double_reg_v8f64(<8 x double> %x) {153; CHECK-LABEL: double_to_sint_to_double_reg_v8f64:154; CHECK: # %bb.0:155; CHECK-NEXT: vcvttpd2dq %zmm0, %ymm0156; CHECK-NEXT: vcvtdq2pd %ymm0, %zmm0157; CHECK-NEXT: retq158 %fptosi = tail call <8 x i32> @llvm.x86.avx512.mask.cvttpd2dq.512(<8 x double> %x, <8 x i32> undef, i8 -1, i32 4)159 %sitofp = sitofp <8 x i32> %fptosi to <8 x double>160 ret <8 x double> %sitofp161}162 163define <8 x double> @double_to_uint_to_double_mem_v8f64(ptr %p) {164; CHECK-LABEL: double_to_uint_to_double_mem_v8f64:165; CHECK: # %bb.0:166; CHECK-NEXT: vcvttpd2udq (%rdi), %ymm0167; CHECK-NEXT: vcvtudq2pd %ymm0, %zmm0168; CHECK-NEXT: retq169 %x = load <8 x double>, ptr %p170 %fptoui = tail call <8 x i32> @llvm.x86.avx512.mask.cvttpd2udq.512(<8 x double> %x, <8 x i32> undef, i8 -1, i32 4)171 %uitofp = uitofp <8 x i32> %fptoui to <8 x double>172 ret <8 x double> %uitofp173}174 175define <8 x double> @double_to_uint_to_double_reg_v8f64(<8 x double> %x) {176; CHECK-LABEL: double_to_uint_to_double_reg_v8f64:177; CHECK: # %bb.0:178; CHECK-NEXT: vcvttpd2udq %zmm0, %ymm0179; CHECK-NEXT: vcvtudq2pd %ymm0, %zmm0180; CHECK-NEXT: retq181 %fptoui = tail call <8 x i32> @llvm.x86.avx512.mask.cvttpd2udq.512(<8 x double> %x, <8 x i32> undef, i8 -1, i32 4)182 %uitofp = uitofp <8 x i32> %fptoui to <8 x double>183 ret <8 x double> %uitofp184}185 186define <4 x float> @float_to_sint64_to_float_mem_v4f32(ptr %p) {187; CHECK-LABEL: float_to_sint64_to_float_mem_v4f32:188; CHECK: # %bb.0:189; CHECK-NEXT: vcvttps2qq (%rdi), %ymm0190; CHECK-NEXT: vcvtqq2ps %ymm0, %xmm0191; CHECK-NEXT: vzeroupper192; CHECK-NEXT: retq193 %x = load <4 x float>, ptr %p194 %fptosi = tail call <4 x i64> @llvm.x86.avx512.mask.cvttps2qq.256(<4 x float> %x, <4 x i64> undef, i8 -1)195 %sitofp = sitofp <4 x i64> %fptosi to <4 x float>196 ret <4 x float> %sitofp197}198 199define <4 x float> @float_to_sint64_to_float_reg_v4f32(<4 x float> %x) {200; CHECK-LABEL: float_to_sint64_to_float_reg_v4f32:201; CHECK: # %bb.0:202; CHECK-NEXT: vcvttps2qq %xmm0, %ymm0203; CHECK-NEXT: vcvtqq2ps %ymm0, %xmm0204; CHECK-NEXT: vzeroupper205; CHECK-NEXT: retq206 %fptosi = tail call <4 x i64> @llvm.x86.avx512.mask.cvttps2qq.256(<4 x float> %x, <4 x i64> undef, i8 -1)207 %sitofp = sitofp <4 x i64> %fptosi to <4 x float>208 ret <4 x float> %sitofp209}210 211define <4 x float> @float_to_uint64_to_float_mem_v4f32(ptr %p) {212; CHECK-LABEL: float_to_uint64_to_float_mem_v4f32:213; CHECK: # %bb.0:214; CHECK-NEXT: vcvttps2uqq (%rdi), %ymm0215; CHECK-NEXT: vcvtuqq2ps %ymm0, %xmm0216; CHECK-NEXT: vzeroupper217; CHECK-NEXT: retq218 %x = load <4 x float>, ptr %p219 %fptoui = tail call <4 x i64> @llvm.x86.avx512.mask.cvttps2uqq.256(<4 x float> %x, <4 x i64> undef, i8 -1)220 %uitofp = uitofp <4 x i64> %fptoui to <4 x float>221 ret <4 x float> %uitofp222}223 224define <4 x float> @float_to_uint64_to_float_reg_v4f32(<4 x float> %x) {225; CHECK-LABEL: float_to_uint64_to_float_reg_v4f32:226; CHECK: # %bb.0:227; CHECK-NEXT: vcvttps2uqq %xmm0, %ymm0228; CHECK-NEXT: vcvtuqq2ps %ymm0, %xmm0229; CHECK-NEXT: vzeroupper230; CHECK-NEXT: retq231 %fptoui = tail call <4 x i64> @llvm.x86.avx512.mask.cvttps2uqq.256(<4 x float> %x, <4 x i64> undef, i8 -1)232 %uitofp = uitofp <4 x i64> %fptoui to <4 x float>233 ret <4 x float> %uitofp234}235 236define <8 x float> @float_to_sint64_to_float_mem_v8f32(ptr %p) {237; CHECK-LABEL: float_to_sint64_to_float_mem_v8f32:238; CHECK: # %bb.0:239; CHECK-NEXT: vcvttps2qq (%rdi), %zmm0240; CHECK-NEXT: vcvtqq2ps %zmm0, %ymm0241; CHECK-NEXT: retq242 %x = load <8 x float>, ptr %p243 %fptosi = tail call <8 x i64> @llvm.x86.avx512.mask.cvttps2qq.512(<8 x float> %x, <8 x i64> undef, i8 -1, i32 4)244 %sitofp = sitofp <8 x i64> %fptosi to <8 x float>245 ret <8 x float> %sitofp246}247 248define <8 x float> @float_to_sint64_to_float_reg_v8f32(<8 x float> %x) {249; CHECK-LABEL: float_to_sint64_to_float_reg_v8f32:250; CHECK: # %bb.0:251; CHECK-NEXT: vcvttps2qq %ymm0, %zmm0252; CHECK-NEXT: vcvtqq2ps %zmm0, %ymm0253; CHECK-NEXT: retq254 %fptosi = tail call <8 x i64> @llvm.x86.avx512.mask.cvttps2qq.512(<8 x float> %x, <8 x i64> undef, i8 -1, i32 4)255 %sitofp = sitofp <8 x i64> %fptosi to <8 x float>256 ret <8 x float> %sitofp257}258 259define <8 x float> @float_to_uint64_to_float_mem_v8f32(ptr %p) {260; CHECK-LABEL: float_to_uint64_to_float_mem_v8f32:261; CHECK: # %bb.0:262; CHECK-NEXT: vcvttps2uqq (%rdi), %zmm0263; CHECK-NEXT: vcvtuqq2ps %zmm0, %ymm0264; CHECK-NEXT: retq265 %x = load <8 x float>, ptr %p266 %fptoui = tail call <8 x i64> @llvm.x86.avx512.mask.cvttps2uqq.512(<8 x float> %x, <8 x i64> undef, i8 -1, i32 4)267 %uitofp = uitofp <8 x i64> %fptoui to <8 x float>268 ret <8 x float> %uitofp269}270 271define <8 x float> @float_to_uint64_to_float_reg_v8f32(<8 x float> %x) {272; CHECK-LABEL: float_to_uint64_to_float_reg_v8f32:273; CHECK: # %bb.0:274; CHECK-NEXT: vcvttps2uqq %ymm0, %zmm0275; CHECK-NEXT: vcvtuqq2ps %zmm0, %ymm0276; CHECK-NEXT: retq277 %fptoui = tail call <8 x i64> @llvm.x86.avx512.mask.cvttps2uqq.512(<8 x float> %x, <8 x i64> undef, i8 -1, i32 4)278 %uitofp = uitofp <8 x i64> %fptoui to <8 x float>279 ret <8 x float> %uitofp280}281 282define <2 x double> @double_to_sint64_to_double_mem_v2f64(ptr %p) {283; CHECK-LABEL: double_to_sint64_to_double_mem_v2f64:284; CHECK: # %bb.0:285; CHECK-NEXT: vcvttpd2qq (%rdi), %xmm0286; CHECK-NEXT: vcvtqq2pd %xmm0, %xmm0287; CHECK-NEXT: retq288 %x = load <2 x double>, ptr %p289 %fptosi = tail call <2 x i64> @llvm.x86.avx512.mask.cvttpd2qq.128(<2 x double> %x, <2 x i64> undef, i8 -1)290 %sitofp = sitofp <2 x i64> %fptosi to <2 x double>291 ret <2 x double> %sitofp292}293 294define <2 x double> @double_to_sint64_to_double_reg_v2f64(<2 x double> %x) {295; CHECK-LABEL: double_to_sint64_to_double_reg_v2f64:296; CHECK: # %bb.0:297; CHECK-NEXT: vcvttpd2qq %xmm0, %xmm0298; CHECK-NEXT: vcvtqq2pd %xmm0, %xmm0299; CHECK-NEXT: retq300 %fptosi = tail call <2 x i64> @llvm.x86.avx512.mask.cvttpd2qq.128(<2 x double> %x, <2 x i64> undef, i8 -1)301 %sitofp = sitofp <2 x i64> %fptosi to <2 x double>302 ret <2 x double> %sitofp303}304 305define <2 x double> @double_to_uint64_to_double_mem_v2f64(ptr %p) {306; CHECK-LABEL: double_to_uint64_to_double_mem_v2f64:307; CHECK: # %bb.0:308; CHECK-NEXT: vcvttpd2uqq (%rdi), %xmm0309; CHECK-NEXT: vcvtuqq2pd %xmm0, %xmm0310; CHECK-NEXT: retq311 %x = load <2 x double>, ptr %p312 %fptoui = tail call <2 x i64> @llvm.x86.avx512.mask.cvttpd2uqq.128(<2 x double> %x, <2 x i64> undef, i8 -1)313 %uitofp = uitofp <2 x i64> %fptoui to <2 x double>314 ret <2 x double> %uitofp315}316 317define <2 x double> @double_to_uint64_to_double_reg_v2f64(<2 x double> %x) {318; CHECK-LABEL: double_to_uint64_to_double_reg_v2f64:319; CHECK: # %bb.0:320; CHECK-NEXT: vcvttpd2uqq %xmm0, %xmm0321; CHECK-NEXT: vcvtuqq2pd %xmm0, %xmm0322; CHECK-NEXT: retq323 %fptoui = tail call <2 x i64> @llvm.x86.avx512.mask.cvttpd2uqq.128(<2 x double> %x, <2 x i64> undef, i8 -1)324 %uitofp = uitofp <2 x i64> %fptoui to <2 x double>325 ret <2 x double> %uitofp326}327 328define <4 x double> @double_to_sint64_to_double_mem_v4f64(ptr %p) {329; CHECK-LABEL: double_to_sint64_to_double_mem_v4f64:330; CHECK: # %bb.0:331; CHECK-NEXT: vcvttpd2qq (%rdi), %ymm0332; CHECK-NEXT: vcvtqq2pd %ymm0, %ymm0333; CHECK-NEXT: retq334 %x = load <4 x double>, ptr %p335 %fptosi = tail call <4 x i64> @llvm.x86.avx512.mask.cvttpd2qq.256(<4 x double> %x, <4 x i64> undef, i8 -1)336 %sitofp = sitofp <4 x i64> %fptosi to <4 x double>337 ret <4 x double> %sitofp338}339 340define <4 x double> @double_to_sint64_to_double_reg_v4f64(<4 x double> %x) {341; CHECK-LABEL: double_to_sint64_to_double_reg_v4f64:342; CHECK: # %bb.0:343; CHECK-NEXT: vcvttpd2qq %ymm0, %ymm0344; CHECK-NEXT: vcvtqq2pd %ymm0, %ymm0345; CHECK-NEXT: retq346 %fptosi = tail call <4 x i64> @llvm.x86.avx512.mask.cvttpd2qq.256(<4 x double> %x, <4 x i64> undef, i8 -1)347 %sitofp = sitofp <4 x i64> %fptosi to <4 x double>348 ret <4 x double> %sitofp349}350 351define <4 x double> @double_to_uint64_to_double_mem_v4f64(ptr %p) {352; CHECK-LABEL: double_to_uint64_to_double_mem_v4f64:353; CHECK: # %bb.0:354; CHECK-NEXT: vcvttpd2uqq (%rdi), %ymm0355; CHECK-NEXT: vcvtuqq2pd %ymm0, %ymm0356; CHECK-NEXT: retq357 %x = load <4 x double>, ptr %p358 %fptoui = tail call <4 x i64> @llvm.x86.avx512.mask.cvttpd2uqq.256(<4 x double> %x, <4 x i64> undef, i8 -1)359 %uitofp = uitofp <4 x i64> %fptoui to <4 x double>360 ret <4 x double> %uitofp361}362 363define <4 x double> @double_to_uint64_to_double_reg_v4f64(<4 x double> %x) {364; CHECK-LABEL: double_to_uint64_to_double_reg_v4f64:365; CHECK: # %bb.0:366; CHECK-NEXT: vcvttpd2uqq %ymm0, %ymm0367; CHECK-NEXT: vcvtuqq2pd %ymm0, %ymm0368; CHECK-NEXT: retq369 %fptoui = tail call <4 x i64> @llvm.x86.avx512.mask.cvttpd2uqq.256(<4 x double> %x, <4 x i64> undef, i8 -1)370 %uitofp = uitofp <4 x i64> %fptoui to <4 x double>371 ret <4 x double> %uitofp372}373 374define <8 x double> @double_to_sint64_to_double_mem_v8f64(ptr %p) {375; CHECK-LABEL: double_to_sint64_to_double_mem_v8f64:376; CHECK: # %bb.0:377; CHECK-NEXT: vcvttpd2qq (%rdi), %zmm0378; CHECK-NEXT: vcvtqq2pd %zmm0, %zmm0379; CHECK-NEXT: retq380 %x = load <8 x double>, ptr %p381 %fptosi = tail call <8 x i64> @llvm.x86.avx512.mask.cvttpd2qq.512(<8 x double> %x, <8 x i64> undef, i8 -1, i32 4)382 %sitofp = sitofp <8 x i64> %fptosi to <8 x double>383 ret <8 x double> %sitofp384}385 386define <8 x double> @double_to_sint64_to_double_reg_v8f64(<8 x double> %x) {387; CHECK-LABEL: double_to_sint64_to_double_reg_v8f64:388; CHECK: # %bb.0:389; CHECK-NEXT: vcvttpd2qq %zmm0, %zmm0390; CHECK-NEXT: vcvtqq2pd %zmm0, %zmm0391; CHECK-NEXT: retq392 %fptosi = tail call <8 x i64> @llvm.x86.avx512.mask.cvttpd2qq.512(<8 x double> %x, <8 x i64> undef, i8 -1, i32 4)393 %sitofp = sitofp <8 x i64> %fptosi to <8 x double>394 ret <8 x double> %sitofp395}396 397define <8 x double> @double_to_uint64_to_double_mem_v8f64(ptr %p) {398; CHECK-LABEL: double_to_uint64_to_double_mem_v8f64:399; CHECK: # %bb.0:400; CHECK-NEXT: vcvttpd2uqq (%rdi), %zmm0401; CHECK-NEXT: vcvtuqq2pd %zmm0, %zmm0402; CHECK-NEXT: retq403 %x = load <8 x double>, ptr %p404 %fptoui = tail call <8 x i64> @llvm.x86.avx512.mask.cvttpd2uqq.512(<8 x double> %x, <8 x i64> undef, i8 -1, i32 4)405 %uitofp = uitofp <8 x i64> %fptoui to <8 x double>406 ret <8 x double> %uitofp407}408 409define <8 x double> @double_to_uint64_to_double_reg_v8f64(<8 x double> %x) {410; CHECK-LABEL: double_to_uint64_to_double_reg_v8f64:411; CHECK: # %bb.0:412; CHECK-NEXT: vcvttpd2uqq %zmm0, %zmm0413; CHECK-NEXT: vcvtuqq2pd %zmm0, %zmm0414; CHECK-NEXT: retq415 %fptoui = tail call <8 x i64> @llvm.x86.avx512.mask.cvttpd2uqq.512(<8 x double> %x, <8 x i64> undef, i8 -1, i32 4)416 %uitofp = uitofp <8 x i64> %fptoui to <8 x double>417 ret <8 x double> %uitofp418}419